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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.

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Spelling suggestions: "subject:"controllable delay"" "subject:"acontrollable delay""

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Design and prototyping of temperature resilient clock distribution networks

Natu, Nitish Umesh 22 May 2014 (has links)
Clock Distribution Networks play a vital role in performance and reliability of a system. However, temperature gradients observed in 3D ICs hamper the functionality of CDNs in terms of varying skew and propagation delay. This thesis presents two compensation techniques, Adaptive Voltage and Controllable Delay, to overcome these problems. The compensation methods are validated using a FPGA-based test vehicle. Modification in traditional buffer design are also presented and the performance as well as the area and power overhead of both the implementations is compared.
3D IC
Through silicon via
Clock distribution network (CDN)
Skew
Propagation delay
Adaptive voltage
Controllable delay
FPGA
Test vehicle
ASIC buffer design
Three-dimensional integrated circuits
Integrated circuits

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