The thesis begins with a review of presently available analogue and digital control schemes for high frequency PWM converters. Advantages and disadvantages of each scheme are identified, to determine which features would be desirable in a new digital control scheme. An extensive examination of peak and average current mode control is undertaken, using state-space/sampled data modelling, to gain more detailed information on the properties of current mode control. On the basis of this information, a new digital current mode control scheme is put forward. This uses samples of the inductor current, line voltage and output voltage to implement a control strategy in software. Average inductor current is calculated each switching cycle and compared to the current program level, providing true current mode control. This has some advantages over traditional methods. Accurate inductor current tracking of the current program level is achieved and no slope compensation is required for stable operation over the full range of duty ratios. Line voltage feed-forward is possible in buck derived topologies, which provides an effective null in the audio susceptibility transfer function, independent of compensation parameters. Current loop stability is independent of line voltage or load current in the buck topology, allowing operation with optimum loop compensation under all normal operating conditions. Practical implementation of a digital current mode controlled current-fed converter is described. This includes a modular architecture for the hardware and documentation for the software. Effects of component selection on the achievable converter switching frequency and dynamic performance are discussed. A method is put forward for the direct digital measurement of loop gain and phase in digital control systems. This is used to obtain actual loop responses from a test bed digital current mode controlled current-fed converter. Line and load transient response tests are presented which demonstrate the dynamic characteristics of digital current mode control.

Current-mode control architectures have been an indispensable technique in many applications, such as Voltage Regulator, Point-of-load converters, power factor correction, battery charger and LED driver. Since the inductor current ramp is used in the modulator in current-mode control without any low pass filter, high order harmonics play important role in the feedback control. This is the reason for the difficulty in obtaining the small-signal model for current-mode control in the frequency domain. A continuous time domain model was recently proposed as a successful model for current-mode control architectures. However, the model was derived by describing function method, which is very arithmetically complicated, not to mention time consuming. For the analysis and design of non-linear system, equivalent circuit model, which is user friendly and intuitive, is an effective tool. In this dissertation, the primary objective is to develop a unified three-terminal switch model for current-mode controls using the results of describing function derivation, which characterizes the small signal property of the common subcircuit of current mode controlled PWM converters. Its application is extended to average current mode control, V2 control and other proposed novel current mode control schemes. First, the existing model for current mode control is reviewed. The limitations of existing model for current-mode control are identified. Based on the universal small signal relationship between terminal currents and the results of describing function derivation, a unified three-terminal switch model for current mode control is proposed. A three-terminal equivalent circuit is developed to represent the small signal behavior of this common sub-circuit. The proposed model is applicable in both constant frequency and variable frequency modulation. After that, the modeling of digital predictive current mode control is presented. Predictive current mode control is one of the promising digital current mode control method featuring fast dynamic response and low sample rate requirement. Many implementations were presented in past ten years. To understand the benefit and the limitation of each implementation, help the engineer to choose the modulation scheme and design the control loop, a small signal Laplace-domain model for digital predictive current mode controls is proposed. The model is extended to the multi-sampled implementation. The modeling result is summarize as the small signal equivalent circuit mode, whose form is consistent with that of analog current mode controls. Based on S-domain model, digital predictive current mode controls are compared with analog implementation to demonstrate the advantages and limitation. Implementation selection guideline and compensation is discussed based on the modeling results. Then, using the proposed unified model is used in the analysis of average current mode control. Under proper design, the inductor current ripple passes through the current compensator and appears in PWM comparator. It significantly influence the high frequency small signal property of the converter. In chapter 3, the proportional feedback is separated from integral feedback so that the sideband frequency feedback effect can be taken into consideration. It extends the results obtained in peak-current model control to average current mode control. The proposed small signal model is accurate up to half switching frequency, predicting the sub-harmonic instability. Based on the proposed model, a new feedback design guideline is proposed. By designing the external ramp following the proposed design guideline, quality factor of the double poles at half of switching frequency in control-to-output transfer function can be precisely controlled. This helps the feedback design to achieve widest control bandwidth and proper damping. V2 control is a popular control scheme in Point-of-load converters due to the unique fast transient response. As the output voltage ripple is used as PWM modulation ramp, V2 control has close relationship with current mode control but this relationship was not addressed in the existing model. Chapter 4 utilizes the three-terminal switch model to build the equivalent circuit model for V2 control, which clearly shows that V2 control is a particular implementation of current mode control, with proportional capacitor voltage feedback and load current feedback embedded. The analysis presented in Chapter 3 provides a clear physical understanding of average current mode control. With constant frequency modulation, the control bandwidth is usually limited by the double pole at half of swithcing frequency, especially in the converters with wide duty cycle range. Chapter 5 proposed a novel I2 current mode control to improve the dynamic performance of average current mode control. In particular, constant on-time I2 control eliminates the need of external ramp while the current loop is inherently stable. Moreover, constant on-time modulation improves the light load efficiency. As a conclusion, this dissertation proposed a unified three-terminal switch model for current mode controls. The application of this equivalent circuit model is extended to average current mode control, V2 control and the novel I2 current mode control. The Laplace-domain model of predictive current mode control is also presented. All the modeling results are verified through simulation and experiments. / Ph. D.

This thesis presents the fundamental issues of the digital controlled DC/DC converter. A lot of challenges exist when you introduce the digital control technique into the control of the DC/DC converter, especially with regards to the voltage regulator module. One issue is the limit cycle oscillation problem caused by the quantization effect from the ADC and DPWM of the digital control chip. Another issue is the delay problem coming from the sample-hold effect. In this thesis, the modeling, analysis and design methodology for the constant frequency voltage-mode control is reviewed. A DPWM (Digital Pulse Width Modulator) model is verified in simulation, which shows what effects the digital control brings to the conventional Pulse Width Modulator. In CPES, the constant on-time control concept is introduced into the digital control of the voltage regulator module. This provides a high resolution of DPWM and allows the digital constant on-time voltage-mode control architecture to be proposed. To limit the oscillation amplitude in the digital control structure, the digital constant on-time current-mode control w/ external ramp is further proposed in CPES. To analyze this structure, a describing function model is proposed for the digital constant on-time current-mode control, which takes both the sample-hold effect and the quantization effect into consideration. This model clearly shows the stability problem caused by the sample-hold effect in the current loop. Using larger ramp's slope values, this stability issue can be alleviated. Based on this model, a design methodology is introduced. By properly designing the current loop's ADC resolution and the voltage loop's ADC resolution, the limit cycle oscillation in this structure can be minimized: the digital constant on-time current-mode control will only have the oscillation coming from the sample-hold effect in the current loop, which can be greatly reduced by adding the large slope's external ramp to this structure. Simulation verification for this design methodology is provided to prove the concepts. Based on the proposed model, the compensator design is performed. The motivation for the compensator design is to push the bandwidth while satisfying the stability condition and the dynamic no-limit-cycle oscillation condition. When analyzing the case of one sample per switching cycle, there is a certain amount of delay, which compromises the phase characteristics. Our design also requires a large external ramp because it will reduce the oscillation amplitude in our system. From our model, it is quite obvious that the external ramp must have a slope larger than one time that of inductor current down slope. A slope that is too larger will weaker the phase and limit the bandwidth. When using the normal current-mode compensator, like the 1-pole 1-zero compensator, the phase is dropped too much and the bandwidth will be limited too low. If we use a 2-pole 2-zero compensator, the phase can be boosted. However, in this case, the gain margin requirement from the dynamic no-limit-cycle oscillation condition will make the further improvements on bandwidth impossible. In our design, the one sixth of the switching frequency is achieved. / Master of Science

Current-mode control architectures with different implementation approaches have been an indispensable technique in many applications, such as voltage regulator, power factor correction, battery charger and LED driver. Since the inductor current ramp, one of state variables influenced by the input voltage and the output voltage, is used in the modulator in current-mode control without any low pass filter, high order harmonics play important role in the feedback control. This is the reason for the difficulty in obtaining the small-signal model for current-mode control in the frequency domain. A continuous time domain model was recently proposed as a successful model for current-mode control architectures with different implementation. However, the model was derived by describing function method, which is very arithmatically complicated, not to mention time consuming. Although an equivalent circuit for a current mode control Buck converter was proposed to help designers to use the model without involving complicated math, the equivalent circuit is not a complete model. Moreover, no equivalent circuit for other topologies is available for designers. In this thesis, the primary objective is to develop a unified three-terminal switch model for current-mode control with different implementation methods, which are applicable in all the current mode control power converters. First, the existing model for current mode control is reviewed. The limitation of average models and the discrete time model for current-mode control is identified. The continuous time model and its equivalent circuit of Buck converter is introduced. The deficiency of the equivalent circuit is discussed. After that, a unified three-terminal switch model for current mode control is presented. Based on the observation, the PWM switch and the closed current loop is taken as an invariant sub-circuit which is common to different DC/DC converter topologies. A basic small signal relationship between terminal currents is studied and the result shows that the PWM switch with current feedback preserves the property of the PWM switch in power stage. A three-terminal equivalent circuit is developed to represent the small signal behavior of this common sub-circuit. The proposed model is a unified model, which is applicable in both constant frequency modulation and variable frequency modulation. The physical meaning of the three-terminal equivalent circuit model is discussed. The model is verified by SIMPLIS simulation in commonly used converters for both constant frequency modulation and variable frequency modulation. Then, based on the proposed unified model, a comparison between different current mode control implementations is presented. In different applications, different implementations have their unique benefit on extending control bandwidth. The properties of audio susceptibility and output impedance are discussed. It is found that, for adaptive voltage positioning design, constant on-time current mode control can simplifies the outer loop design. Next, since multiphase interleaving structure is widely used in PFC, voltage regulator and other high current applications, the model is extended to multiphase current mode control. Some design concerns are discussed based on the model. As a conclusion, a unified three-terminal switch model for current mode controls is investigated. The proposed model is quite general and not limited by implementation methods and topologies. All the modeling results are verified through simulation and experiments. / Master of Science

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"In this thesis, based on the existing researches on power factor correction technology, I analyze, design and study the Boost type power factor correction technology, which is applied in the in-board two-stage battery charger. First I analyzed the basic working principle of the active power factor corrector. By comparing several different topologies of PFC converter main circuit and control methods, I specified the research object to be the average current control (ACM) boost power factor corrector. Then I calculated and designed the PFC circuit and the ACM controller applied in the first level charging of EVs. And I run the design in Simulink and study the important features like power factor, the input current waveform and the output DC voltage and the THD and odd harmonic magnitude."

Distributed generation is expected to play a significant role in remedying the many shortcomings in today’s energy market. In particular, fuel cell power generation will play a big part due to several advantages. Still, it is faced with its own challenges to tap into its potential as a solution to the crisis. The responsibilities of the Power Conditioning Unit (PCU), and thus its design, are therefore complex, yet critical to the fuel cell system’s performance and ability to meet the requirements. To this end, the dc-dc converter, considered the most critical component of the PCU for optimum performance, is closely examined. The selected converter is first modeled to gain insight into its behavior for the purpose of designing suitable compensators. MATLAB is then used to study the results using the frequency domain, and it was observed that the converter offers its own unique challenges in terms of closed-loop performance and stability. These limitations must therefore be carefully accounted for and compensated against when designing the control loops to achieve the desired objectives. Negative feedback control to ensure robustness is then discussed. The insertion of a second inner loop in Current Mode Control (CMC) offers several key advantages over single-loop Voltage Mode Control (VMC). Furthermore, the insertion of a Current Error Amplifier (CEA) in Average Current Mode Control (ACMC) helps overcome many of the problems present in Peak Current Mode Control (PCMC) whilst allowing much needed design flexibility. It is therefore well suited for this application in an attempt to improve the dynamic behavior and overcoming the shortcomings inherent in the converter. The modulator and controller for ACMC are then modeled separately and combined with the converter’s model previously derived to form the complete small-signal model. A suitable compensation network is selected based on the models and corresponding Bode plots used to assess the system’s performance and stability. The resulting Bode plot for the complete system verifies that the design objectives are clearly met. The complete system was also built in MATLAB/Simulink, and subjected to external disturbances in the form of stepped load changes. The results confirm the system’s excellent behavior despite the disturbance, and the effectiveness of the control strategy in conjunction with the derived models. To meet the demand in many applications for power sources with high energy density and high power density, it is constructive to combine the fuel cell with an Energy Storage System (ESS). The hybrid system results in a synergistic system that brings about numerous potential advantages. Nevertheless, in order to reap these potential benefits and avoid detrimental effects to the components, a suitable configuration and control strategy to regulate the power flow amongst the various sources is of utmost importance. A robust and flexible control strategy that allows direct implementation of the ACMC scheme is devised. The excellent performance and versatility of the proposed system and control strategy are once again verified using simulations. Finally, experimental tests are also conducted to validate the results presented in the dissertation. A scalable and modular test station is built that allows an efficient and effective design and testing process of the research. The results show good correspondence and performance of the models and control design derived throughout the thesis.

Distributed generation is expected to play a significant role in remedying the many shortcomings in today’s energy market. In particular, fuel cell power generation will play a big part due to several advantages. Still, it is faced with its own challenges to tap into its potential as a solution to the crisis. The responsibilities of the Power Conditioning Unit (PCU), and thus its design, are therefore complex, yet critical to the fuel cell system’s performance and ability to meet the requirements. To this end, the dc-dc converter, considered the most critical component of the PCU for optimum performance, is closely examined. The selected converter is first modeled to gain insight into its behavior for the purpose of designing suitable compensators. MATLAB is then used to study the results using the frequency domain, and it was observed that the converter offers its own unique challenges in terms of closed-loop performance and stability. These limitations must therefore be carefully accounted for and compensated against when designing the control loops to achieve the desired objectives. Negative feedback control to ensure robustness is then discussed. The insertion of a second inner loop in Current Mode Control (CMC) offers several key advantages over single-loop Voltage Mode Control (VMC). Furthermore, the insertion of a Current Error Amplifier (CEA) in Average Current Mode Control (ACMC) helps overcome many of the problems present in Peak Current Mode Control (PCMC) whilst allowing much needed design flexibility. It is therefore well suited for this application in an attempt to improve the dynamic behavior and overcoming the shortcomings inherent in the converter. The modulator and controller for ACMC are then modeled separately and combined with the converter’s model previously derived to form the complete small-signal model. A suitable compensation network is selected based on the models and corresponding Bode plots used to assess the system’s performance and stability. The resulting Bode plot for the complete system verifies that the design objectives are clearly met. The complete system was also built in MATLAB/Simulink, and subjected to external disturbances in the form of stepped load changes. The results confirm the system’s excellent behavior despite the disturbance, and the effectiveness of the control strategy in conjunction with the derived models. To meet the demand in many applications for power sources with high energy density and high power density, it is constructive to combine the fuel cell with an Energy Storage System (ESS). The hybrid system results in a synergistic system that brings about numerous potential advantages. Nevertheless, in order to reap these potential benefits and avoid detrimental effects to the components, a suitable configuration and control strategy to regulate the power flow amongst the various sources is of utmost importance. A robust and flexible control strategy that allows direct implementation of the ACMC scheme is devised. The excellent performance and versatility of the proposed system and control strategy are once again verified using simulations. Finally, experimental tests are also conducted to validate the results presented in the dissertation. A scalable and modular test station is built that allows an efficient and effective design and testing process of the research. The results show good correspondence and performance of the models and control design derived throughout the thesis.

In this thesis, the possibility of applying digital current mode control on multiple-input (MI) converters is studied. As for MI topologies having a central energy transfer inductor, the predictive constant on-time current-mode control can greatly reduce both the design and digital realization efforts needed. By doing digital constant on-time current-mode control, the control of MI buck and MI buck-boost converters can be simplified into an equivalent-single-input converter control problem. The small signal models of digital constant on-time controlled single-input (SI), MI buck and SI, MI buck-boost converters in both CCM and DCM are proposed. Simulations and experiments were built to verify the proposed models. / text