abstract: Current sensing ability is one of the most desirable features of contemporary current or voltage mode controlled DC-DC converters. Current sensing can be used for over load protection, multi-stage converter load balancing, current-mode control, multi-phase converter current-sharing, load independent control, power efficiency improvement etc. There are handful existing approaches for current sensing such as external resistor sensing, triode mode current mirroring, observer sensing, Hall-Effect sensors, transformers, DC Resistance (DCR) sensing, Gm-C filter sensing etc. However, each method has one or more issues that prevent them from being successfully applied in DC-DC converter, e.g. low accuracy, discontinuous sensing nature, high sensitivity to switching noise, high cost, requirement of known external power filter components, bulky size, etc. In this dissertation, an offset-independent inductor Built-In Self Test (BIST) architecture is proposed which is able to measure the inductor inductance and DCR. The measured DCR enables the proposed continuous, lossless, average current sensing scheme. A digital Voltage Mode Control (VMC) DC-DC buck converter with the inductor BIST and current sensing architecture is designed, fabricated, and experimentally tested. The average measurement errors for inductance, DCR and current sensing are 2.1%, 3.6%, and 1.5% respectively. For the 3.5mm by 3.5mm die area, inductor BIST and current sensing circuits including related pins only consume 5.2% of the die area. BIST mode draws 40mA current for a maximum time period of 200us upon start-up and the continuous current sensing consumes about 400uA quiescent current. This buck converter utilizes an adaptive compensator. It could update compensator internally so that the overall system has a proper loop response for large range inductance and load current. Next, a digital Average Current Mode Control (ACMC) DC-DC buck converter with the proposed average current sensing circuits is designed and tested. To reduce chip area and power consumption, a 9 bits hybrid Digital Pulse Width Modulator (DPWM) which uses a Mixed-mode DLL (MDLL) is also proposed. The DC-DC converter has a maximum of 12V input, 1-11 V output range, and a maximum of 3W output power. The maximum error of one least significant bit (LSB) delay of the proposed DPWM is less than 1%. / Dissertation/Thesis / Ph.D. Electrical Engineering 2011

This thesis presents the design and development of two switching amplifiers used to drive the so-called smart material actuators. Different from conventional circuits, a smart material actuator is ordinarily a highly capacitive load. Its capacitance is non-linear and its strain is hysteretic with respect to its electrical control signal. This actuator's reactive load property usually causes a large portion of reactive power circulating between the power amplifier and the driven actuator, thus reduces the circuit efficiency in a linear power amplifier scenario. In this thesis, a switching amplifier design based on the PWM technique is proposed to develop a highly efficient power amplifier, and peak current mode control is proposed to reduce the actuator's hysteretic behavior. Since the low frequency current loop gain tends to be low due to the circuit's capacitive load, average current mode control is further proposed to boost the low frequency current loop gain and improve the amplifier's low frequency performance. Both of the circuits have been verified by prototype design and their experimental measurement results are given. / Master of Science

Various types of current mode control are being used in different applications. Model for current mode control is indispensable for proper system design. Since 1980s, modeling of current mode control has been a hot topic in power electronics field. In current mode control, sub-harmonic oscillation is a common issue, especially for constant frequency current mode control: like peak current mode control, valley current mode control, or average current mode control. Recently V2 control is becoming more and more popular due to its simple implementation ad super fast transient response. V2 control can also run into sub-harmonic oscillation just as current mode control. Efforts have been devoted to modeling of V2 control. A common property of different types of current mode control and V2 control is that they are all multi-loop structures and the inner loops are all highly nonlinear. Due to the nonlinearity of the inner loops, modeling of these structures is extremely difficult. Up to now, there are two main problems which haven't been solved: 1. modeling of average current mode control; 2. modeling of V2 control with composite capacitors. This thesis tries to solve these two problems and starts with V2 control. For V2 control with single type of bulk capacitors, an accurate model has been proposed previously. In this thesis, an equivalent circuit model is proposed to get better physical understanding. This method makes use of previous current mode control modeling result and relates V2 control with current mode control. To model V2 control with composite capacitors, capacitor currents and output voltage time domain waveforms are analyzed. Based on describing function method, transfer function from control to output is derived. The modeling result shows that with more parallel ceramic capacitors, system has smaller stability margin. For average current mode control, the structure is compared with V2 control. Similarity between the structures of current compensator in average current mode and output capacitor network in V2 control is identified. V2 model is utilized for average current mode control. The modeling derivation process is simplified. For the current compensator in average current mode control, it is not desired to have a high frequency pole from stability point of view. As a conclusion, a circuit model for V2 control with bulk capacitors is proposed and another two problems are examined: modeling of V2 control with composite capacitors and modeling of average current mode control. It has been demonstrated that there is similarity between these two structures. The modeling results are verified through simulation and experiments. / Master of Science

The trend in isolated DC/DC bus converters is to increase the output power in the same brick form factors that have been used in the past. Traditional intermediate bus converters (IBCs) use silicon power metal oxide semiconductor field effect transistors (MOSFETs), which recently have reached the limit in terms of turn on resistance (RDSON) and switching frequency. In order to make the IBCs smaller, the switching frequency needs to be pushed higher, which will in turn shrink the magnetics, lowering the converter size, but increase the switching related losses, lowering the overall efficiency of the converter. Wide-bandgap semiconductor devices are becoming more popular in commercial products and gallium nitride (GaN) devices are able to push the switching frequency higher without sacrificing efficiency. GaN devices can shrink the size of the converter and provide better efficiency than its silicon counterpart provides. A survey of current IBCs was conducted in order to find a design point for efficiency and power density. A two-stage converter topology was explored, with a multiphase buck converter as the front end, followed by an LLC resonant converter. The multiphase buck converter provides regulation, while the LLC provides isolation. With the buck converter providing regulation, the switching frequency of the entire converter will be constant. A constant switching frequency allows for better electromagnetic interference (EMI) mitigation. This work includes the details to design and implement a hard-switched multiphase buck converter with planar magnetics using GaN devices. The efficiency includes both the buck efficiency and the overall efficiency of the two-stage converter including the LLC. The buck converter operates with 40V - 60V input, nominally 48V, and outputs 36V at 1 kW, which is the input to the LLC regulating 36V – 12V. Both open and closed loop was measured for the buck and the full converter. EMI performance was not measured or addressed in this work. / Master of Science / Traditional silicon devices are widely used in all power electronics applications today, however they have reached their limit in terms of size and performance. With the introduction of gallium nitride (GaN) field effect transistors (FETs), the limits of silicon can now be passed with GaN providing better performance. GaN devices can be switched at higher switching frequencies than silicon, which allows for the magnetics of power converters to be smaller. GaN devices can also achieve higher efficiency than silicon, so increasing the switching frequency will not hurt the overall efficiency of the power converter. GaN devices can handle higher switching frequencies and larger currents while maintaining the same or better efficiencies over their silicon counterparts. This work illustrates the design and implementation of GaN devices into a multiphase buck converter. This converter is the front end of a two-stage converter, where the buck will provide regulation and the second stage will provide isolation. With the use of higher switching frequencies, the magnetics can be decreased in size, meaning planar magnetics can be used in the power converter. Planar magnetics can be placed directly inside of the printing circuit board (PCB), which allows for higher power densities and easy manufacturing of the magnetics and overall converter. Finally, the open and closed loop were verified and compared to the current converters that are on the market in the 48V – 12V area of intermediate bus converters (IBCs).

Due to unique characteristics, current-mode control architectures with different implementation approaches have been widely used in power converter design to achieve current sharing, AVP control, and light-load efficiency improvement. Therefore, an accurate model for current-mode control is indispensable to system design due to the existence of subharmonic oscillations. The fundamental difference between current-mode control and voltage-mode control is the PWM modulation. The inductor current, one of state variables, is used in the modulator in current-mode control while an external ramp is used in voltage-mode control. The dynamic nonlinearity of current-mode control results in the difficulty of obtaining the small-signal model for current-mode control in the frequency domain. There has been a long history of the current-mode control modeling. Many previous attempts have been made especially for constant-frequency peak current-mode control. However, few models are available for variable-frequency constant on-time control and V2 current-mode control. It's hard to directly extend the model of peak current-mode control to those controls. Furthermore, there is no simple way of modeling the effects of the capacitor ripple which may result in subharmonic oscillations in V2 current-mode control. In this dissertation, the primary objective to investigate a new and general modeling approach for current-mode control with different implementation methods. First, the fundamental limitation of average models for current-mode control is identified. The sideband components are generated and coupled with the fundamental component through the PWM modulator in the current loop. Moreover, the switching frequency harmonics cannot be ignored in the current loop since the current ripple is used for the PWM modulation. Available average models failed to consider the sideband effects and high frequency harmonics. Due to the complexity of the current loop, it is difficult to analyze current loop in the frequency domain. A new modeling approach for current-mode control is proposed based on the time-domain analysis. The inductor, the switches and the PWM modulator are treated as a single entity to model instead of breaking them into parts to do it. Describing function method is used. Proposed approach can be applied not only to constant-frequency modulation but also to variable-frequency modulation. The fundamental difference between different current-mode controls is elaborated based on the models obtained from the new modeling approach. Then, an equivalent circuit representation of current-mode control is presented for the sake of easy understanding. The effect of the current loop is equivalent to controlling the inductor current as a current source with certain impedance. The circuit representation provides both the simplicity of the circuit model and the accuracy of the proposed model. Next, the new modeling approach is extended to V2 current-mode control based on similar concept. The model for V2 current-mode control can accurately predict subharmonic oscillations due to the influence of the capacitor ripple. Two solutions are discussed to solve the instability issue. After that, a digital application of current-mode control is introduced. High-resolution digital pulse-width modulator (DPWM) is considered to be indispensable for minimizing the possibility of unpredicted limit-cycle oscillations, but results in high cost, especially in the application of voltage regulators for microprocessors. In order to solve this issue, a fully digital current-mode control architecture which can effectively limit the oscillation amplitude is presented, thereby greatly reducing the design challenge for digital controllers by eliminating the need for the high-resolution DPWM. The new modeling strategy is also used to model the proposed digital current-mode control to help system design. As a conclusion, a new modeling approach for current-mode control is fully investigated. Describing function method is utilized as a tool in this dissertation. Proposed approach is quite general and not limit by implementation methods. All the modeling results are verified through simulation and experiments. / Ph. D.

No description available.

abstract: High-efficiency DC-DC converters make up one of the important blocks of state-of-the-art power supplies. The trend toward high level of transistor integration has caused load current demands to grow significantly. Supplying high output current and minimizing output current ripple has been a driving force behind the evolution of Multi-phase topologies. Ability to supply large output current with improved efficiency, reduction in the size of filter components, improved transient response make multi-phase topologies a preferred choice for low voltage-high current applications. Current sensing capability inside a system is much sought after for applications which include Peak-current mode control, Current limiting, Overload protection. Current sensing is extremely important for current sharing in Multi-phase topologies. Existing approaches such as Series resistor, SenseFET, inductor DCR based current sensing are simple but their drawbacks such low efficiency, low accuracy, limited bandwidth demand a novel current sensing scheme. This research presents a systematic design procedure of a 5V - 1.8V, 8A 4-Phase Buck regulator with a novel current sensing scheme based on replication of the inductor current. The proposed solution consists of detailed system modeling in PLECS which includes modification of the peak current mode model to accommodate the new current sensing element, derivation of power-stage and Plant transfer functions, Controller design. The proposed model has been verified through PLECS simulations and compared with a transistor-level implementation of the system. The time-domain parameters such as overshoot and settling-time simulated through transistor-level implementation is in close agreement with the results obtained from the PLECS model. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2017

CoordenaÃÃo de AperfeiÃoamento de Pessoal de NÃvel Superior / This work presents the study and implementation of an ac-dc Ćuk converter based on the three state switching cells applied in charger stations for electric vehicles. This converter has, as main characteristics, reduction of conducting power losses in the semiconductors, a single stage topology and current source behavior for both input and output terminals. As drawbacks, the topology presents: the voltage across the semiconductors is equal to the sum of the input and the output voltages, and a difference between the current values through the semiconductors caused by an inappropriate layout of the power prototypes or by a lack of symmetry between the control signals. The analysis of the converter is made through the qualitative and quantitative studies, beyond the analysis of the semiconductor losses which are presented as well. The current and voltage of the battery are controlled by the average current mode technique, which consist in a fast current control loop if compared with the terminals battery voltage control loop. The topology is design for 1 kW output power, 220 V in input voltage and 162 V in the output terminals (12 batteries in series connection). Experimental results for resistive load, as well batteries, are shown in order to verify the functionalities of the topology and its characteristics. / Este trabalho apresenta o estudo e desenvolvimento de um conversor ca-cc Ćuk baseado na cÃlula de comutaÃÃo trÃs estados para aplicaÃÃo em carregadores de baterias para veÃculos elÃtricos. As principais caracterÃsticas deste conversor sÃo: a reduÃÃo das perdas por conduÃÃo nos interruptores controlados, um Ãnico estÃgio de processamento de potÃncia e caracterÃstica de fonte de corrente na entrada e na saÃda. Como inconvenientes a topologia apresenta: a tensÃo sobre os semicondutores igual à soma das tensÃes de entrada e saÃda e o desequilÃbrio de corrente atravÃs dos componentes quando hà assimetria no layout da placa de potÃncia ou nos sinais de comando dos interruptores. Um estudo teÃrico à realizado atravÃs das anÃlises qualitativa e quantitativa, alÃm das anÃlises do processo de comutaÃÃo e das perdas nos componentes do conversor. Para controlar o fluxo de potÃncia da rede elÃtrica para as baterias à utilizada a estratÃgia de controle modo corrente mÃdia, sendo que, a mesma apresenta uma malha de corrente rÃpida que monitora a corrente de entrada e uma malha de tensÃo lenta que supervisiona a tensÃo sobre os terminais da bateria. Neste trabalho à realizado o projeto do carregador de baterias para aplicaÃÃo em veÃculos elÃtricos com 1 kW de potÃncia, tensÃo de entrada eficaz de 220 V e tensÃo de saÃda de 162 V, correspondente a 12 baterias conectadas em sÃrie. Um protÃtipo com as especificaÃÃes indicadas foi construÃdo e testado experimentalmente em laboratÃrio e os resultados de simulaÃÃo e experimentais obtidos sÃo utilizados para validar a anÃlise teÃrica e o projeto realizado. Foram realizados testes com carga puramente resistiva e em seguida com um banco de baterias, que comprovaram o funcionamento da topologia.

In this thesis, a test system is designed and implemented in order to evaluate the basic electrical performance and determine the parameters of ultracapacitors (UC). The implemented UC test system is based on power electronics converters and it is capable of charging and discharging the UC under test with predetermined current profiles. The charging operation is provided by a configuration involving the AC utility grid, a step-down transformer, a diode bridge, and a DC bus filter capacitor followed by a step-down DC-DC converter. The energy stored in the UC under test, as a result of the charging operation, is discharged to a resistor bank through a step-up DC-DC converter and a DC chopper structure. The charging and discharging current applied to the UC under test is provided by means of current mode control of power electronics converters. The control mechanism of the power electronics converters and the transition operations between the charging and discharging phases of the test system is realized via a microcontroller supported hardware structure. In the scope of the thesis study, a UC module composed of five serially connected UC cells is constructed. Constant current and constant power tests are applied to the constructed UC module. The performance of the implemented UC test system is investigated by means of computer simulations and experimental results. Further, basic electrical behaviour of the constructed UC module is evaluated and the parameters are extracted experimentally.

In this thesis a two-stage AC/DC/DC power converter is designed and implemented. The AC/DC input stage of the converter consists of the two&amp / #8211 / phase interleaved boost topology employing the average current mode control principle. The output stage consists of a zero voltage switching phase shifted full bridge (ZVS&amp / #8211 / PS&amp / #8211 / FB) DC/DC converter. For the input stage, main design goals are obtaining high input power factor, low input current distortion, and well regulated output dc voltage, and obtaining these attributes in a power converter with high power density. For the input stage, the interleaved structure has been chosen in order to obtain reduced line current ripple and EMI, reduced power component stresses, and improved power density. The control of the pre&amp / #8211 / regulator is provided by utilizing a new commercial monolithic integrated circuit, which provides interleaved continuous conduction mode power factor correction (PFC). The output stage is formed by utilizing the available prototype hardware of a ZVS&amp / #8211 / PS&amp / #8211 / FB DC/DC converter and mainly the system integration and controller design and implementation studies have been conducted. The converter small signal model is derived and utilizing its transfer function and employing voltage loop control, the output voltage regulator has been designed. The output voltage controller is implemented utilizing a digital signal processor (DSP). Integrating the AC/DC preregulator and DC/DC converter, a laboratory AC/DC/DC converter system with high overall performance has been obtained. The overall system performance has been verified via computer simulations and experimental results obtained from laboratory prototype.