Recently, switched capacitor DC/DC converters are extensively used in portable electronic devices because they feature many advantages, such as high efficiency, small package, low quiescent current, minimal external components and low cost. In this thesis, two step-down switched capacitor DC/DC converters are designed. One has the fixed output options 1.5V, 1.8V and 2.0V. The other one has the output 1.2V. These two converters are implemented in 0.5��m CMOS process through National Semiconductor Corporation. The design is verified by the circuit-level simulations, and design issues are discussed. / Graduation date: 2004

La generación de nuevas estructuras convertidoras y su modelado matemático son las dos temáticas principales estudiadas en esta tesis. El seguimiento de una metodología que modifica la estructura del circuito, realizando una ruptura de la simetría con base en los resultados de simulación, permitió generar la familia de convertidores en "interleaving" asimétrico compuesta por el AIDB, el AIDBB y el grupo-AIDF. En el apartado de modelado se ha desarrollado una nueva aproximación conceptual inspirada en las ideas de trabajos previos que se estudian en el estado del arte. El nombre dado a esta nueva aproximación es: Promediado Modificado Usando Métodos Gráficos. Este nuevo enfoque ha sido utilizado para obtener el modelo promediado de la nueva familia de convertidores en el espacio de estados. Las mediciones experimentales de la respuesta en frecuencia del convertidor AIDB y el diseño del controlador LQR permitieron verificar la aproximación del modelo en pequeña señal obtenido. / The two main topics presented in this thesis are the generation and mathematical modelling of new converter structures. The fundamental idea behind the methodology used to generate the new converter structures was to break the symmetry. This involved modifying the circuit structure on the basis of the simulation results. This methodology allowed the generation of the family of asymmetrical interleaved converters, which consists of the AIDB, the AIDBB and the AIDFgroup. A new conceptual modelling approach was developed on the basis of ideas taken from previous research which is reviewed in the state of the art. This approach was called Modified Averaging Using Graphical Methods. Because of its features, this new method can be used to model the state space average of the new converter family presented here. The accuracy of the AIDB converter small signal model was verified by measuring the frequency response and by designing an LQR controller.

This work describes the implementation of DC to DC converter for Smart Dust in 65 nm CMOS technology. The purpose of a DC to DC converter is to convert a battery voltage of 1 Vto a lower voltage of 0.5 V used by the processor. The topology used in this DC to DC converteris of Buck type which converts a higher voltage to lower voltage with the advantage of givinghigh efficiency about 75%. The system uses PWM (Pulse width modulation) technique. It usesnon-overlapping clock generation technique for reducing the power consumption. The systemprovides up to 5 mA load current and has power consumption of 2.5 mW.

Thesis (M.S.)--University of Florida, 2005. / Title from title page of source document. Document formatted into pages; contains 74 pages. Includes vita. Includes bibliographical references.

Thesis (M.Eng.), Memorial University of Newfoundland, 2000. / Bibliography: leaves 105-109.

Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2002. / Includes bibliographical references (leaves 95-97). Also available in electronic version. Access restricted to campus users.

Thesis (M.S.)--Missouri University of Science and Technology, 2008. / Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed May 12, 2008) Includes bibliographical references (p. 102-107).

Thesis (Ph. D.)--Missouri University of Science and Technology, 2009. / Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed May 4, 2009) Includes bibliographical references.

Thesis (M.S.)--California Polytechnic State University, 2008. / Title from PDF title page; viewed on January 8, 2009. Major professor: Taufik, Ph.D. "Presented to the faculty of the College of Engineering, California Polytechnic State University." "In partial fulfillment of the requirements for the degree [of] Master of Science in Electrical Engineering." "September 2008." Includes bibliographical references (p. 102-103). Also available on microfiche.

Thesis (M.S.)--California Polytechnic State University, 2008. / "June 2008." "In partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering." "Presented to the faculty of California Polytechnic State University, San Luis Obispo." Major professor: James Harris, Ph.D. Includes bibliographical references (leaves 70-72). Also available online and on microfiche (2 sheets).