Zero- Voltage-Switching Multi-Resonant-Converter (ZVS-MRC) techniques are applied with hybrid microelectronics fabrication technologies to design and implement efficient, high-density (>50 W/in³) dc/dc converters. A low-profile high-density power stage of a 25 W dc/dc flyback ZVS-MRC is designed and built, and experimental results are shown. A high-density control circuit for a 50 W forward ZVS-MRC is designed using an integrated controller. This circuit is implemented into the high-density power stage previously designed by Tabisz and Lee to attain an overall converter power density of above 80 W/in³. A low-profile interleaved winding structure, fabricated by laminating copper-on-polyamide, for the transformer in the 50 W ZVS-MRC is introduced. Finite element analysis is performed to show the advantages gained with this structure. / Master of Science

The nonlinear modeling and analysis of dc-dc converters in the continuous mode and discontinuous mode has been done by averaging and discrete-sampling techniques. The averaging technique is simple to use and averages the output voltage. The discrete technique is very complex and cumbersome, but accurately predicts the envelope of the output voltage. A new model is developed by combining the aforementioned techniques. This new model, the discrete-average model, accurately predicts the envelope of the output voltage and is easy to implement in circuit and state variable forms. The major points of this dissertation are as follows: 1. The proposed model is shown to be dependent on the type of duty cycle control. 2. The proper selection of the power stage model, between average and discrete-average, is largely a function of the error processor in the feedback loop. 3. The accuracy of the measurement data taken by a conventional technique is affected by the conditions at which the data is collected. / Ph. D.

The objective of this research is to determine if it is possible to reduce the number of organic solar cells required to power a load using a DC to DC converter thereby reducing the cost of the organic solar array system. An organic solar power system designer may choose an organic implementation of a DC to DC converter to go along with the organic solar cell array. Common DC to DC converters include the buck converter, boost converter, buck/boost converter, and Cuk converter, all of which are not good candidates for organic implementation due to their use of inductors. Organic inductors are relatively more lossy than organic capacitors. So, an inductor-less DC to DC converter, such as the Dickson charge pump, would be a better candidate for organic implementation. Solar cells connected in an array configuration usually do not perform up to their full potential due to current and voltage mismatches between solar cells. These mismatches can be related to each solar cell's circuit model parameters such as the photon current density, diode ideality factor, diode reverse saturation current density, parallel resistance, and series resistance. This research varies these circuit model parameters as dependent variables, and observes the loads and power levels that make the Dickson charge pump a feasible option. The results show that current mismatch does produce an opportunity to use a DC to DC converter to save the use of a few solar cells. However, the Dickson charge pump was found to be infeasible due to an input voltage requirement that could not be met using the tested organic solar cells.

The increased use of DC-consuming electronics in many applications relevant to everyday life, necessitates significant improvements to power conversion and distribution methodologies. The surge in mobile electronics created a new power application space where high efficiency, size, and reduced complexity are critical, and at the same time, many computational tasks are relegated to centralized cloud computing centers, which consume significant amounts of energy. In both those application spaces, conversion and distribution efficiency improvements of even a few-% proves to be more and more challenging. A lot of research and development efforts target each source of loss, in an attempt to improve power electronics such that it serves the advances in other fields of electronics. Non-isolated DC-DC converters are essential in every electronics system, and improvements to efficiency, volume, weight and cost are of utmost interest. In particular, increasing the operation frequency and the conversion ratio of such converters serves the purposes of reducing the number or required conversion steps, reducing converter size, and increasing efficiency. The aforementioned improvements can be achieved by using superior technologies for the components of the converter, and by implementing higher level of integration than most present-day converters exhibit. In this work, Gallium Nitride (GaN) high electron mobility transistors (HEMT) are utilized as switches in a half-bridge buck converter topology, in conjunction with fine-line 180nm complementary metal oxide semiconductor (CMOS) driver circuitry. The circuits are integrated through a face-to-face bonding technique which results in significant reduction in interconnects parasitics and allows faster, more efficient operation. This work shows that the use of GaN transistors for the converter gives an efficiency headroom that allow pairing converters with state-of-the-art thin-film inductors with magnetic material, a task that is currently usually relegated to air-core inductors. In addition, a new "core-clad" structure for thin-film magnetic integrated inductors is presented for the use with fully integrated voltage regulators (IVRs). The core-clad topology combines aspects from the two popular inductor topologies (solenoid and cladded) to achieve higher inductance density and improved high frequency performance.

This thesis presents a low power DC-DC converter suitable for harvesting energy from high impedance thermoelectric generators (TEGs) for the use in body powered electronics. The chip has been fabricated in a 130nm CMOS technology. To meet the power demands of body powered networks, a novel dual-path architecture capable of efficiently harvesting power at levels below 5 μW has been developed. To control the converter, a low power control loop has been developed. The control loop features a low-power clock and a pulse counting system that is capable of matching the converter impedance with high impedance TEGs. The system consumes less than 900nW of quiescent power and maintains an efficiency of 68% for a load of 5 μW. / Graduation date: 2013

The systems which contain coarsely quantized signals are commonly found in applications where the actuators and/or sensors can only output a finite number of levels. This thesis focuses on the problem of synthesizing a finite-level control force for a certain control task, first presenting a systematic design method based on the theory of sliding modes and then applying it to the designs of the class-D audio amplifier and synchronous buck converter. At the first part, a novel three-level modulation technique for a class-D audio amplifier is designed by the sliding mode control theory. The simulated and experimental results conform to the excellent performance of this three-level modulation scheme. In particular, the proposed modulation scheme improves the poor efficiency of a conventional two-level class-D audio amplifier when the audio input signal is small, also excludes the output LC filter. The experiment shows that the designed three-level class-D amplifier achieves a minimum total harmonic distortion plus noise of 0.039% and an efficiency of 85.18%. At the second part, the controller of a synchronous buck converter is designed. The proposed self-oscillating controller stabilizes the buck converter in sliding mode, without the need of a triangular wave generator like the conventional PWM method. A 12V/1.5V synchronous buck converter with proposed control is built in the laboratory. The experiment shows 0.66% of the static output ripple and 3% of the load regulation error in response to the 15A step change of the load current at a slew rate of 50A/£gs.

Thesis (M.App.Sc.) - Carleton University, 2002. / Includes bibliographical references (p. 175-182). Also available in electronic format on the Internet.

Includes bibliographical references (p. 143-153).

Thesis (MScEng)--Stellenbosch University, 2003. / ENGLISH ABSTRACT: This report presents the design and development of a multilevel inverter for DC reticulation. Two main multilevel inverter topologies are introduced and discussed. The research focusses on the flying capacitor multilevel topology, since it became evident that it is more suitable for DC reticulation than the diode clamped multilevel topology. A bootstrap power supply for the gate drive circuits of a multilevel inverter is developed and its feasibility verified experimentally. A self-starting auxiliary power supply, that aims at addressing the power supply problem of DC to AC and DC to DC converters, is designed and its functionality demonstrated on a flying capacitor multilevel inverter. An FPGA based digital controller for implementing the inverter's control algorithms is also discussed. This controller incorporates a feed-forward output voltage regulation technique. Experimental results obtained with the four-level flying capacitor multilevel inverter, using the FPGA based digital controller and the self-starting auxiliary power supply, are presented in this report. / AFRIKAANSE OPSOMMING: In hierdie verslag word die ontwerp en ontwikkelling van 'n multivlak omsetter vir GS retikulasie bespreek. Twee hoof multivlak omsetter topologië word voorgestel en bespreek. Die navorsing fokus op die "vlieënde-kapasitor" multivlak topologië omdat dit duidelik geword het dat dit 'n beter opsie is vir die GS retikulasie as die diode-klamp multivlak topologië. 'n Kragbron vir die hekaandryfbane van die multivlak omsetter is ontwikkel en die werking daarvan is met experimentele toetse bevestig. 'n Self-begin kragbron, wat die probleem van die kragtoevoer aan die GS na WS en die GS na GS omsetters aanspreek, is ontwerp en die funksionaliteit is gedemonstreer met die "vlieënde-kapasitor" multivlak . omsetter. 'n Digitale beheerder, gebaseer op 'n FPGA, wat gebruik word om die omsetter se beheer algoritmes te implementeer, word ook bespreek. Hierdie beheerder inkorporeer 'n vorentoe-voer uittree spannings regulasie tegniek. Eksperimentele resultate wat gekry is met 'n vier-vlak "vlieënde-kapasitor" multivlak omsetter, wat van die FPGA gebaseerde digitale beheerder en die self-begin kragbron gebruik maak, word ook in die verslag bespreek.

M.Ing. / This study focuses its attention on conducted common mode EMI. Common mode current is the current that flows from an electrical circuit to a zero reference plane and back to the circuit again. It is known that the manner in which the common mode current flows is through stray capacitances that form between the electrical circuit and the zero reference. This study was aimed at developing a method to measure the value of the stray capacitance of a switching circuit. Determining the value of the stray capacitance by taking physical measurements on a circuit board is a challenge for a number of reasons, one of which is that great care should be taken not to add to the stray capacitance by means of the measuring equipment. By measuring the value of the stray capacitance, it will be possible to model the occurrence of Common Mode EMI better and more accurately. This could, in turn, lead to a reduction in EMI. Any body of an arbitrary shape, size and material exhibits a self-capacitance with respect to a zero reference frame. This principle, together with the principle of conservation of charge, also applies to electrical components, or circuits as a whole. The experimental work was performed on a buck DC-DC converter. The circuit was simplified to aid in analysis. By varying the value of an external capacitance and taking basic measurements, it is then possible to uniquely determine the absolute values of the self-capacitances. For every pair of external capacitance values placed in the circuit (of which one can be =0pF), a value for stray capacitance is calculated. Many data points were recorded with many different external capacitors in the circuit, resulting in a variety of stray capacitance values. In order to obtain a single value, a weighted mean of all the values was calculated. The values obtained in this proposed method of measuring the stray capacitance compares well with that obtained using the Finite Element Method. The advantage of the method presented here is that the self-capacitances are determined under the actual operational conditions, no specialised equipment is required and no unique handling of parasitics is needed. The method relies on very simple measurements and no complex data manipulations are required.