1 |
Differential Code-Shifted Reference Impulse-Radio Ultra-Wideband Receiver: Signal Strength Adjustment and ImplementationLiu, Mingwei 01 April 2014 (has links)
IR-UWB is a wireless system, which sends information data with pulses that have rapid rising and falling time and very short duration of nanosecond or less. However, due to varying communication channel conditions, amplitude of the received signal is not at a constant level. Therefore, automatic signal strength adjustment is required to equalize the impact of variations of the channel conditions.
In this thesis, two approaches based on automatic gain control technique are proposed. The first design is a feed-forward automatic gain control system working at baseband. The second design is a feedback automatic gain control system operating at radio or microwave frequency. The corresponding simulation and implementation results are provided to validate the designs. The proposed designs present signal strength controls for impulse-based transceiver systems which are not often addressed in the literature.
It is found that the first design does not work well in reality due to the fact that it essentially operates in the baseband and has no impact on the strong or weak signals right after the receiver antenna. The second design functions quite well and presents a dynamic range of 179mV to 1.062V. As a result, it is the choice of this thesis work.
|
2 |
Pulse Synchronization and Timing Recovery in Differential Code-Shifted Reference Impulse-Radio Ultra-Wideband (DCSR IR-UWB) SystemArabi, Tamim 25 April 2013 (has links)
Ultra-wideband (UWB) is a revolutionary radio communication system that utilizes a large portion of the frequency spectrum while maintaining low power levels and high data rates. UWB systems can be used both indoors and outdoors within the power-level masks regulated by the Federal Communications Commission, thus making the technology very versatile. One of the main advantages of UWB is its robustness to multi-path diversity. The technology has attracted the interests of research and industry alike, owing to the possibility of implementing low-power, low-complexity, and low-cost devices.
A widely recognized method of transmitting UWB signals is the use of Impulse Radio technology to transmit information. Impulse Radio Ultra-Wideband (IR-UWB) uses repetitive pulses of very short duration, low duty cycle, and low power levels within FCC regulations. One implementation of IR-UWB pulses in non-coherent transmission is the use of Differential Code-Shifted Reference (DCSR) pulses. In this technique, one of the main challenges at the receiver is pulse-level synchronization that times the received pulses at the right moments for accurate pulse detection.
This thesis will introduce two design proposals in attempt to achieve the pulse synchronization. The first proposal is based on a fast-switch-controlled integrator circuit, while the second focuses on the use of an active low pass filter and phase-locked loop circuits to achieve proper clock timing. Both proposals will be presented, together with schematics, computer-aided simulations, and lab tests results.
|
3 |
Differential Code-Shifted Reference Impulse-Radio Ultra-Wideband Receiver: Timing Recovery and Digital ImplementationAldubaikhy, Khalid 26 June 2012 (has links)
Ultra-wideband (UWB) is a wireless system which transmits signals across a much wider frequency spectrum than traditional wireless systems. The impulse radio (IR) UWB technique uses ultra-short duration pulses of nanoseconds or less. The objective of this thesis is to provide the design, implementation and testing of the timing recovery between the transmitter and receiver of the recently emerging differential code-shifted reference (DCSR) Impulse radio (IR) ultra-wideband (UWB) system. A new non-coherent energy detection based technique and its algorithm are proposed for timing recovery by means of a phase-locked loop (PLL) circuit. Simulations are presented first to verify the proposed algorithm. Then, it is implemented and tested in the Lattice ECP2 field-programmable gate array (FPGA) evaluation board with VHDL codes (a VHSIC hardware description language). The simulation and implementation results show that the proposed timing recovery scheme can be effectively achieved without much error.
|
Page generated in 0.0241 seconds