銅銦鎵硒薄膜太陽能電池因為其高效率及相對低廉的成本，商業應用已經開始陸續出現。我們自主研發的集成式銅銦鎵硒薄膜電池生產系統可以全程製作襯底大小為10cm x 10cm 的電池及剃型組件。本研究工作主要分為兩個方向:第一個方向是研究及測試生長高效率太陽能電池及組件的具體條件。通過儀器改進及電池每層鍍膜的條件優化，能夠重複的生長高效率電池及組件; 第二個方向是通過減少銅銦鎵硒吸光習的厚度從而達到降低電池生產成本的目的。 / 銅銦鎵硒採用三步共蒸法製備吸收層。第一步先蒸發銦、鎵、硒三種元素形成n型硒化銦(鎵)薄膜;第二步蒸發銅、硒形成銦鎵硒半導體薄膜; 第三步蒸發一層額外的型硒化銦(鎵)薄膜保證整體電池是p型半導體。三步期間的襯底溫度經過小心調試，以使得合適的鎵梯度能夠在吸收層裹形成。通過每一層的條件優化我們能夠生長出高光電轉換效率的太陽能電池(17%)及組件(12%)。 / 太陽能電池的變溫測試及弱光測試對瞭解其應用潛能存在非常重要的作用。通過多組對比實驗發現銅銦鎵硒電池的溫度係數可以通過增加鎵在吸收層的組分而得到改善。同時，電池的弱光表現可以通過減少銅的量得到很大的提高。STM 的研究發現弱光表現得到改善是因為吸收層顆粒介面電阻的增加而導致的。 / 減少吸收層的厚度有利於進一步減少太陽能電池的材料成本。當電池的吸收層厚度小於一微米時，開路電壓跟短路電流都明顯有所減少，從而導致太陽能電池效率降低。更薄電池效率的提高可以從兩個方面來實現:氧化鋅表面的陷光結構及更加合適的鎵含量的使用。通過這兩艇改進方法，電池效率被提高到14%以上，使得超薄電池有更好的應用前景。 / Cu(In,Ga)Se₂ (CIGS)-based thin film solar cell has been commercialized recently due to its high energy conversion efficiency. We have designed an integrated satellite deposition system for producing CIGS solar cell with substrate size of 10cm x 10cm. This work mainly contains two parts with first part focusing on growing and characterizing high quality baseline solar cells and solar modules and second part concentrating on further reducing the material costs by growing thinner absorber layer with high efficiency. / The most difficult part in growing high quality CIGS solar cells originate from the absorber layers which contain p-type chalcopyrite structures with four different elements: Cu, In, Ga and Se. The widely used three-stage process is employed to co-evaporate In, Ga and Se first, then Cu and Se are evaporated to form the chalcopyrite CIGS structure and additional In, Ga and Se are deposited in the end to ensure an overall Cu deficiency, which is important for getting p-type semiconductors. The substrate temperatures during these three stages are carefully adjusted to introduce proper gallium gradients which is important for collecting electrons efficiently. Together with optimizing other layers we are able to get cell efficiency (area around 0.5 cm²) over 17%. To produce CIGS mini-modules, laser scribing as well as mechanical scribing are employed for series interconnection of individual cells using monolithic integration. The power and speed of laser together with the condition of mechanical scriber are carefully adjusted to ensure a minimum dead area in the module. Module (area around 80 cm²) with efficiency over 12% is produced. / Solar cells were fabricated and tested under varied temperature and weak light conditions. Temperature coefficient is compared between CIGS solar cells and other types of solar cells. Temperature coefficient is improved a lot with higher gallium content in the absorber layer. Weak light performance is shown to be increased a lot when copper percentage is lowered down. In order to examine the origin of beneficial effects from Cu-poor absorber, solar cells are grown with comparable grain sizes using our technique and I-V performances are examined under STM in grain/atomic scale. Leakage current is found to be mainly originates from boundary area. CIGS solar cells with Cu-poor absorber benefit from the reduced leakage from boundary area. / CIGS solar cells with thinner absorber thickness are studied and compared with conventional CIGS solar cells. We have found that high conversion efficiency solar cells can be grown for absorber thickness as thin as 1.5μm. Further reduction in absorber thickness deteriorates solar cell performances in both V∝ and Jsc resulting in conversion efficiency as low as 11%. / Two major approaches are performed to improve solar cell performances. Light trapping by etching AZO top contact for creating pyramid-structures to enhance light scattering. Efficiency is increased by more than 1.5% for solar cells with etched AZO surfaces. Solar cells with efficiency larger than 13% can be grown by using AZO etching. Another approach is by using suitable Ga content in absorber layer. Solar cells with efficiency as high as 14.17% are grown which makes thinner CIGS solar cells very competitive. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Yang, Shihang = 高效率、低成本銅銦鎵硒薄膜太陽能電池的製造 / 楊世航. / Thesis (Ph.D.)--Chinese University of Hong Kong, 2012. / Includes bibliographical references (leaves 101-109). / Abstract also in Chinese. / Yang, Shihang = Gao xiao lu, di cheng ben tong yin jia xi bo mo tai yang neng dian chi de zhi zao / Yang Shihang. / Chapter 1 --- Introduction to Photovoltaics --- p.1 / Chapter 1.1 --- Energy crisis --- p.1 / Chapter 1.2 --- Physics of solar cells --- p.4 / Chapter 1.2.1 --- Light Absorption --- p.4 / Chapter 1.2.2 --- Charge Carrier Separation --- p.8 / Chapter 1.2.3 --- Solar Cell I-V Characteristics --- p.9 / Chapter 1.3 --- Classifications of Solar Cells --- p.11 / Chapter 1.3.1 --- Crystalline silicon solar cell --- p.11 / Chapter 1.3.2 --- Thin film solar cells --- p.12 / Chapter 1.3.3 --- Organic and polymer solar cells --- p.13 / Chapter 1.4 --- Cu(In,Ga)Se₂ (CIGS) based Solar Cells --- p.13 / Chapter 1.4.1 --- State of the art --- p.13 / Chapter 1.4.2 --- Material properties and structures --- p.14 / Chapter 1.4.3 --- CIGS advantages --- p.17 / Chapter 2 --- Integrated CIGS deposition system and fabrication process optimization --- p.21 / Chapter 2.1 --- Introduction to vacuum deposition system --- p.21 / Chapter 2.1.1 --- Integrated CIGS solar cell deposition system --- p.21 / Chapter 2.1.2 --- Ni-Al top grid evaporation system --- p.23 / Chapter 2.2 --- Fabrication processes --- p.23 / Chapter 2.2.1 --- Substrate treatment --- p.23 / Chapter 2.2.2 --- Molybdenum back contact deposition --- p.24 / Chapter 2.2.3 --- CIGS absorber layer formation --- p.26 / Chapter 2.2.4 --- Hetero-junction formation --- p.31 / Chapter 2.2.5 --- Window layer optimization --- p.32 / Chapter 2.2.6 --- Laser and mechanical scribing for mini-modules fabrication --- p.37 / Chapter 2.3 --- Equipment improvements --- p.42 / Chapter 2.3.1 --- Heating uniformity of substrate --- p.42 / Chapter 2.3.2 --- Use of pyrometer for improved control of absorber thickness/composition --- p.43 / Chapter 2.3.3 --- Se cracking unit --- p.45 / Chapter 2.4 --- Characterization of CIGS solar cells --- p.47 / Chapter 2.4.1 --- Morphology, composition and crystallinity --- p.47 / Chapter 2.4.2 --- Depth profile of CIGS --- p.49 / Chapter 2.4.3 --- Electrical property measurements --- p.51 / Chapter 2.5 --- Conclusion --- p.54 / Chapter 3 --- Performance of CIGS solar cells under non-standard test conditions --- p.56 / Chapter 3.1 --- Temperature coefficient measurement of CIGS --- p.57 / Chapter 3.1.1 --- Equipment set-up --- p.57 / Chapter 3.1.2 --- Temperature coefficients for different types of solar cells . --- p.60 / Chapter 3.1.3 --- CIGS solar cells with varied Ga/III composition --- p.65 / Chapter 3.2 --- Weak Light Performance of CIGS --- p.69 / Chapter 3.2.1 --- Introduction --- p.69 / Chapter 3.2.2 --- Experiment --- p.72 / Chapter 3.2.3 --- Results and discussion --- p.73 / Chapter 3.3 --- Conclusion --- p.81 / Chapter 4 --- CIGS solar cells with lower fabrication cost --- p.83 / Chapter 4.1 --- Fabrication cost analysis for commercial CIGS solar cells --- p.83 / Chapter 4.2 --- Thinner CIGS absorber layer --- p.84 / Chapter 4.2.1 --- Solar cell performances with different absorber thicknesses --- p.84 / Chapter 4.2.2 --- Performance improvement for thinner solar cell --- p.87 / Chapter 4.3 --- Conclusion --- p.96 / Chapter 5 --- Conclusion --- p.98 / Chapter 5.1 --- Summary of previous researches --- p.98 / Chapter 5.2 --- Future work --- p.99 / Bibliography --- p.101

Typescript (photocopy). / Digitized by Kansas Correctional Industries

Hu Mengna. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. / Includes bibliographical references (leaves 102-105). / Abstracts in English and Chinese. / Abstract --- p.ii / Acknowledgements --- p.iv / Table of Contents --- p.v / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- PEEC Modeling Method --- p.1 / Chapter 1.2 --- Overview of the work --- p.2 / Chapter 1.3 --- Original Contributions --- p.3 / Chapter 1.4 --- Organization of the thesis --- p.3 / Chapter Chapter 2 --- CLASSICAL PARTIAL ELEMENT EQUIVALENT CIRCUIT MODELING --- p.4 / Chapter 2.1 --- Introduction --- p.4 / Chapter 2.2 --- Mathematical Formulation in PEEC --- p.5 / Chapter 2.2.1 --- Basic Integral Equation --- p.5 / Chapter 2.2.2 --- Current and Charge discretization --- p.6 / Chapter 2.2.3 --- Galerkin Matching Method --- p.8 / Chapter 2.3 --- Partial Inductance --- p.10 / Chapter 2.3.1 --- General Formula for partial mutual inductance --- p.10 / Chapter 2.3.2 --- Mutual Inductance between two Thin Rectangular Tapes --- p.11 / Chapter 2.4 --- Partial Capacitance --- p.13 / Chapter 2.4.1 --- General Formula for partial mutual capacitance --- p.13 / Chapter 2.4.2 --- Mutual Capacitance Between Two Thin Rectangular Tapes --- p.16 / Chapter 2.5 --- Meshing Scheme --- p.17 / Chapter 2.6 --- Green's function --- p.20 / Chapter 2.6.1 --- Modification on free space Green's function through Ray-tracing technique --- p.20 / Chapter 2.6.2 --- Impact on partial inductance and partial capacitance --- p.22 / Chapter 2.7 --- PEEC Modeling of A LTCC 2.4GHz Band Pass Filter --- p.23 / Chapter 2.7.1 --- General Procedures to apply PEEC Modeling Method --- p.23 / Chapter 2.7.2 --- Numerical Results of a LTCC Band Pass Filter Modeling --- p.24 / Chapter 2.8 --- Summary --- p.27 / Chapter Chapter 3 --- GENERALIZED PEEC MODELING FOR PASSIVE COMPONENT OF IRREGULAR SHAPES --- p.29 / Chapter 3.1 --- Introduction --- p.29 / Chapter 3.2 --- Triangular meshing scheme in MoM --- p.30 / Chapter 3.2.1 --- Triangular meshing scheme adopted in MoM --- p.30 / Chapter 3.2.2 --- Spiral Inductor --- p.32 / Chapter 3.3 --- Generalized Meshing Scheme --- p.34 / Chapter 3.4 --- Mathematical Formulation in Enhanced PEEC --- p.39 / Chapter 3.4.1 --- Current and Charge discretization --- p.39 / Chapter 3.4.2 --- Enhanced Formulation for partial mutual inductance and capacitance --- p.41 / Chapter 3.4.3 --- Four-Dimensional Integration --- p.43 / Chapter 3.4.4 --- Gauss Numerical Integration --- p.44 / Chapter 3.4.5 --- Mixed Numerical and Analytical Technique --- p.47 / Chapter 3.5 --- Numerical Results from Enhanced PEEC Modeling Method --- p.50 / Chapter 3.5.1 --- Spiral Inductor --- p.50 / Chapter 3.5.2 --- High Pass Filter --- p.56 / Chapter 3.5.3 --- Design and Optimization of LTCC Diplexer --- p.60 / Chapter 3.6 --- Summary --- p.67 / Chapter Chapter 4 --- HIGH FREQUENCY PEEC --- p.69 / Chapter 4.1 --- Introduction --- p.69 / Chapter 4.2 --- Spatial Domain Green's Functions --- p.70 / Chapter 4.2.1 --- Full-wave Spectral Domain Green´ةs Functions --- p.70 / Chapter 4.2.2 --- Full-wave Spatial Domain Green，s functions --- p.72 / Chapter 4.3 --- Frequency-dependent Complex Partial Elements --- p.74 / Chapter 4.4 --- Numerical Results Of High-Frequency PEEC Modeling Method --- p.79 / Chapter 4.4.1 --- Numerical Discussion of Complex Image Method --- p.75 / Chapter 4.4.2 --- Microstrip Filter --- p.84 / Chapter 4.4.3 --- Patch Antenna --- p.84 / Chapter 4.5 --- Summary --- p.87 / Chapter Chapter 5 --- CONCLUDING REMARKS --- p.88 / Chapter 5.1 --- Two Enhancements in PEEC Modeling --- p.88 / Chapter 5.2 --- Limitations of Enhanced PEEC Modeling --- p.90 / Chapter 5.3 --- Future Work --- p.90 / APPENDIX --- p.92 / REFERENCE --- p.102

by Cheng Wang-tung. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. / Includes bibliographical references (leaves 97-99). / Abstracts in English and Chinese. / Abstract --- p.i / 摘要 --- p.i / Acknowledgements --- p.ii / Table of Contents --- p.iii / List of Figures --- p.vii / List of Tables --- p.xi / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Motivations --- p.1 / Chapter 1.2 --- Objective --- p.4 / Chapter 1.3 --- Outline --- p.4 / Chapter Chapter 2 --- Quadrature ΣΔ Modulator for A/D Conversion --- p.5 / Chapter 2.1 --- Introduction --- p.5 / Chapter 2.2 --- Oversampling ΣΔ Converter --- p.6 / Chapter 2.3 --- Theory of ΣΔ modulation --- p.6 / Chapter 2.3.1 --- Quantization noise --- p.7 / Chapter 2.3.2 --- Oversampling --- p.8 / Chapter 2.3.3 --- Noise Shaping --- p.9 / Chapter 2.3.4 --- Performance Parameter --- p.11 / Chapter 2.3.5 --- Circuit Design of ΣΔ modulator --- p.11 / Chapter 2.3.6 --- Case Study --- p.12 / Chapter 2.3.6.1 --- Transfer Function --- p.12 / Chapter 2.3.6.2 --- Noise Analysis of First Order ΣΔ Modulator --- p.13 / Chapter 2.3.6.3 --- Circuit Level Implementation: --- p.14 / Chapter 2.4 --- Choice of Architecture: Lowpass or Bandpass? --- p.15 / Chapter 2.5 --- I/Q Modulation and Image Rejection --- p.18 / Chapter 2.5.1 --- Quadrature signal --- p.18 / Chapter 2.5.2 --- I/Q Modulation --- p.19 / Chapter 2.6 --- Image Rejection in SC ΣΔ Complex Topology --- p.21 / Chapter 2.6.1 --- High Level Simulation --- p.23 / Chapter 2.6.2 --- Discussion --- p.26 / Chapter 2.7 --- Summary --- p.27 / Chapter Chapter 3 --- Capacitor Sharing Architecture --- p.28 / Chapter 3.1 --- Introduction --- p.28 / Chapter 3.2 --- Proposed mismatch free SC complex ΣΔ Modulator --- p.28 / Chapter 3.2.1 --- Principle of Operation --- p.30 / Chapter 3.3 --- Justification of the Proposed Idea --- p.35 / Chapter 3.4 --- Summary --- p.37 / Chapter Chapter 4 --- Transistor Level Circuit Design --- p.39 / Chapter 4.1 --- Introduction --- p.39 / Chapter 4.2 --- Design of ΣΔ Modulator --- p.39 / Chapter 4.2.1 --- Specification of ΣΔ Modulator --- p.40 / Chapter 4.3 --- Design of Operational Amplifier --- p.45 / Chapter 4.3.1 --- Folded-cascode Operational Amplifier --- p.45 / Chapter 4.3.2 --- Common Mode feedback --- p.47 / Chapter 4.3.3 --- Bias Circuit --- p.49 / Chapter 4.3.4 --- Simulation Results --- p.50 / Chapter 4.4 --- Design of Comparator --- p.54 / Chapter 4.4.1 --- Regenerative Feedback Comparator --- p.54 / Chapter 4.4.2 --- Simulation Results --- p.55 / Chapter 4.5 --- Design of Clock Generator --- p.56 / Chapter 4.5.1 --- Non-Overlapping clock generation --- p.57 / Chapter 4.5.2 --- Simulation Results --- p.58 / Chapter 4.6 --- Simulation Results of ΣΔ Modulator --- p.59 / Chapter 4.7 --- Simulation Results --- p.61 / Chapter 4.7.1 --- Proposed Architecture --- p.62 / Chapter 4.7.2 --- Traditional Architecture --- p.62 / Chapter 4.8 --- Summary --- p.63 / Chapter Chapter 5 --- Layout Considerations and Post-Layout Simulation --- p.65 / Chapter 5.1 --- Introduction --- p.65 / Chapter 5.2 --- Common-Centroid Structure --- p.65 / Chapter 5.3 --- Shielding Technique --- p.67 / Chapter 5.3.1 --- Shielding of device by substrate --- p.67 / Chapter 5.3.2 --- Floor Planning --- p.68 / Chapter 5.4 --- Layout of Power Rail --- p.69 / Chapter 5.5 --- Layout and Post-Layout Simulation of OpAmp --- p.70 / Chapter 5.6 --- Layout and Post-Layout Simulation --- p.74 / Chapter 5.6.1 --- Proposed Architecture --- p.75 / Chapter 5.6.2 --- Traditional Architecture --- p.77 / Chapter 5.7 --- Summary --- p.79 / Chapter Chapter 6 --- Measurement Results --- p.81 / Chapter 6.1 --- Introduction --- p.81 / Chapter 6.2 --- Considerations of PCB Design --- p.82 / Chapter 6.3 --- Measurement Setup --- p.83 / Chapter 6.4 --- Measurement Results --- p.85 / Chapter 6.4.1 --- Measurement Results of Proposed Architecture --- p.85 / Chapter 6.5 --- Summary --- p.92 / Chapter Chapter 7 --- Conclusion --- p.95 / Chapter 7.1 --- Conclusion --- p.95 / Chapter 7.2 --- Future Works --- p.96 / References --- p.97 / Appendix --- p.100 / Chapter A.1 --- Publications --- p.100 / Chapter A.2 --- Schematic of proposed front end --- p.101 / Chapter A.3 --- Schematic of SC ΣΔ modulator --- p.102 / Chapter A.4 --- Schematic of the folded-cascode amplifier --- p.103 / Chapter A.5 --- Schematic of biasing circuit --- p.104 / Chapter A.6 --- Schematic of preamplifier in comparator --- p.105 / Chapter A.7 --- Schematic of latched part in comparator --- p.106 / Chapter A.8 --- Schematic of the clock generator --- p.107

Tsang Siu Hing, Bon. / "Architecture Department, Chinese University of Hong Kong, Master of Architecture Programme 2002-2003, design report." / Includes bibliographical references (leaf 48).

Yim, Ho Yan. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2007. / Includes bibliographical references (leaves 125-128). / Abstracts in English and Chinese. / Abstract --- p.ii / 論文摘要 --- p.iv / Acknowledgement --- p.vi / Table of Content --- p.vii / List of Figures --- p.x / List of Tables --- p.xiv / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Filter --- p.3 / Chapter 1.2 --- Antenna --- p.4 / Chapter 1.3 --- Outline of the Thesis --- p.6 / Chapter Chapter 2 --- Basic Theories in Filter and Patch Antenna Design --- p.7 / Chapter 2.1 --- Microwave Filter Design --- p.7 / Chapter 2.1.1 --- Transfer Functions --- p.8 / Chapter 2.1.2 --- Lowpass Prototype Filters and Elements --- p.14 / Chapter 2.1.3 --- Filter Transformations --- p.18 / Chapter 2.1.4 --- Admittance Inverter --- p.21 / Chapter 2.2 --- Antenna Concepts --- p.23 / Chapter 2.2.1 --- Microstrip Antenna --- p.23 / Chapter 2.2.2 --- Patch Antenna Design --- p.24 / Chapter 2.2.3 --- Polarization --- p.28 / Chapter Chapter 3 --- Review of Conventional Dual-band Filter Designs --- p.33 / Chapter 3.1 --- Bandstop / bandpass Filters in a Cascade Connection --- p.33 / Chapter 3.2 --- Stepped Impedance Resonator --- p.34 / Chapter 3.3 --- Tunable Transmission Zero for Spurious Responses Suppression --- p.36 / Chapter 3.4 --- Comparison --- p.38 / Chapter Chapter 4 --- Novel Dual-band Filter Design with Equal Bandwidth --- p.39 / Chapter 4.1 --- Introduction --- p.39 / Chapter 4.2 --- Frequency Behavior of Shunt Stubs --- p.39 / Chapter 4.3 --- Dual-band Resonator with Paralleled Stubs --- p.42 / Chapter 4.4 --- Dual-band Admittance Inverter --- p.47 / Chapter 4.5 --- Dual-band Filter Realization --- p.51 / Chapter 4.5.1 --- Simulation Examples --- p.54 / Chapter 4.5.2 --- Comparison of Simulation results --- p.60 / Chapter 4.5.3 --- Experimental Results --- p.64 / Chapter Chapter 5 --- Novel Dual-band Filter Design with Unequal Bandwidth --- p.70 / Chapter 5.1 --- Introduction --- p.70 / Chapter 5.2 --- Dual-band Resonator using Step-Impedance Line --- p.70 / Chapter 5.3 --- Dual-band Admittance Inverter --- p.74 / Chapter 5.4 --- Dual-band Filter Realization --- p.75 / Chapter 5.4.1 --- Comparison of Simulation Results --- p.81 / Chapter 5.4.2 --- Experimental Results --- p.85 / Chapter Chapter 6 --- Review of Conventional CP Antenna Designs --- p.91 / Chapter 6.1 --- Degenerated Mode Patch --- p.91 / Chapter 6.2 --- CP Stacked Microstrip Patch Antenna Array --- p.92 / Chapter 6.3 --- Coplanar Waveguide-fed Slot Antenna --- p.93 / Chapter 6.4 --- Dual-band CP antenna fed by 2 different 90° hybrid couplers --- p.95 / Chapter Chapter 7 --- Novel New Dual-band CP Antenna Design --- p.96 / Chapter 7.1 --- Introduction --- p.96 / Chapter 7.2 --- Dual-band CP Patch Antenna --- p.96 / Chapter 7.2.1 --- Slotted Square Patch Antenna --- p.96 / Chapter 7.2.2 --- Slotted Cross Patch Antenna --- p.99 / Chapter 7.2.3 --- Simulation Results: Slotted Cross Patch Antenna --- p.101 / Chapter 7.3 --- Dual-band Quadrature Hybrid --- p.104 / Chapter 7.3.1 --- Simulation Results: Dual-band Hybrid Coupler --- p.107 / Chapter 7.4 --- Dual-band CP Antenna Realization --- p.113 / Chapter 7.4.1 --- Antenna Configuration --- p.113 / Chapter 7.4.2 --- Measurement Setup --- p.114 / Chapter 7.4.3 --- Experimental Results --- p.115 / Chapter Chapter 8 --- Conclusions and Recommendations for Future Work --- p.123 / Chapter 8.1 --- Filter --- p.123 / Chapter 8.2 --- Antenna --- p.123 / Chapter 8.3 --- Recommendations for future work --- p.124 / References --- p.125 / Author's Publications --- p.128 / Acronyms and Abbreviations --- p.129

虛擬現實（VR）為用家提供了一個結合了人工場境和現實世界的練習環境。隨著在醫療，軍事和娛樂行業日益增長的需求，虛擬現實化的設備將會越來越受歡迎。頭戴式顯示器（HMD）是一種利用自由曲面的光學棱鏡，以投射由微型顯示器顯示的圖像，讓用家能夠在近距離觀看和體驗虛擬環境的產品。 / 頭戴式顯示器由兩個基本部分組成，液晶顯示屏和一個光學元件，以能夠在很短的距離顯示圖像到用家的眼睛。光學自由曲面棱鏡在HMD研究中是一個主要的課題。設計的棱鏡需要運用大多數的光學理論和一些商業光學設計軟件的輔助。在市場，只有有限的光學軟件能深入地協助設計光學元件和系統。同時，成本高昂和不容易使用的光學軟件令到光學設計並不普及的原因。在下面的部分將用光學軟件ZEMAX去驗證每個設計。 / 自由曲面棱鏡的幾何形狀設計是為構建一個頭盔顯示器的關鍵問題。通常情況下，頭盔內自由曲面棱鏡由三面特別設計的非球面表面而組成。源圖像經過三個非球面反映後，可參照圖6，將圖像投射到人類視網膜上而形成圖像。棱鏡上的三個面的互相協調將是一個具有挑戰性的問題。 / 跟據現有的產品和研究分析，研發了一種新風格的棱鏡。在這篇論文中，由射線追踪和光學理論的幫忙，建議了一款凸-平棱鏡作HMD上的光學棱鏡。利用光學設計軟件分析和優化以追求一個可穿戴和低像差的光學棱鏡作目標。光學棱鏡中有兩個面為平面，因此光線能在棱鏡中穩步地轉化，從而，降低光學系統的像差。製作了經優化表面定位的原型，雖然原型是成本低，但它們比半透明的鏡子有一個更好的分辨率。在新設計的一個HMD上，一個廣闊和清晰的圖像將顯示。 / Virtual reality (VR) provides an artificial environment to user for practicing under a synthetic environment which merges the real world with artificial scene. In response to the growing demand in medical, military and entertaining application, devices that can simulate VR will become more and more popular. Head mounted display (HMD) is a kind of wearable products that utilize freeform optical prisms to project images generated by microdisplays, enabling users to situate in virtual environments. / HMD has two basic components, a LCD and an optical element, to display image to naked eye in a short distance. An optical freeform prism will be a main research topic in HMD. To design the prism will require substantial knowledge in optical theory and the aid of some commercial optical design software. In the market, there is limited number of software for in depth optical analysis. Meanwhile, costly and not user-friendly software is a problem of unpopularity of optical design. Zemax has been used for verifying the each design in the below sections. / The design of geometric shape for the freeform prism is crucial for constructing a HMD. Typically, the freeform prisms inside HMD comprise of 3 specially designed aspherical surfaces. The source image is reflected by those three surfaces to form image on human retina. The interplay of three surfaces will is the main challenging problem. With the analysis of existing products and researches, a new-style prism is proposed. In this thesis, with the aid of ray tracing and optical theory, a convex-plano prism is developed. / Analyses of optical design software and optimization are utilized to pursue the goal of wearable and low aberration HMD optical prism. Prototypes with the optimized surfaces alignment are fabricated. With two flat surfaces on the prism, the rays translate steadily in the prism. Hence, the optical system’s aberration is reduced. Although the prototypes are low cost, they have a better resolution than half-transparent mirror. Also a wide and clear image will show on the new style see-through HMD. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Ho, Pui Lam. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2012. / Includes bibliographical references (leaves 57-59). / Abstracts also in Chinese. / Abstract --- p.i / Abstract (Chinese) 摘要 --- p.iii / Acknowledgement --- p.iv / List of Figure and Table --- p.vii / Paper published --- p.xi / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Overview on Near Eye Display (NED) --- p.1 / Chapter 1.2 --- Literature Review on HMD --- p.1 / Chapter 1.3 --- Motivation and Research Objective --- p.7 / Chapter 1.4 --- Thesis Outline --- p.8 / Chapter Chapter 2 --- Fundamental Design Concept --- p.9 / Chapter 2.1 --- Prism --- p.9 / Chapter 2.2 --- Convex Lens --- p.11 / Chapter 2.3 --- Combination of Convex lens and Regular Prism --- p.12 / Chapter Chapter 3 --- Optical Design Analysis by Software Package --- p.16 / Chapter 3.1 --- Surface Alignment --- p.16 / Chapter 3.2 --- Distortion --- p.18 / Chapter 3.3 --- MTF --- p.19 / Chapter 3.4 --- Image Simulation --- p.20 / Chapter 3.5 --- Aberration analysis --- p.21 / Chapter 3.6 --- Aspherical surface --- p.22 / Chapter Chapter 4 --- Design Principle and Procedure --- p.26 / Chapter 4.1 --- Basic Criteria --- p.26 / Chapter 4.2 --- See-throughPurpose --- p.27 / Chapter 4.3 --- Material --- p.28 / Chapter 4.4 --- SurfacesAlignment --- p.29 / Chapter 4.5 --- Compensator --- p.30 / Chapter 4.6 --- Angle Alignment --- p.30 / Chapter Chapter 5 --- System Efficiency --- p.32 / Chapter 5.1 --- System Efficiency --- p.32 / Chapter 5.2 --- System Analysis --- p.35 / Chapter Chapter 6 --- Prototype Fabrication and Testing --- p.38 / Chapter 6.1 --- Display System --- p.38 / Chapter 6.2 --- Monocular Configurations --- p.39 / Chapter 6.3 --- Prototypes Building --- p.40 / Chapter 6.4 --- Advantages --- p.54 / Chapter 6.5 --- Limitation --- p.54 / Chapter Chapter 7 --- Conclusions and Future Work --- p.55 / Chapter 7.1 --- Conclusions --- p.55 / Chapter 7.2 --- Future work --- p.55 / Reference --- p.57 / Appendix --- p.60 / Chapter Appendix 1 --- Background Theory --- p.60 / Chapter A1.1 --- Optical Theory --- p.60 / Chapter A1.2 --- Matrix Method --- p.65 / Chapter A1.3 --- Human Vision --- p.66 / Chapter Appendix 2 --- Simulation of reflection --- p.67 / Chapter Appendix 3 --- Aberration analysis of prisms --- p.70 / Chapter Appendix 4 --- Specification --- p.71

在過去的幾十年中，無線通信已經歷了顯著的發展，並成為日常生活中必不可少的一部分。隨著對可移動便攜式電子設備的需求不斷增加，功耗已经成為射頻前端電路設計的一個最關鍵參數。在便攜式無線消費類電子中，頻率綜合器在收发机设计中提供本地振盪器（LO），它又是一個高功耗的子系統之一。降低頻率綜合器的功耗將會直接影响電池的使用時間。 / 為了驗證進來新型的低功耗技术，本文基於低成本的0.18微米三阱CMOS工藝，設計並實現了三個不同的電路模塊和一個頻率綜合器系統。第一個設計是一個低壓正交壓控振盪器(QVCO)和除肆分頻器的電流復用電路。在沒有損耗電壓餘量的情況下，兩個高頻模塊通過電流復用的方式，從而降低了功耗。測試結果顯示當電源電壓為1.3V ，電流消耗電流為2.7毫安。在2.2 GHz載波附近1MHz頻偏位置上的相位噪聲為 -114 dBc/Hz。第二個設計是應用於SDR的變壓器和電流復用的壓控振盪器/分頻器的電路。該電路通過調整偏置電壓，僅用一個分頻器就可以實現可變分頻比（2，3，…,9）的功能。實驗結果表明，分頻器的輸出頻率範圍從0.58至3.11 GHz，在5.72 GHz載波附近1MHz頻偏位置上的相位噪聲為-112.5 dBc / Hz，電源電壓為1.8V時，電流為4.7mA。第三個設計是應用於UWB的變壓器和電流復用的QVCO / SSBM電路。這個全新的結構電路面積為0.8平方毫米，在1.6V電源電壓下，消耗功耗約為11 mA。測量結果表明，帶外雜散抑制小於43dBc，頻率偏移1MHz位置處的相位噪聲小於-112 dBc/Hz。最後一個設計是應用於 MB-OFDM UWB的頻率綜合器。這個新結構只用了一個電感在不犧牲主要性能的情況下，可以實現小的芯片尺寸和低的功耗。測試結果全部基於UWB的頻段，相位噪聲為-119 dBc/Hz@10 MHz，電源電壓1.2 V，總電流消耗為24.7mA。 / Over the past decades, wireless communication has experienced a remarkable development and become an essential part of daily life. With the rapid increasing demand for mobile and portable electronic devices, the power dissipation has become one of the most critical design parameters, especially for RF front-ends. In portable wireless consumer electronics, the RF frequency synthesizer is one of the most power-consuming subsystems, which serves as local oscillator (LO) in transceiver design. Any power saving in frequency synthesizer will directly affect the running time of battery. / To demonstrate recent innovation in low power techniques, three different circuit blocks and one frequency synthesizer have been developed and fabricated in low-cost 0.18μm triple-well CMOS process. The first design is a low-voltage current reused quadrature VCO and divider-by-4 frequency divider circuit. By the novel sharing of transistors between the two high frequency blocks, the power consumption of the overall design can be reduced with little penalty on voltage headroom. Experimental results show a phase noise level of -114 dBc/Hz at 1 MHz offset from 2.2 GHz carrier and consumes 2.7 mA from a 1.3V power supply. The second design is a transformer-based current reused VCO/ILFD circuits for SDR application. By the adoption of bias tuning techniques, variable division ratios (2,3,…,9) can be achieved with a single divider circuit. Experimental results show an output frequency ranging from 0.58 to 3.11 GHz and a phase noise level of -112.5 dBc/Hz at 1 MHz offset from 5.72 GHz carrier, with a consumed current of 4.7 mA from a 1.8V power supply. The third design is a transformer-based current-reused QVCO/SSBM circuit for UWB application. The prototype is the first of its kind, while occupies a core area of 0.8 mm² and consumes roughly 11 mA from 1.6V power supply. Measurement results show that the out-of-band spurious rejection and phase noise at 1 MHz offset are better than 43 dBc and -112 dBc/Hz respectively. The final design is a frequency synthesizer for MB-OFDM UWB application. It uses a single inductor approach and novel system architecture to realize compact die size and low power consumption without sacrificing major performance. Experimental results show a phase noise level of -119 dBc/Hz@10 MHz offset for all UWB bands and consumes 24.7 mA from a 1.2 V power supply. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Li, Wei. / Thesis (Ph.D.)--Chinese University of Hong Kong, 2013. / Includes bibliographical references. / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese. / Abstract --- p.i / Acknowledgement --- p.v / Table of Contents --- p.vi / List of Figures --- p.xi / List of Table --- p.xvi / Chapter CHAPTER 1 --- INTRODUCTION --- p.1 / Chapter 1.1 --- Motivation --- p.1 / Chapter 1.2 --- Outline of Dissertation --- p.3 / References --- p.5 / Chapter CHAPTER 2 --- A NOVEL LOW-VOLTAGE CURRENT REUSED, QUADRATURE VCO AND DIVIDE-BY-4 FREQUENCY DIVIDER --- p.6 / Chapter 2.1 --- Introduction --- p.6 / Chapter 2.2 --- Oscillation Principle of VCO --- p.9 / Chapter 2.3 --- Circuit Implementation --- p.14 / Chapter 2.3.1 --- Back-gate Coupled QVCO --- p.14 / Chapter 2.3.2 --- Divider-by-4 Frequency Divider --- p.20 / Chapter 2.3.3 --- Current Reuse QVCO and Frequency Divider --- p.24 / Chapter 2.3.3.1 --- Voltage Headroom --- p.25 / Chapter 2.3.3.2 --- Startup Condition --- p.26 / Chapter 2.3.3.3 --- Operating Range --- p.27 / Chapter 2.3.3.4 --- Phase Noise --- p.28 / Chapter 2.3.3.5 --- Transient Response --- p.30 / Chapter 2.4 --- Experimental Result --- p.31 / Chapter 2.4.1 --- Frequency Tuning Range --- p.32 / Chapter 2.4.2 --- Phase Noise --- p.33 / Chapter 2.4.3 --- Transient Response --- p.34 / Chapter 2.4.4 --- Performance Comparison --- p.34 / Chapter 2.5 --- Summary --- p.36 / Reference --- p.36 / Chapter CHAPTER 3 --- A TRANSFORMER BASED CURRENT REUSED VCO/ILFD CIRCUIT WITH VARIABLE DIVIDING RATIOS --- p.41 / Chapter 3.1 --- Introduction --- p.41 / Chapter 3.2 --- Transformer Design --- p.43 / Chapter 3.2.1 --- Ideal Transformer --- p.43 / Chapter 3.2.2 --- Transformer Tank --- p.45 / Chapter 3.3 --- Design of Current Reused VCO/ILFD --- p.49 / Chapter 3.3.1 --- Transformer Implement --- p.50 / Chapter 3.3.2 --- VCO Implement --- p.52 / Chapter 3.3.3 --- ILFD Implement --- p.54 / Chapter 3.4 --- Experiment Results --- p.60 / Chapter 3.4.1 --- Phase Noise --- p.61 / Chapter 3.4.2 --- Frequency Tuning Range --- p.62 / Chapter 3.4.3 --- Transient Response --- p.64 / Chapter 3.4.4 --- Performance Comparison --- p.65 / Chapter 3.5 --- Summary --- p.66 / Reference --- p.66 / Chapter CHAPTER --- 4 CURRENT REUSED QVCO/SSBM CIRCUIT FOR MB-OFDM UWB FREQUENCY SYNTHESIZER --- p.70 / Chapter 4.1 --- Introduction --- p.70 / Chapter 4.2 --- Proposed solution for UWB frequency synthesizer --- p.72 / Chapter 4.3 --- Bimodal Oscillation Phenomenon --- p.74 / Chapter 4.4 --- Design of Current Reused QVCO/SSBM Circuit --- p.81 / Chapter 4.4.1 --- Transformer Implementation --- p.82 / Chapter 4.4.2 --- QVCO Implementation --- p.85 / Chapter 4.4.3 --- SSBM Implementation --- p.88 / Chapter 4.5 --- Experimental Results --- p.89 / Chapter 4.5.1 --- Phase Noise --- p.91 / Chapter 4.5.2 --- Spur Suppression --- p.92 / Chapter 4.5.3 --- Performance Comparison --- p.93 / Chapter 4.6 --- Summary --- p.94 / Reference --- p.95 / Chapter CHAPTER 5 --- A SINGLE INDUCTOR APPROACH TO THE DESIGN OF LOW-VOLTAGE MB-OFDM UWB FREQUENCY SYNTHESIZER --- p.98 / Chapter 5.1 --- Introduction --- p.98 / Chapter 5.2 --- Frequency Synthesizer Background --- p.101 / Chapter 5.2.1 --- General Consideration --- p.101 / Chapter 5.2.1.1 --- Frequency Requirement --- p.102 / Chapter 5.2.1.2 --- Phase Noise --- p.103 / Chapter 5.2.1.3 --- Spurious Tones --- p.104 / Chapter 5.2.1.4 --- Switching Time --- p.105 / Chapter 5.2.2 --- Overview of MB-OFDM UWB Frequency Synthesizer --- p.105 / Chapter 5.3 --- Frequency Synthesizer System Design --- p.109 / Chapter 5.3.1 --- Proposed Frequency synthesizer Architecture --- p.109 / Chapter 5.3.2 --- Stability Analysis --- p.111 / Chapter 5.3.3 --- Phase Noise Contribution --- p.115 / Chapter 5.4 --- Circuit Implementation --- p.121 / Chapter 5.4.1 --- Current Reused Multiplier/SSBM --- p.121 / Chapter 5.4.2 --- 12-Phase Cross-coupled Ring VCO --- p.128 / Chapter 5.4.3 --- Regenerative Frequency Divider --- p.131 / Chapter 5.4.4 --- Tri-mode Phase Calibration Buffer --- p.132 / Chapter 5.4.5 --- Phase-Frequency Detector(PFD) --- p.134 / Chapter 5.4.6 --- Charge Pump --- p.135 / Chapter 5.4.7 --- CML Divider --- p.136 / Chapter 5.5 --- Experimental Result --- p.137 / Chapter 5.5.1 --- Frequency Tuning Range --- p.139 / Chapter 5.5.2 --- Phase Noise --- p.140 / Chapter 5.5.3 --- Spur Suppression --- p.141 / Chapter 5.5.4 --- Performance Comparison --- p.142 / Chapter 5.6 --- Summary --- p.143 / Reference --- p.143 / Chapter CHAPTER 6 --- CONCLUSIONS AND FUTURE WORKS --- p.147 / Chapter 6.1 --- Conclusions --- p.147 / Chapter 6.2 --- Future Works --- p.149 / List of Publication --- p.150

在現代通信系統，無線服務的需求不斷增加，帶動了通信系統，支持多標準的操作需要。 雙波段或多波段操作幾乎都是必要的，能夠提供這些操作的微波器件已成為減小尺寸和降低成本有吸引力的解決方案。 / 分支線耦合器是用於微波和毫米波應用的最流行的無源電路之一。它們通常用於平衡放大器和混頻器去實現良好的回波損耗以及隔離。其中一個至關重要的部份是設計一個可以靈活作多波段分配的分支線耦合器。 / 傳統上，完全平面的實施，雙波段分支線耦合器可以通過短截線，階梯阻抗線，耦合線等不同的分佈式結構實現。不同的設計方案已在這幾年來出現。窄帶操作和複雜的電路設計，是以前的設計的主要缺點。雖然，在理論上，多節技術可以拓寬帶寬，但它的主要缺點是電路的面積變大了及使用極端低/高傳輸線阻抗。因此，它不是一個大量和低成本生產的解決方案。 / 在這項研究中，設計了全新的並增強了性能的雙波段分支線耦合器(零分貝和三分貝的功率分裂)。這些設計能在兩個指定的頻帶有不平等的工作帶寛。通過正確選擇雙頻四分之一波長阻抗變換器的電氣長度和線路阻抗，傳輸相位斜率將能夠被控制並給出帶寬不對稱的特點，其性能可以進一步擴展，涵蓋了廣泛的應用。 / 以上所有設計都只需要單層線路版的制作及可實現的傳輸線阻抗。應用奇/偶模式分析所給出設計公式。這些設計具有低損耗，佈局靈活，緊密的尺寸大小的特性。這些設計己經使用標準微帶的結構實現其特點，其結果得到了實驗結果的進一步驗證。分支線耦合器只需要更小的節數就能實現相同的性能。 / In modern communication systems, the increasing demand for wireless services has driven the need for communication systems that support multi-standard operations. Dual-/Multi- band operation is almost a necessity and the adoption of microwave multi-band devices has become an attractive solution towards size and cost reduction of RF frontend designs. / Branch-line coupler is one of the most popular passive circuits used for microwave and millimeter-wave applications. They are commonly used in balanced amplifiers, phase-shifter, mixer and frequency multipliers for achieving good return loss, as well as isolation. It is therefore essential to have a branch-line coupler with multi-band operation. / Traditionally, for fully planar implementation, the construction of dual-band branch-line couplers are usually accomplished by distributed structures based upon shunt-stub, stepped-impedance line, coupled line etc. Narrow-band operation and circuit complexity are the major drawbacks for these previous designs. Although, in theory, the available bandwidth may be broadened by multi-section configurations, its major tradeoffs are the enlarged circuit size as well as the extreme line dimensions involved. Therefore, it is not preferable to mass and low cost production. / In this research, advanced designs of dual-band branch-line coupler (0 dB and 3 dB power splitting) with enhanced performances are presented. By proper selection of the number of sections, electrical lengths and line impedances of appropriate branch-lines of the coupler, its performance can be further extended to cover a wide range of applications. / All the proposed circuits require only single-layer fabrication and realizable line impedance. Closed form design formulas are made available by the application of even/odd- mode formulation. They feature low loss, flexible layout and compact size. The designs have been implemented and characterized using standard microstrip, and verified experimentally. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Yeung, Sung. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2012. / Includes bibliographical references (leaves 92-95). / Abstracts also in Chinese. / Abstract --- p.ii / 摘要 --- p.iii / Acknowledgement --- p.iv / Table of Content --- p.v / Lists of Figures --- p.viii / Lists of Tables --- p.xii / Chapter Chapter 1 --- : Introduction --- p.1 / Chapter 1.1 --- Research Motivation and Objective --- p.1 / Chapter 1.2 --- Original Contribution --- p.3 / Chapter 1.3 --- Research Approach, Assumptions and Limitations --- p.4 / Chapter 1.4 --- Overview of the Thesis Organization --- p.5 / Chapter Chapter 2 --- : Review of Microwave Coupler Design --- p.6 / Chapter 2.1 --- Coupler Design Fundamental --- p.6 / Chapter 2.1.1 --- Coupler Design with Equal Power Splitting --- p.7 / Chapter 2.1.2 --- Coupler Design with Unequal Power Splitting --- p.12 / Chapter 2.1.3 --- 0-dB Coupler or Crossover --- p.16 / Chapter 2.1.4 --- Coupler Design with Size Miniaturization --- p.18 / Chapter 2.1.5 --- Wide Band Coupler Design --- p.21 / Chapter 2.2 --- Dual-Band and Multi-Band Branch-line Coupler --- p.25 / Chapter 2.2.1 --- Dual-Band Couplers Based on Composite Right/Left-Handed Transmission Line --- p.25 / Chapter 2.2.2 --- Dual-Band Couplers with Shunt Stubs --- p.28 / Chapter 2.2.3 --- Dual-Band Coupler Based on Stepped-Impedance-Stub-Line --- p.30 / Chapter 2.2.4 --- Dual-Band Coupler with Port Extensions --- p.33 / Chapter 2.2.5 --- Tri-Band Coupler Based on Matching Network --- p.35 / Chapter 2.2.6 --- Multi-passband Branch-line Coupler Design --- p.37 / Chapter 2.3 --- Summary --- p.39 / Chapter Chapter 3 --- : A Novel Dual-band 0-dB Branch-line Coupler Design --- p.40 / Chapter 3.1 --- Proposed Circuit --- p.40 / Chapter 3.2 --- Analysis of Single-band 0-dB Branch-line Coupler --- p.43 / Chapter 3.3 --- Single- to Dual-band Conversion --- p.52 / Chapter 3.4 --- Experimental Results --- p.55 / Chapter 3.5 --- Summary --- p.58 / Chapter Chapter 4 --- : A Novel Dual-band 3-dB Branch-line Coupler with Unequal Bandwidth --- p.59 / Chapter 4.1 --- Proposed Dual-band Impedance Transformer: --- p.59 / Chapter 4.2 --- Single-band 3-dB Coupler Design --- p.65 / Chapter 4.3 --- Dual-band 3-dB Coupler Design --- p.70 / Chapter 4.4 --- Experimental Results --- p.76 / Chapter 4.4.1 --- Equal bandwidth design --- p.76 / Chapter 4.4.2 --- Unequal bandwidth design --- p.78 / Chapter 4.5 --- Summary --- p.81 / Chapter Chapter 5 --- : A Novel Dual-band 0-dB Branch-line Coupler Design with Unequal Bandwidth --- p.82 / Chapter 5.1 --- Proposed Circuit --- p.82 / Chapter 5.2 --- Analysis and Formulation --- p.84 / Chapter 5.3 --- Simulation Results --- p.85 / Chapter 5.4 --- Experimental Results --- p.87 / Chapter 5.5 --- Summary --- p.89 / Chapter Chapter 6 --- : Conclusion and Recommendation for Future Work --- p.90 / Chapter 6.1 --- Conclusion --- p.90 / Chapter 6.2 --- Recommendation for future work --- p.91 / References --- p.92 / Author’s Publications --- p.96 / Chapter Appendix 1: --- Brief Summary of Design Approaches of Hybrids Couplers --- p.97 / Chapter Appendix 2: --- Transformation between S- and ABCD- parameters for two-port network --- p.99

Qian, Zaichen. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2010. / Includes bibliographical references (leaves 62-67). / Abstracts in English and Chinese. / Abstract --- p.i / Acknowledgement --- p.iii / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- VLSI Design Methodology --- p.1 / Chapter 1.2 --- Low Power Design --- p.6 / Chapter 1.3 --- Literature Review on Multiple Supply Voltage (MSV) --- p.10 / Chapter 1.3.1 --- Voltage Island Partitioning Problems --- p.11 / Chapter 1.3.2 --- Multiple Voltage Assignment (MVA) Problem --- p.12 / Chapter 1.4 --- Literature Review on Dynamic Voltage Scaling and Dynamic Power Management --- p.15 / Chapter 1.4.1 --- Dynamic Voltage Scaling (DVS) Problem --- p.16 / Chapter 1.4.2 --- Dynamic Power Management --- p.20 / Chapter 1.5 --- Thesis Contribution and Organization --- p.22 / Chapter 2 --- Multi-Voltage Floorplan Design --- p.24 / Chapter 2.1 --- Introduction --- p.24 / Chapter 2.2 --- Problem Formulation --- p.26 / Chapter 2.3 --- A Value-Oriented Branch-and-Bound Algorithm --- p.29 / Chapter 2.3.1 --- Branching Rules --- p.30 / Chapter 2.3.2 --- Upper Bounds --- p.31 / Chapter 2.3.3 --- Lower Bounds --- p.32 / Chapter 2.3.4 --- Pruning Rules and Value-Oriented Searching Rules --- p.33 / Chapter 2.4 --- Floorplanning --- p.35 / Chapter 2.5 --- Experimental Results --- p.36 / Chapter 2.5.1 --- Optimal Voltage Assignment --- p.37 / Chapter 2.5.2 --- Floorplanning Results --- p.38 / Chapter 3 --- Low Power Scheduling at System Level --- p.40 / Chapter 3.1 --- Introduction --- p.40 / Chapter 3.2 --- Problem Formulation --- p.42 / Chapter 3.3 --- An Optimal Offline Algorithm --- p.43 / Chapter 3.4 --- Online Algorithm --- p.46 / Chapter 3.4.1 --- Analysis on One Single Interval --- p.46 / Chapter 3.4.2 --- Online Algorithm --- p.49 / Chapter 3.4.3 --- Analysis of the Online Algorithm --- p.52 / Chapter 3.5 --- Experimental Results --- p.56 / Chapter 4 --- Conclusion and Future Work --- p.60 / Bibliography --- p.67