This thesis presents a study on the design of two-dimensional (2-D) digital filters by using the singular-value decomposition (SVD). A new method for the design of 2-D quadrantally symmetric FIR filters with linear phase response is proposed. It is shown that three realizations are possible, namely, a direct realization, a modified version of the direct realization, and a realization based on the combined application of the SV and LU decompositions. Each of the three realizations consists of a parallel arrangement of cascaded pairs of 1-D filters; hence extensive parallel processing and pipelining can be applied. The three realizations are compared and it is shown that the realization based on the SV and LU decomposition leads to the lowest approximation error and involves the smallest number of multiplications. It is shown that the SVD of the sampled amplitude response of a 2-D digital filter with real coefficients possesses a special structure: every singular vector is either mirror-image symmetric or antisymmetric with respect to its midpoint. Consequently, the SVD method can be applied along with 1-D FIR techniques for the design of linear-phase 2-D filters with arbitrary prescribed amplitude responses which are symmetrical with respect to the origin of the (ω1, ω2) plane. A method for the design of 2-D IIR digital filters based on the combined application of the SVD and the balanced approximation (BA) is proposed. It is shown that the approximation error in the phase angle is bounded by the sum of the neglected Hankel singular values of the filter. Consequently, the phase response of the resulting filter is approximately linear over the passband region provided that only small Hankel singular values are neglected. It is also shown that the resulting 2-D filter is nearly balanced, which implies that the filter has low roundoff noise as well as low parameter sensitivity. Furthermore, the 2-D filter obtained is more economical and computationally more efficient than the original 2-D FIR filter, and in the case where an IIR filter is obtained the stability of the filter is guaranteed. Efficient general algorithms for the evaluation of the 1-D and 2-D gramians for 1-D and 2-D, causal, stable, recursive digital filters are proposed, which facilitate the application of the BA method in the design of digital filters. The algorithms obtained are based on a two-stage extension of the Astrom-Jury-Agniel (AJA) algorithm. It is shown that the AJA algorithm can be modified to solve a 1-D Lyapunov equation in a recursive manner. The recursive algorithm is then extended to the case where the rational function vector involved depends on two complex variables. It is shown that the two algorithms obtained can be combined to evaluate the 2-D gramians. The proposed algorithms are also useful in obtaining optimal digital filter structures that minimize the output-noise power due to the roundoff of products. / Graduate

[pt] Nos dias de hoje, são cada vez maiores as implicações de filtragem digital de sinais. Diversos tipos de algoritmos e de estruturas de filtros digitais, além de implementações por hardware tem sido desenvolvidos. A implementação de filtros tem sido bastante simplificada através do uso de microprocessadores; no entanto, as implementações atuais por hardware são limitados em estruturas ou ordem ou ambos. Este trabalho propõe uma arquitetura de um microcomputador que permite a implementação de filtros digitais programáveis (em estrutura, coeficientes e ordem). Também é mostrado que apenas um pequeno set de instruções é necessário e que não há limitações quanto à estrutura do filtro. / [en] Work on digital filtering of signals has been continuously increasing and the literature presents several algorithms and structures, besides hardware implementations. Filter implementation has been greathy simplified by using microprocessors; nevertheless present filter hardware is limited in structure or order or both. This work proposes a microcomputer architecture which allows the implementation of programmable (in structure coeficients and order) digital filters. It is also shown that only a small set of instructions is needed and that there is no limitation on the filter structure.

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A major break-through in the real-time digital simulation of dynamic models has occurred with the introduction of the Intel 2920 digital signal processing chip. The problems and potentials for this new device are demonstrated by implementing an elliptic function digital low pass filter via the bilinear z-transform approach. The software implementation is presented. Debugging and software verification are accomplished via manufacturer's simulation software tools. The hardware performance is verified in the laboratory. The results of these efforts point to much promise for wide scale applications, however, problems associated with performance indicate early version chip problems.

This research report is devoted to an investigation of finite impulse response (FIR) filters and their implementation via windowing techniques. Analysis is restricted to those FIR filters that possess both a nonrecursive structure and a linear phase response. Initially an informative yet concise overview of FIR filters is presented. Some knowledge of "discrete – time" systems is assumed. Next, the concepts associated with FIR filter implementation through the utilization of window functions is developed. Analysis is performed in both the time and frequency domains. Results obtained define optimal window function criteria. The last design technique is devoted to computer aided FIR filter design via windows. The purpose of this section is to demonstrate the advantages of using the computer to solve the FIR filter – window design problem. An example problem supplements this section. Conclusions, along with a brief summary are documented.

Cross correlator systems, analog and clipped input channels, with correlated random narrow band Gaussian noise as inputs are computer simulated. The performance of each system is evaluated on the basis of the output signal-to-noise ratio. The output SNR of each system is compared with theoretical asymptotic approximations computed as a function of the SNR of the input channels. The output of the simulation compares within 3 dB of the asymptotic approximations for the analog correlator for all values of the correlation coefficient tested and for the systems with clipped input channels with uncorrelated inputs. For the systems with clipped input channels, certain combinations of the input SNR with non-zero correlation cause the output SNR to be zero. This causes discontinuities in the dB plot. For the systems with clippers and non-zero correlation of the input channels, the output of the simulation compares within 3 dB of the results of the asymptotic approximations when no discontinuities occur in the output plot.

The Fujitsu MB8764 digital signal processing chip is designed to operate with a machine cycle of up to 10 MHz. The chip’s ability to perform a 16-by-16 bit multiply and add operation in one machine cycle makes it a good candidate for real time digital signal processing. Unlike the Intel 2920 the Fujitsu MB8764 does not have an onboard analog-to-digital, digital-to-analog converter. Therefore, this paper will be restricted to the operation of this device with digital data input and output. The use of the MB8764 as a digital filter is analyzed. Performance limitations due to finite word length, memory size and configuration, and clock rate are considered. The MB8764 capabilities in computing fast Fourier transforms are discussed. Development of a working digital filter with the MB8764 work station is presented.

When a digital process is realized on a general-purpose computer or a special-purpose hardware, errors due to finite register length are introduced. These errors are due primarily to arithmetic roundoff, coefficient quantization, and scaling rules. This paper addresses the effects of finite word length on a direct-form implementation of a high order H (z) transfer function. The development and analysis of a modified direct-form realization suggested by Dr. Fred O. Simons, are carried out via FORTRAN emulation of a fourth-order low-pass Butterworth filter. The results are presented as a parametric tradeoff of signal-to-noise ratio at the filter output versus word length. Conclusions are drawn by comparing the modified direct-form with the canonic direct-form. The analysis presented here is intended to illustrate how a high order transfer function can be realized directly without decomposing into a group of low-order subfilters.

As the use of computer in engineering design as well as other areas increase, it becomes more imperative that the application software used be as simple, convenient, and powerful as possible. The engineer is not interested in the internal workings of the computer or its operating system. It is the design itself that takes precedence. The filter design package developed for this project, known as FILTER, is such an application. With FILTER, coupled with the Digital Research Graphics Environment Manager, the engineer is led through the analog and digital filter design phase on a personal computer with carefully designed interactive computer graphics requiring little or no computer knowledge.