The present success in the manufacture of multi-layer interconnects in ultra-large-scale integration is largely due to the acceptable planarization capabilities of the chemical-mechanical polishing (CMP) process. In the past decade, copper has emerged as the preferred interconnect material. The greatest challenge in Cu CMP at present is the control of wafer surface non-uniformity at various scales. As the size of a wafer has increased to 300 mm, the wafer-level non-uniformity has assumed critical importance. Moreover, the pattern geometry in each die has become quite complex due to a wide range of feature sizes and multi-level structures. Therefore, it is important to develop a non-uniformity model that integrates wafer-, die- and feature-level variations into a unified, multi-scale dielectric erosion and Cu dishing model. In this paper, a systematic way of characterizing and modeling dishing in the single-step Cu CMP process is presented. The possible causes of dishing at each scale are identified in terms of several geometric and process parameters. The feature-scale pressure calculation based on the step-height at each polishing stage is introduced. The dishing model is based on pad elastic deformation and the evolving pattern geometry, and is integrated with the wafer- and die-level variations. Experimental and analytical means of determining the model parameters are outlined and the model is validated by polishing experiments on patterned wafers. Finally, practical approaches for minimizing Cu dishing are suggested. / Singapore-MIT Alliance (SMA)

The effects of different process parameters on tribology and surface defects were studied till date, but there has been a very minimal study to understand the effect of slurry temperature during Copper Chemical Mechanical Polishing (CMP). The surface defects such as dishing, erosion and metal loss amount for more than 50% of the defects that hamper the device yield and mainly the electrical properties during the manufacturing process. In this research, the effect of slurry temperature on tribology, surface defects and electrical properties during copper CMP employing different pad materials and slurries has been explored. Experiments were conducted at different slurry temperatures maintaining all the other process parameters constant. Post polished copper samples were analyzed for their dishing and metal loss characteristics. From the results, it was seen that the coefficient of friction and removal rate increased with increase in slurry temperature during polishing with both types of polishing pads. This increase in removal rate is attributed to a combined effect of change in pad mechanical properties and chemical reaction kinetics. The experimental data indicated that the increase in slurry temperature results in an increase in amounts of metal dishing and copper metal loss for one type of slurry and defects decrease with increase in slurry temperature for other type of slurry. This phenomenon indicates the effect of temperature on chemical reaction kinetics and its influence on defect generation. This can be attributed due to the change in pad asperities due to change in pad mechanical properties and chemical kinetics with change in slurry temperature. The slurry temperature has an effect not only on the surface defects and tribology but also on the change in pad mechanical properties. The copper thin films peeled off at higher polishing temperatures, leading to adhesion failure. With increase in temperature the copper crystallinity, hardness and modulus increased. Further with increase in the defects the electrical properties of the devices also degraded drastically and even failed to operate at higher levels of dishing and metal loss. This research is aimed at understanding the physics governing the defect generation during CMP.