Thesis (M.S. in computer engineering)--Washington State University, May 2006. / Includes bibliographical references (p. 63-64).

Thesis (Ph. D.)--University of Texas at Austin, 2005. / Vita. Includes bibliographical references.

Thesis (Ph.D.)--University of Texas at Dallas, 2007. / Includes vita. Includes bibliographical references (leaves 220-230)

This thesis aims to model the effects of interaction and buckling upon pairs of micro-shells embedded within an elastic medium under far field hydrostatic pressure. This analysis is motivated by the role shell buckling plays in the nonlinear nature of the pressure relative volume curve of elastomers containing micro-shells. Current models of the effective properties of these types of composites assume shells are in a dilute distribution within the host medium, and as such assume shells will buckle at the pressure of the associated isolated embedded shell model. For composites with a high volume fraction of micro-shells, or in poorly mixed composites, the dilute distribution model may provide a first approximation to the effective properties of the composite, however, interaction between shells must be considered to find a more accurate model. We begin the process of modelling the buckling of interacting embedded shells by considering the buckling of an isolated embedded thin spherical shell. For a host medium undergoing far field hydrostatic pressure we demonstrate the parameter ranges in which Jones et al. thin shell buckling theory agrees with the thin shell buckling theory of Fok and Allwright. We then use scalings to increase the range of validity of the thin shell approximation used in the Jones et al. theory to include composites with a high contrast between medium and shell materials. This enables more accurate predictions of buckling pressures of embedded shells under far field axially symmetric pressures to also be found, as is demonstrated for an embedded shell under far field axial compression. We model the linear elastic deformation of pairs of embedded micro-shells using the Boussinesq-Papkovich stress function method, before employing the thin shell linear analysis method developed in previous chapters to calculate the critical buckling pressure and buckling patterns of the pair of embedded shells.

Recent advances in wireless sensor nodes, data acquisition devices, wearable and implantable medical devices have paved way for low power (sub 50uW) devices. These devices generally use small solid state or thin film batteries for power supply which need replacement or need to be removed for charging. RF energy harvesting technology can be used to charge these batteries without the need to remove the battery from the device, thus providing a sustainable power supply. In other cases, a battery can become unnecessary altogether. This enables us to deploy wireless network nodes in places where regular physical access to the nodes is difficult or cumbersome. This thesis proposes a design of an RF energy harvesting device able to charge commercially available thin film or solid-state batteries. The energy harvesting amplifier circuit is designed in Global Foundry 0.13um CMOS technology using Cadence integrated circuit design tools. This Application Specific Integrated Circuit (ASIC) is intended to have as small a footprint as possible so that it can be easily integrated with the above-mentioned devices. While a dedicated RF power source is a direct solution to provide sustainable power to the harvesting circuit, harvesting ambient RF power from TV and UHF cellular frequencies increases the possibilities of where the harvesting device can be placed. The biggest challenge for RF energy harvesting technology is the availability of adequate amount of RF power. This thesis also presents a survey of available RF power at various ultra-high frequencies in San Luis Obispo, CA.The idea is to determine the frequency band which can provide maximum RF power for harvesting and design a harvester for that frequency band.

Tiny, ultra-low-power embedded processors enable sophisticated computing deployments in a myriad of areas previously off limits to computing power, ranging from intelligent medical implants to massive scale 'smart dust'-type sensing deployments. While today's computing and sensing hardware is well-suited for these next generation deployments, the batteries powering them are not: the size and weight of today's mobile and Internet-of-Things devices are dominated by their batteries, which also limit systems' lifespans and potential for deployment in sensitive contexts. Academic efforts have demonstrated the feasibility of harvesting energy on-demand from the environment as a practical alternative to classical battery power, instead buffering harvested energy in a capacitor to power intermittent bursts of operation. Energy harvesting circuits are miniaturizable, inexpensive, and enable effectively indefinite operation when compared to batteries---but introduce new problems stemming from the lack of a reliable power source. Unfortunately, these problems have so far confined batteryless systems to small-scale research deployments. The central design challenge for effective batteryless operation is efficiently using scarce input power from the energy harvesting frontend. Despite advances in both harvester and processor efficiency, digital systems often consume orders of magnitude more power than can be supplied by harvesting circuits---forcing systems to operate in short bursts punctuated by power failure and a long recharge period. Today's batteryless systems pay a steep price to sustain operation across these common-case power losses: current platforms depend on high-performance non-volatile memory to quickly and efficiently checkpoint program state before power loss, limiting batteryless operation to a small selection of devices which integrate these novel memory technologies. Choosing exactly when to checkpoint to non-volatile memory represents a challenge in itself: the hardware required to detect impending power failure often represents a large proportion of the system's overall energy consumption, forcing designers to choose between the energy overhead of voltage monitoring or the runtime overhead of 'energy-oblivious' checkpointing models. Finally, the choice of buffer capacitor size has a large impact on overall energy efficiency---but the optimal choice depends on runtime energy dynamics which are difficult to predict at design time, leaving designers to make at best educated guesses about future environmental conditions. This work approaches energy harvesting system design from a circuits perspective, answering the following research questions towards practical and performant batteryless operation: 1. Can the emergent properties of today's low-power systems be used to enable efficient intermittent operation on new classes of devices? 2. What compromises can we make in voltage monitor design to minimize power consumption while maintaining just enough functionality for batteryless operation? 3. How can we buffer harvested energy in a way that maximizes energy efficiency despite unpredictable system-level power dynamics? This work answers the following questions by producing the following research artifacts: 1. The first non-volatile memory invariant system to enable intermittent operation on embedded devices lacking high-performance memory (Chapter 2). 2. The first voltage monitoring circuit designed for batteryless systems to enable energy-aware operation without sacrificing efficiency (Chapter 3). 3. The first highly efficient power-adaptive energy buffer to store harvested energy without compromising on efficiency or performance (Chapter 4). / Doctor of Philosophy / Tiny, ultra-low-power embedded processors enable sophisticated computing deployments in a myriad of areas previously off limits to computing power, ranging from intelligent medical implants to massive scale 'smart dust'-type sensing deployments. While today's computing and sensing hardware is well-suited for these next generation deployments, the batteries powering them are not: the size and weight of today's mobile and Internet-of-Things devices are dominated by their batteries, which also limit systems' lifespans and potential for deployment in sensitive contexts. Academic efforts have demonstrated the feasibility of harvesting energy on-demand from the environment as a practical alternative to classical battery power, instead buffering harvested energy in a short-term energy store (i.e., a capacitor) to power intermittent bursts of operation. Energy harvesting circuits are miniaturizable, inexpensive, and enable effectively indefinite operation when compared to batteries---but introduce new problems stemming from the lack of a reliable power source. Unfortunately, these problems have so far confined batteryless systems to small-scale research deployments. The central design challenge for effective batteryless operation is efficiently using scarce input power from the energy harvesting frontend. Despite advances in both harvester and processor efficiency, digital systems often consume orders of magnitude more power than can be supplied by harvesting circuits---forcing systems to operate in short bursts punctuated by power failure and a long recharge period. Today's batteryless systems pay a steep price to sustain operation across these common-case power losses: current platforms depend on high-performance non-volatile memory (which retains state without power) to quickly and efficiently checkpoint program state before power loss, limiting batteryless operation to a small selection of devices which integrate these novel memory technologies. Choosing exactly when to checkpoint to non-volatile memory represents a challenge in itself: the hardware required to detect impending power failure often represents a large proportion of the system's overall energy consumption, forcing designers to choose between the energy overhead of voltage monitoring or the runtime overhead of 'energy-oblivious' checkpointing models. Finally, the choice of energy buffer size has a large impact on overall energy efficiency---but the optimal choice depends on runtime energy dynamics which are difficult to predict at design time, leaving designers to make at best educated guesses about future environmental conditions. This work approaches energy harvesting system design from a circuits perspective, answering the following research questions towards practical and performant batteryless operation: 1. Can the emergent properties of today's low-power systems be used to enable efficient intermittent operation on new classes of devices? 2. What compromises can we make in voltage monitor design to minimize power consumption while maintaining just enough functionality for batteryless operation? 3. How can we buffer harvested energy in a way that maximizes energy efficiency despite unpredictable system-level power dynamics? This work answers the following questions by producing the following research artifacts: 1. The first non-volatile memory invariant system to enable intermittent operation on embedded devices lacking high-performance memory (Chapter 2). 2. The first energy monitoring circuit designed for batteryless systems to enable energy-aware operation without sacrificing efficiency (Chapter 3). 3. The first highly efficient power-adaptive energy buffer to store harvested energy without compromising on efficiency or performance (Chapter 4).

With the advent of energy harvesters, supporting fast and efficient computation on energy harvesting devices has become a key challenge in the field of energy harvesting on ubiquitous devices. Computation on energy harvesting devices is equivalent to spreading the execution time of a lasting application over short, frequent cycles of power. However, we must ensure that results obtained from intermittently executing an application do produce results that are congruent to those produced by executing the application on a device with a continuous source of power. The current state-of-the-art systems that enable intermittent computation on energy harvesters make use of novel compiler analysis techniques as well as on-board hardware on devices to measure the energy remaining for useful computation. However, currently available programming models, which mostly target devices with FRAM as the NVM, would cause failure on devices that employ the Flash as primary NVM, thereby resulting in a non-universal solution that is restricted by the choice of NVM. This is primarily the result of the Flash's limited read/write endurance. This research aims to contribute to the world of energy harvesting devices by providing solutions that would enable intermittent computation regardless of the choice of NVM on a device by utilizing only the SRAM to save state and perform computation. Utilizing the SRAM further reduces run-time overhead as SRAM reads/writes are less costlier than NVM reads/writes. Our proposed solutions rely on programmer-guidance and compiler analysis to correct and efficient intermittent computation. We then extend our system to provide a complete compiler-based solution without programmer intervention. Our system is able to run applications that would otherwise render any device with Flash as NVM useless in a matter of hours. / Master of Science / As batteries continue to take up space and make small-scale sensors hefty, battery-less devices have grown increasingly popular for non-resource intensive computations. From tracking air pressure in vehicle tires to monitoring room temperature, battery-less devices have countless applications in various walks of life. These devices function by periodically harvesting energy from the environment and its surroundings to power short bursts of computation. When device energy levels reach a lower-bound threshold these devices must power off to scavenge useful energy from the environment to further perform short bursts of computation. Usually, energy harvesting devices draw power from solar, thermal or RF energy. This vastly depends on the build of the device, also known as a microprocessor (a processing unit built to perform small-scale computations). Due to these devices constantly powering on and off, performing continuous computation on such devices is rather more difficult when compared to systems with a continuous source of power. Since applications can require more time to complete than one power cycle of such devices, by default, applications running on these devices will restart execution from the beginning at the start of every power cycle. Therefore, it is necessary for such devices to have mechanisms to remember where the were before the device lost power. The past decade has seen many solutions proposed to aid an application in restarting execution rather than recomputing everything from the beginning. Solutions utilize different categories of devices with different storage technologies as well different software and hardware utilities available to programmers in this domain. In this research, we propose two different low-overhead, long-life computation models to support intermittent computation on a subset of energy harvesting devices which use Flash-based memory to store persistent data. Our approaches are heavily dependent on programmer guidance and different program analysis techniques to sustain computation across power cycles.

Measurement of the total conditions downstream of fans is of primary importance to aeroengine development. Historically, these measurements have been acquired with the use of traditional total condition probes mounted to the guidevanes or engine cowling; however, such a setup can have significant impact on the flow. Difficulties in obtaining direct measurements with traditional total conditions probes have led to the development of an embedded shielded probe. In order to support this development, a model was desired to be developed that accurately modelled the recovery using a low-order analysis that could be implemented quickly. The creation and validation of such a model is the primary focus of the present research. Of secondary interest is to prove the hypothesis that aerodynamics will dominate the recovery of such a sensor. Based around the calculations for recovery used by Moffat, the model uses a linear vortex panel method to calculate the aerodynamics of the sensor. Higher order corrections were also suggested to improve the accuracy of the model. Several of these corrections, which take into account compressibility and variance of individual recovery factors, were included in the final model. Other corrections, such as improved paneling for the panel method and the inclusion of pitch angle have not been incorporated at this time but are part of an ongoing effort to improve and expand the capabilities of the model. Model validation was performed in three steps, starting with comparing the calculations for the recovery without aerodynamics to values present in literature for traditional Shielded probes. The aerodynamics and the panel method used to generate them were validated separately using the widely available program Xfoil. Validation of the combined model could only be accomplished via experimental testing. Several sensors, based on the predictions of the model, were 3D printed for use in experimental testing. Three key geometric parameters were identified and varied within the limits of interest to create the set of sensors tested. The purpose of this was two-fold. One: validate the model or identify key missing aerodynamic effects for inclusion. Two: prove the secondary hypothesis that aerodynamics will dominate the recovery. Testing was performed at a range of Mach numbers, yaw angles, and pitch angles commonly present in aeroengines. The data collected for model validation were simultaneously used to prove the hypothesis that aerodynamic effects dominated the recovery. This hypothesis was concluded to be true for the range of parameters tested. The model was determined to be valid for the range of parameters tested, although with the caveat that not all aerodynamic effects are fully accounted for and physical testing or CFD analysis is advised to verify results once design parameters have been narrowed down sufficiently. Further refinement of the experimental data and investigation of the aerodynamic effects are the subject of further study. / Master of Science

This thesis explores the security of intermittent devices, embedded systems designed to retain their state across periods of power loss, for cases both when the device has an excess of available energy and when power loss is unavoidable. Existing work with intermittent systems has focused on the problems inherent to the intermittent paradigm and ignored the security implications of persistent state across periods of power loss. The security of these devices is closely linked to their unique operational characteristics and are addressed here in two studies. First, the presence of an energy harvester creates an opportunity to use excess energy, available when additional energy is harvested after the local energy reservoir is filled, to precompute security related operations. Precomputation powered by this excess energy can reduce the cost of expensive tasks during periods of energy scarcity, potentially enabling the use of expensive security operations on traditionally unsecured devices. Second, when energy is limited and intermittent operation is required, the secure storage of checkpoints is a necessity to protect against adversary manipulation of the system state. To examine the secure storage of checkpoints a protocol is implemented to ensure the integrity and authenticity of a device's checkpoints, and evaluated for its energy overhead and performance. The cost of properly ensuring the integrity and authenticity of these checkpoints is examined to identify the overhead necessary to execute intermittent operations in a secure manner. Taken together, these studies lay the groundwork for a comprehensive view of the current state of intermittent device security. / Master of Science / This thesis explores two unique aspects of the intermittent computing paradigm, the precomputation during periods of excess energy and the security of system checkpoints. Intermittent systems are a class of embedded device that lack a classic, consistent, energy source and instead rely on transient energy collected from their surroundings. This removes the need for connection to a power grid or battery management, but introduces challenges in operation since the device can lose power at any time. Additionally, excess energy is available to these systems when they have filled their local energy reservoir, a capacitor or small rechargeable battery, and additional energy can still be collected form the environment. In this case, it is possible to begin precomputing energy intensive operations to enable more operations at a later time on a limited energy budget. Since their power source is inconsistent, intermittent systems checkpoint their current state to allow execution to resume at the beginning of the next power cycle. The security ramifications of saving the current system state into a checkpoint have not been considered in the state of the art. This thesis implements a protocol to properly secure system checkpoints and evaluates its performance to identify the energy overhead required for a secure checkpointing scheme. The results demonstrate the need for the development of more efficient solutions within the domain. Together, the two approaches presented in this thesis provide case studies on the behavior of intermittent devices when provided with either an excess or a dearth of energy. The optimization and improvement of modern intermittent devices will need to address both of these extremes as the field is further improved.

Multicore CPUs (Central Processing Units) and GPUs (Graphics Processing Units) are omnipresent in today’s market-leading smartphones and tablets. With CPUs and GPUs getting more complex, maximizing hardware utilization is becoming problematic. The challenges faced in GPGPU (General Purpose computing using GPU) computing on embedded platforms are different from their desktop counterparts due to their memory and computational limitations. This thesis evaluates the performance and energy efficiency achieved by offloading Java applications to an embedded GPU. The existing solutions in literature address various techniques and benefits of offloading Java on desktop or server grade GPUs and not on embedded GPUs. Our research is focussed on providing a framework for accelerating Java programs on embedded GPUs. Our experiments were conducted on a Freescale i.MX6Q SabreLite board which encompasses a quad-core ARM Cortex A9 CPU and a Vivante GC 2000 GPU that supports the OpenCL 1.1 Embedded Profile. We successfully accelerated Java code and reduced energy consumption by employing two approaches, namely JNI-OpenCL, and JOCL, which is a popular Java-binding for OpenCL. These approaches can be easily implemented on other platforms by embedded Java programmers to exploit the computational power of GPUs. Our results show up to an 8 times increase in performance efficiency and 3 times decrease in energy consumption compared to the embedded CPU-only execution of Java program. To the best of our knowledge, this is the first work done on accelerating Java on an embedded GPU.