David I. Kosowsky. / "June 1, 1955." "This report is based on a thesis submitted to the Department of Electrical Engineering, M.I.T., ... ." / Bibliography: p. 59-60. / Army Signal Corps Contract DA36-039 sc-42607 Project 102B Dept. of the Army Project 3-99-10-022

A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed to implement the digital section of mixed-signal IC applications. This FSCL circuit technique offers the advantage of low overlap current spikes during the switching transitions of conventional CMOS gates. This overlap current spike has become one of the major obstacles in improving the accuracy and performance of mixed-signal IC applications. Using simple circuits, FSCL logic family can be interfaced with the existing CMOS family. Thus it can nearly eliminate the power noise issue in the mixed-signal IC design. In this thesis, design of a sinc3 decimation filter using the FSCL technique for a 2nd order delta-sigma modulator has been presented. Simulation results show that this particular decimation filter, using the newly developed FSCL technique, improves the performance of the mixed-signal system. / Graduation date: 1994

With advancements in CMOS technology, high speed analog circuits that were traditionally implemented with discrete circuit components can now be made monolithically. Antialiasing filters for video signals as well as signal conditioning filters in high speed communication channels are examples of applications where high frequency integrated circuits are now feasible. Transconductance-Capacitor or Gm-C filters are well suited to these applications as they operate in the continuous-time domain and are able to overcome the high-frequency and noise limitations imposed by clocked filter topologies. This thesis covers the design of a programmable fourth-order Chebychev filter with a 50MHz passband using the transconductance-C technique. A previously proposed transconductor based upon a CMOS inverter is used to implement the filter. Since this transconductor has no internal nodes, it can achieve extremely high bandwidths. However, it requires a variable power source for programming. Thus, a wide-band, on-chip, variable-BiCMOS power supply is presented as the method for setting the transconductance. Practical design issues are addressed as well as many methods for compensating non-idealities. Simulations of the filter as well as some parametric measurement of the filter structures are presented. / Graduation date: 1994

This dissertation reports, for the first time, on the electrical coupling of microelectromechanical (MEM) resonators for high order bandpass filter synthesis. Electrical coupling of MEM resonators has a strong potential for extension of the operating frequency of MEM bandpass filters into the ultra high frequency (UHF) range and provides higher tunability and design flexibility compared to the mechanical coupling approach. Various schemes of electrical coupling are presented in this dissertation. Electromechanical models of clamped-clamped beam resonators, and various types of electrically coupled filters are presented. Lower frequency prototypes of electrically coupled filters with operating frequencies in the hundreds of kHz are implemented using micromechanical single crystal silicon clamped-clamped beam resonators. Measurement results are in good agreement with the developed electrical equivalent models of the filters. It is demonstrated that the characteristics of electrically coupled filters can be widely tuned by changing the DC polarization voltages.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Electrical and Computer Engineering, 2009. / Includes bibliographical references.

Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009. / Committee Chair: Farrokh Ayazi; Committee Member: James D. Meindl; Committee Member: Joy Laskar; Committee Member: Mark G. Allen; Committee Member: Paul A. Kohl. Part of the SMARTech Electronic Thesis and Dissertation Collection.

published_or_final_version / abstract / toc / Electrical and Electronic Engineering / Master / Master of Philosophy

This thesis deals primarily with the problem of soft-error tolerance in digital machines. The possible sources of soft errors are reviewed. It is shown that the significance of ionizing radiation increases with the scaling down of MOS technologies. The characteristics of electromagnetic interference sources are also discussed. After presenting the conventional methods of dealing with soft errors, a new approach to this problem is suggested. The new approach, called Soft-Error Filtering (SEF), consists of filtering every output of the logic before latching it, in such a way that a transient injected into a machine does not change the final result of an operation. An analysis of the reduction in the error rate that is obtained by using SEF is presented. For example, this analysis demonstrates that the error rate due to alpha particles generated by the decay of radioactive elements becomes negligible. A great deal of attention is devoted to the design of filtering latches which is an essential component for implementing SEF machines. Three structures are considered and a CMOS implementation is proposed in each case. The double-filter latch is the best of the three implementations. It features a nearly optimum performance in the time domain and it is relatively insensitive to process fluctuations. An overhead analysis demonstrates that SEF usually results in a small overhead, both in area and in time simultaneously. In conclusion, SEF is the best approach to the problem of designing a machine tolerant to short transients.

No description available.

No description available.