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On Some Aspects Of Uncertainty Inequality Using Samples Of Bandlimited SignalsSagar, G Vidya 07 1900 (has links) (PDF)
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Sistema de inferência Fuzzy para classificação de distúrbios em sinais elétricosAguiar, Eduardo Pestana de 30 August 2011 (has links)
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Previous issue date: 2011-08-30 / A presente dissertação tem como objetivo discutir o uso de técnicas de otimização baseadas
no gradiente conjugado e de informações de segunda ordem para o treinamento de sistemas
de inferência fuzzy singleton e non-singleton. Além disso, as soluções computacionais
derivadas são aplicadas aos problemas de classificação de distúrbios múltiplos e isolados
em sinais elétricos. Os resultados computacionais, obtidos a partir de dados sintéticos
de distúrbios em sinais de tensão, indicam que os sistemas de inferência fuzzy singleton
e non-singleton treinados pelos algoritmos de otimização considerados apresentam maior
velocidade de convergência e melhores taxas de classificação quando comparados com
aqueles treinados pelo algoritmo de otimização baseada em informações de primeira ordem
e é bastante competitivo em relação à rede neural artificial perceptron multicamadas
- multilayer perceptron (MLP) e ao classificador de Bayes. / This master dissertation aims to discuss the use of optimization techniques based on
the conjugated gradient and on second order information for the training of singleton or
non-singleton fuzzy inference systems. In addition, the computacional solutions obtained
are applied to isolated a multiple disturbances classification problems in electric signals.
Computational results obtained from synthetic data from disturbances in electric signals
indicate that singleton or non-singleton fuzzy inference systems trained by the considered
optimization algorithms present greater convergence speed and better classification
rates when compared to those data trained by an optimization algorithm based on first
order information and is quite competitive with multilayer perceptron neural network and
Bayesian classifier.
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Classificação automática de cardiopatias baseada em eletrocardiogramaBueno, Nina Maria 30 October 2006 (has links)
This work is dedicated to study of the recognition and classification of cardiac
disease, diagnosised through the electrocardiogram ECG. This examination is
normally used in heart medical center, emergency, intensive therapy, and with
complement diagnosis in heart disease as: acute myocardium infarction, bundle
block branches, hypertrophy and others. The software was developed for support to
the model, with focus on extraction of ECG signal characteristics, and an artificial
neural network for recognition of diseases. For extraction these characteristics, we
have used a auto-regressive model, AR, with the algorithm least mean square LMS,
to minimize the minimum error. The neural network, with architecture multilayer
perceptron and back propagation algorithm of training, was chosen for the
recognition of the standards. The method was showed efficient. / Este trabalho dedica-se ao estudo do reconhecimento e classificação de
cardiopatias, diagnosticadas através do exame de eletrocardiografia, ECG. Esse
exame é comumente utilizado em visitas a cardiologistas, centros de emergência,
centros de terapia intensiva e exames eletivos para auxílio de diagnóstico de
cardiopatias como: infarto agudo do miocárdio, bloqueios de ramos, hipertrofia e
outros. O aplicativo desenvolvido para apoio ao trabalho focaliza a extração de
características do sinal ECG, representado por ciclos e a aplicação destas
características a uma rede neural artificial para reconhecimento das cardiopatias.
Para extração das características do sinal, utilizamos o modelo matemático de
previsão de comportamento de curvas, chamado de auto-regressivo, AR, onde
utilizamos o passado histórico recente da curva para determinar o próximo ponto;
em nosso caso, utilizamos o algoritmo dos mínimos quadrados para adequação do
erro, conhecido como LMS. A rede neural de topologia perceptron multicamadas e
com algoritmo de treinamento backpropagation foi escolhida para o reconhecimento
dos padrões, pela sua capacidade de generalização. O método se mostrou
adequado e eficiente ao objetivo proposto. / Mestre em Ciências
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Low Power and Low Area Techniques for Neural Recording ApplicationChaturvedi, Vikram January 2012 (has links) (PDF)
Chronic recording of neural signals is indispensable in designing efficient brain machine interfaces and to elucidate human neurophysiology. The advent of multi-channel micro-electrode arrays has driven the need for electronic store cord neural signals from many neurons. The continuous increase in demand of data from more number of neurons is challenging for the design of an efficient neural recording frontend(NRFE). Power consumption per channel and data rate minimization are two key problems which need to be addressed by next generation of neural recording systems. Area consumption per channel must be low for small implant size. Dynamic range in NRFE can vary with time due to change in electrode-neuron distance or background noise which demands adaptability. In this thesis, techniques to reduce power-per-channel and area-per-channel in a NRFE, via new circuits and architectures, are proposed.
An area efficient low power neural LNA is presented in UMC 0.13 μm 1P8M CMOS technology. The amplifier can be biased adaptively from 200 nA to 2 μA , modulating input referred noise from 9.92 μV to 3.9μV . We also describe a low noise design technique which minimizes the noise contribution of the load circuitry. Optimum sizing of the input transistors minimizes the accentuation of the input referred noise of the amplifier. It obviates the need of large input coupling capacitance in the amplifier which saves considerable amount of chip area. In vitro experiments were performed to validate the applicability of the neural LNA in neural recording systems.
ADC is another important block in a NRFE. An 8-bit SAR ADC along with the input and reference buffer is implemented in 0.13 μm CMOS technology. The use of ping-pong input sampling is emphasized for multichannel input to alleviate the bandwidth requirement of the input buffer. To reduce the output data rate, the A/D process is only enabled through a proposed activity dependent A/D scheme which ensures that the background noise is not processed. Based on the dynamic range requirement, the ADC resolution is adjusted from 8 to 1 bit at 1 bit step to reduce power consumption linearly. The ADC consumes 8.8 μW from1Vsupply at1MS/s and achieves ENOB of 7.7 bit. The ADC achieves FoM of 42.3 fJ/conversion in 0.13 μm CMOS technology.
Power consumption in SARADCs is greatly benefited by CMOS scaling due to its highly digital nature. However the power consumption in the capacitive DAC does not scale as well as the digital logic. In this thesis, two energy-efficient DAC switching techniques, Flip DAC and Quaternary capacitor switching, are proposed to reduce their energy consumption. Using these techniques, the energy consumption in the DAC can be reduced by 37 % and 42.5 % compared to the present state-of-the-art. A novel concept of code-independent energy consumption is introduced and emphasized. It mitigates energy consumption degradation with small input signal dynamic range.
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