Doctor of Philosophy / Department of Electrical and Computer Engineering / Don M. Gruenbacher / Future technologies such as cognitive radio require flexible and reliable hardware architectures that can be easily configured and adapted to varying coding parameters. The objective of this work is to develop a flexible hardware encoder and decoder for low-density parity-check (LDPC) codes. The design methodologies used for the implementation of a LDPC encoder and decoder are flexible in terms of parity-check matrix, code rate and code length. All these designs are implemented on a programmable chip and tested. Encoder implementations of LDPC codes are optimized for area due to their high complexity. Such designs usually have relatively low data rate. Two new encoder designs are developed that achieve much higher data rates of up to 844 Mbps while requiring more area for implementation. Using structured LDPC codes decreases the encoding complexity and provides design flexibility. The architecture for an encoder is presented that adheres to the structured LDPC codes defined in the IEEE 802.16e standard. A single encoder design is also developed that accommodates different code lengths and code rates and does not require re-synthesis of the design in order to change the encoding parameters. The flexible encoder design for structured LDPC codes is also implemented on a custom chip. The maximum coded data rate of the structured encoder is up to 844 Mbps and for a given code rate its value is independent of the code length. An LDPC decoder is designed and its design methodology is generic. It is applicable to both structured and any randomly generated LDPC codes. The coded data rate of the decoder increases with the increase in the code length. The number of decoding iterations used for the decoding process plays an important role in determining the decoder performance and latency. This design validates the estimated codeword after every iteration and stops the decoding process when the correct codeword is estimated which saves power consumption. For a given parity-check matrix and signal-to-noise ratio, a procedure to find an optimum value of the maximum number of decoding iterations is presented that considers the affects of power, delay, and error performance.

Master of Science / Department of Electrical and Computer Engineering / Caterina M. Scoglio / In recent times, research in the field of complex networks has advanced by leaps and bounds. Researchers have developed mathematical models for different networks such as epidemic networks, computer networks, power grid networks, and so on. In this thesis, the power grid has been modeled as a complex network. The power grid is being used extensively in every field today. Our dependence on the power grid has exceeded to an extent that we cannot think of survival without electricity. Recently, there has been an increasing concern about the growing possibility of cascading failures, due to the fact that the power grid is works close to full utilization. Furthermore, the problem will be exacerbated by the need to transfer a large amount of power generated by renewable sources from the regions where it is produced to the regions where it is consumed. Many researchers have studied these networks to find a solution to the problem of network robustness. Topological analysis may be considered as one of the components of analysis of a system's robustness. In the first part of this thesis, to study the cascading effect on power grid networks from a topological standpoint, we developed a simulator and used the IEEE standard networks for our analysis. The cascading effect was simulated on three standard networks, the IEEE 300 bus system, the IEEE 118 bus test system, and the WSCC 179 bus equivalent model. To extend our analysis to a larger set of networks with different topologies, we developed a first approximation network generator the creates networks with characteristics similar to the standard networks but with different topologies. The generated networks were then compared with the standard networks to show the effect of topology on the robustness of power grid networks. A comparison of the network metrics for the standard and the generated networks indicate that the generated networks are more robust than the standard ones. However, even if the generated topologies show an increased robustness with respect to the standard topologies, the real implementation and design of power grids based on those topologies requires further study, and will be considered as future work. In the second part of this thesis, we studied two mitigation strategies based on load reduction, Homogeneous load reduction and Targeted range-based load reduction. While the generic Homogeneous strategy will only mitigate the severity of the cascade when a non-negligible load reduction is performed, our newly proposed targeted load reduction strategy is much more efficient, reducing the load only in a small portion of the grid. The determination of this special portion of the grid is based on an algorithm, which finds the paths supplying power from the generators to the nodes. This algorithm is described in details in the Appendix B. While the Homogeneous strategy is easier to implement, efficient results can be obtained using the targeted strategy.

Master of Science / Department of Electrical and Computer Engineering / William B. Kuhn / A technique for measuring and characterizing transistor noise is presented. The primary goal of the measurements is to locate the 1/f noise corner for select transistors in Silicon-on-Sapphire processes. Additionally, the magnitude of the background channel noise of each transistor is measured. With this data, integrated circuit (IC) engineers will have a qualitative and quantitative resource for selecting transistors in designs with low noise requirements. During tests, transistor noise behavioral change is investigated over varying channel lengths, device type (N-type and P-type), threshold voltage, and bias voltage levels. Noise improvements for increased channel lengths from minimal, 1.0μm, and 4.0μm are measured. Transistors with medium and high threshold voltages are tested for comparison of their noise performance. The bias voltages are chosen to represent typical design values used in practice, with approximately 400 mV overdrive and a drain-to-source voltage range of 0.5 to 3.0V. The transistors subjected to tests are custom designed in Peregrine’s 0.5μm (FC) and 0.25μm (GC) Silicon-on-Sapphire (SOS) processes. In order to allow channel current noise to dominate over other circuit noise, the transistors have extraordinarily large aspect ratios (~2500 - 5000). The transistor noise produced is amplified and measured over a frequency range of 1kHz - 100MHz. This range allows the measurement of each device’s low and high frequency noise spectrum and resulting noise corner.

Master of Science / Department of Electrical and Computer Engineering / William B. Kuhn / Wireless Sensor Network industrial and civilian applications have been moved closer to us since they were originally developed for defense applications. They have been or will be widely used in industrial process monitoring and control, earth quake monitoring, healthcare applications, construction health monitoring, home automation, traffic control, and space exploration. The IEEE802.15.4 standard defines the PHY and MAC layers for low power wireless sensor networks. However, applications and research of wireless sensor networking are centered on battery powered devices. To remove the battery from the system is the ultimate goal of this research by using Energy Harvesting technology, which will largely reduce the wireless sensor network maintenance cost, increase the option open to application environments and push the speed of wireless sensor network industrialization. This thesis tackles the problem of RF link budget and PHY layer design for Energy Harvesting Wireless Sensor Network Nodes, through a modification to PHY/MAC layers. To this end, a prototype of energy harvesting radio is developed that hinges on burst-communication and solar cell energy harvesting techniques. The choice of operating frequency is considered relative to transmission range, antenna technology and RF link budget, and quantified by propagation measurements at four unlicensed frequencies in the VHF through UHF spectrums. A short preamble, PHY payload protocol frame structure and synchronization method are also proposed in order to support long sleep period duty cycle necessary in Energy Harvesting Radio systems. Some related work has recently begun under a standardization effort known as 802.15.4f. It is hoped that this thesis will contribute to this effort.

The fundamental insight of use of coding in computer networks is that information to be transmitted from the source in a session can be inferred, or decoded, by the intended receivers, and does not have to be transmitted verbatim. Several coding techniques have gained popularity over the recent years. Among them is random network coding with random linear codes, in which a node in a network topology transmits a linear combination of incoming, or source, packets to its outgoing links. Theoretically, the high computational complexity of random linear codes (RLC) is well known, and is used to motivate the application of more efficient codes, such as the traditional Reed-Solomon (RS) codes and, more recently, fountain codes (LT codes). Factors like computational complexity, network overhead, and deployment flexibility can make one coding schemes more attractive for one application than the others. While there is no one-fit-all coding solution, random linear coding is very flexible, well known to be able to achieve optimal flow rates in multicast sessions, and universally adopted in all proposed protocols using network coding. However, its practicality has been questioned, due to its high computational complexity. Unfortunately, to date, there has been no commercial real-world system reported in the literature that take advantage of the power of network coding. This research represents the first attempt towards a high-performance design and implementation of network coding. The objective of this work is to explore the computational limits of network coding in off-the-shelf modern processors, and to provide a solid reference implementation to facilitate commercial deployment of network coding. We promote the development of new coding-based systems and protocols through a comprehensive toolkit with coding implementations that are not just reference implementations. Instead, they have attained high-performance and flexibility to find widespread adoption. The final work, packaged as a toolkit code-named Tenor, includes high-performance implementations of a number of coding techniques: random linear network coding (RLC), fountain codes (LT codes), and Reed-Solomon (RS) codes in CPUs (single and multi core(s) for both Intel x86 and IBM POWER families), GPUs (single and multiple), and mobile/embedded devices based on ARMv6 and ARMv7 cores. Tenor is cross-platform with support on Linux, Windows, Mac OS X, and iPhone OS, and supports both 32-bit and 64-bit platforms. The toolkit includes some 23K lines of C++ code. In order to validate the effectiveness of the Tenor toolkit, we build coding-based on-demand media streaming systems with GPU-based servers, thousands of clients emulated on a cluster of computers, and a small number of actual iPhone devices. To facilitate deployment of such large experiments, we develop Blizzard, a high-performance framework, with the main goals of: 1) emulating hundreds of client/peer applications on each physical node; 2) facilitating scalable servers that can efficiently communicate with thousands of clients. Our experiences offer an illustration of Tenor components in action, and their benefits in rapid system development. With Tenor, it is trivial to switch from one coding technique to another, scale up to thousands of clients, and deliver actual video to be played back even on mobile devices.

The fundamental insight of use of coding in computer networks is that information to be transmitted from the source in a session can be inferred, or decoded, by the intended receivers, and does not have to be transmitted verbatim. Several coding techniques have gained popularity over the recent years. Among them is random network coding with random linear codes, in which a node in a network topology transmits a linear combination of incoming, or source, packets to its outgoing links. Theoretically, the high computational complexity of random linear codes (RLC) is well known, and is used to motivate the application of more efficient codes, such as the traditional Reed-Solomon (RS) codes and, more recently, fountain codes (LT codes). Factors like computational complexity, network overhead, and deployment flexibility can make one coding schemes more attractive for one application than the others. While there is no one-fit-all coding solution, random linear coding is very flexible, well known to be able to achieve optimal flow rates in multicast sessions, and universally adopted in all proposed protocols using network coding. However, its practicality has been questioned, due to its high computational complexity. Unfortunately, to date, there has been no commercial real-world system reported in the literature that take advantage of the power of network coding. This research represents the first attempt towards a high-performance design and implementation of network coding. The objective of this work is to explore the computational limits of network coding in off-the-shelf modern processors, and to provide a solid reference implementation to facilitate commercial deployment of network coding. We promote the development of new coding-based systems and protocols through a comprehensive toolkit with coding implementations that are not just reference implementations. Instead, they have attained high-performance and flexibility to find widespread adoption. The final work, packaged as a toolkit code-named Tenor, includes high-performance implementations of a number of coding techniques: random linear network coding (RLC), fountain codes (LT codes), and Reed-Solomon (RS) codes in CPUs (single and multi core(s) for both Intel x86 and IBM POWER families), GPUs (single and multiple), and mobile/embedded devices based on ARMv6 and ARMv7 cores. Tenor is cross-platform with support on Linux, Windows, Mac OS X, and iPhone OS, and supports both 32-bit and 64-bit platforms. The toolkit includes some 23K lines of C++ code. In order to validate the effectiveness of the Tenor toolkit, we build coding-based on-demand media streaming systems with GPU-based servers, thousands of clients emulated on a cluster of computers, and a small number of actual iPhone devices. To facilitate deployment of such large experiments, we develop Blizzard, a high-performance framework, with the main goals of: 1) emulating hundreds of client/peer applications on each physical node; 2) facilitating scalable servers that can efficiently communicate with thousands of clients. Our experiences offer an illustration of Tenor components in action, and their benefits in rapid system development. With Tenor, it is trivial to switch from one coding technique to another, scale up to thousands of clients, and deliver actual video to be played back even on mobile devices.

Master of Science / Department of Electrical and Computer Engineering / Caterina Scoglio / Overlay networks are application-layer networks that are constructed using the existing Internet infrastructure. Nodes in an overlay network construct logical links toward other nodes to form an overlay topology. Common routing algorithms, such as the link state and distance vector algorithms, are then used to determine how to route data in the overlay network. Previous work has demonstrated that overlay networks can be used to improve routing performance in the Internet. These quality of service improvements make overlay networks attractive for a variety of network applications. Recently, game-theoretic approaches to constructing overlay network topologies have been proposed. In these approaches, nodes establish logical links toward other nodes in a decentralized and selfish manner. Despite the selfish behavior, it has been shown that desirable global network properties emerge. These approaches, however, neglect the traffic-demand between nodes. In this thesis, a game-theoretical approach is presented to constructing overlay network topologies that considers the traffic-demand between nodes. This thesis shows that the traffic-demand between nodes has a significant effect on the topologies formed. Nodes with statistically higher traffic-demand from others become members of the graph center, while nodes that have statistically higher traffic-demand toward others establish logical links toward members of the graph center. This thesis also shows that a traffic-demand aware overlay network topology is better suited to transport the required traffic in the overlay network. Unfortunately, the game-theoretic approach is intractable. In order to construct larger overlay networks, approximate or heuristic approaches are required. In this thesis, a machine learning approach is proposed that characterizes the attributes of neighbor nodes during the construction of the overlay network topology. The approach proposed uses this knowledge and experience to learn a set of human-readable rules. This rule set is then used to decide whether to construct a logical link toward a node. This thesis shows that the machine learning approach results in similar overlay network topologies as the game-theoretic approach. Additionally, it is shown that the machine learning approach is tractable and scales to larger networks.

Doctor of Philosophy / Department of Electrical and Computer Engineering / Medhat M. Morcos / Characterized by variable impedances, DC power sources normal operation, reliability, and life-time is negatively affected by the sequential switching within any DC power system. The impedances of Nickel-Cadmium (NiCd) storage batteries and Direct Ethanol Fuel Cells (DEFC) vary nonlinearly; therefore, existing DC power system models, that employ averaging of the sequential switching process, are inaccurate in describing the system output voltage. In this research, Fourier-series models of DC–DC converters are developed and evaluated, through numerical computations and computer simulations. Both NiCd-DC converter and DEFC-DC converter power systems are experimentally evaluated over a selected switching frequency range. Input voltage and output voltage characteristics of two types of DEFC-DC converter systems (Nickel-mesh and Nickel-foam electrode assembly) are determined. Experimental results are compared to computer simulations, thus validating the Fourier-series models. Experimental results show a correlation between the DC converter switching frequency and the output of the DC power system. Sequential switching operation, along with the type of DC converter employed, are factors determining the maximum power transfer of the system. The models developed in this work are flexible over a large switching frequency range, and for any desired duty cycle. Correction factors, accounting for the source-converter impedance matching, are easily implemented in Fourier-series models. The research demonstrates the advantages of Fourier-series models, as compared to both large-signal and small-signal models, with regard to accuracy and ease of implementation to any DC–DC converter-driven power system.

Master of Science / Department of Architectural Engineering and Construction Science / Raphael A. Yunk / The DALI (Digital Addressable Lighting Interface) protocol has set forth the requirements for a digital fluorescent ballast that out performs its predecessors with respect to flexibility and functionality. The advantages of a DALI lighting control system range from advanced dimming capabilities and daylight sensing to saving money in energy and maintenance costs. A DALI lighting control system can also be beneficial to designers when trying to meet the requirements of code or recommended practices. The information in this report will help designers decide when to consider using a DALI lighting control system. This report covers topics such as the advantages of digitally addressable lighting, the equipment required to make a DALI system work, the limitations and drawbacks of DALI, cost information on installing and using a DALI system, and how DALI can help meet code and recommended practices, and concludes with a case study demonstrating how a DALI system has the potential to save money in energy costs.

Master of Science / Department of Architectural Engineering and Construction Science / Raphael A. Yunk / Today's engineers of building lighting systems must maintain a careful balance between the demands of accepted standards of practice, the necessity of life safety, the system performance needs of the client, and the developing national energy standards and certifications gaining prominence in the public eye. These sources of influence on the design process can create conflicts between the pressing need to conserve system energy usage and a costlier and perhaps unacceptable end-result for the client. In this climate, various governmental organizations and industry cooperatives have been funding published research and case-studies in order to promote sustainable design practices. Within these publications are repeated references to a "Task-Ambient" lighting fixture layout strategy. Multiple recent publications cite profound energy-saving benefits attainable using this design method. However, there is a noticeable lack of measured data concerning other qualities of this layout scheme, such as the end-user's comfort and ability to perform tasks under the resulting light distributions. Whether this lack of data resulted from the added complexity associated with such non-numerical measurements, or for some other unknown reason, this report explores this gap in the available data. An extended survey procedure was developed to approach the problem of measuring these unknown qualities of the Task-Ambient design strategy. This involved constructing multiple physical lighting layout mockups, defining the features of the Task-Ambient strategy which necessitated measurement, and designing objective tasks tailored to measure each of these non-numerical qualities. The careful analysis of this study's data results yields trends indicative of the Task-Ambient strategy, relative to a standard uniform layout, adversely affecting productivity, concentration, and the participants' subjective perceptions of the space's light distribution. The lowered level of energy use was however affirmed. The implications of these results are that the Task-Ambient strategy, while an efficient method of lighting system layout design, may not be beneficial for the client in other respects.