Shrinking the feature size of very large scale integrated circuits (VLSI) with advanced lithography has been a holy grail for the semiconductor industry. However, the gap between manufacturing capability and the expectation of design performance becomes critically challenged in sub-16nm technology nodes. To bridge this gap, design for manufacturing (DFM) is a must to co-optimize both design and lithography process at the same time. DFM for advanced lithography could be defined very differently under different circumstances. In general, progress in advanced lithography happens along three different directions: (1) New patterning technique (e.g., layout decomposition for different patterning techniques); (2) New design methodology (e.g., lithography aware standard cell design and physical design); (3) New illumination system (e.g., layout fracturing for EBL system, stencil planning for EBL system). In this dissertation, we present our research results on design for manufacturing (DFM) with multiple patterning lithography (MPL) and electron beam lithography (EBL) addressing these three DFM research directions in advanced lithography. For the research direction of new patterning technique, we study the layout decomposition problems for different patterning technique and explore four important topics: (1) layout decomposition for triple patterning; (2) density balanced layout decomposition for triple patterning; (3) layout decomposition for triple patterning with end-cutting; (4) layout decomposition for quadruple patterning and beyond. We present the proof that triple patterning layout decomposition is NP-hard. Besides, we propose a number of CAD optimization and integration techniques to solve different problems. For the research direction of new design methodology, we will show the limitation of traditional design flow. That is, ignoring triple patterning lithography (TPL) in early stages may limit the potential to resolve all the TPL conflicts. We propose a coherent framework, including standard cell compliance and detailed placement, to enable TPL friendly design. Considering TPL constraints during early design stages, such as standard cell compliance, improves the layout decomposability. With the pre-coloring solutions of standard cells, we present a TPL aware detailed placement where the layout decomposition and placement can be resolved simultaneously. In addition, we propose a linear dynamic programming to solve TPL aware detailed placement with maximum displacement, which can achieve good trade-off in terms of runtime and performance. For the EBL illumination system, we focus on two topics to improve the throughput of the whole EBL system: (1) overlapping aware stencil planning under MCC system; (2) L-shape based layout fracturing for mask preparation. With simulations and experiments, we demonstrate the critical role and effectiveness of DFM techniques for the advanced lithography, as the semiconductor industry marches forward in the deeper sub-micron domain. / text

This thesis addresses nanostructure fabrication techniques based on electron beam lithography, which is the most widely employed nanofabrication techniques for R&D and for the prototyping or production of photo-mask or imprint mold. The focus is on the study of novel resist and development process, as well as pattern transfer procedure after lithography. Specifically, this thesis investigates the following topics that are related to either electron beam resists, their development, or pattern transfer process after electron beam lithography: (1) The dry thermal development (contrary to conventional solvent development) of negative electron beam resists polystyrene (PS) to achieve reasonably high contrast and resolution. (2) The solvent development for polycarbonate electron beam resist, which is more desirable than the usual hot aqueous solution of NaOH developer, to achieve a low contrast that is ideal for grayscale lithography. (3) The fabrication of metal nanostructure by electron beam lithography and dry liftoff (contrary to the conventional liftoff using a strong solvent or aqueous solution), to achieved down to ~50 nm resolution. (4) The study a novel electron beam resist poly(sodium 4-styrenesulfonate) (sodium PSS) that is water soluble and water developable, to fabricate the feature size down to ~ 40 nm. And finally, (5) The fabrication of gold nanostructure on a thin membrane, which will be used as an object for novel x-ray imaging, where we developed the fabrication process for silicon nitride membrane, electroplating of gold, and pattern transfer after electron beam lithography using single layer resist and tri-layer resist stack.

A wide variety of tunable physio-chemical properties make ZnO nanowires a promising candidate for functional device applications. Although bottom-up grown nanowires are producible in volume, their high-throughput device integration requires control over dimensions and, more importantly, of precise placement. Thus development of top-down fabrication routes with accurate device positioning is imperative and hence pursued in this thesis. ZnO thin film transistors (TFT) were fabricated using solution based precursor zinc neodecanoate. A range of ZnO thin films were prepared by varying process parameters, such as precursor concentrations and annealing temperatures, and then analysed for their optical and electrical characteristics. ZnO TFTs prepared from a 15 % precursor concentration and annealing at 700 $^\circ$C exhibited best device performance with a saturation mobility of 0.1 cm$^2$/V.s and an on/off ratio of 10$^7$. Trap limited conduction (TLC) transport was found to be dominant in these devices. A direct-write electron beam lithography (EBL) process was developed using zinc naphthenate and zinc neodecanoate precursors for the top-down synthesis of ZnO nanowires. Nanoscale ZnO patterns with a resolution of 50 nm and lengths up to 25 $\mu$m were fabricated. A linear mobility of 0.5 cm$^2$/V.s and an on/off ratio of $\sim$10$^5$ was achieved in the micro-FETs with 50 $\mu$m channel width. Interestingly, on scaling down the ZnO channel width down to 100 nm, almost two orders of magnitude enhancement in the linear mobility was observed, which reached $\sim$33.75 cm$^2$/V.s. Such increment in the device performance was attributed to the formation of larger grains and thus reduction in the grain-boundary scattering. Six volatile organic compounds (VOCs) were sensed at room temperature using the direct-write EBL fabricated ZnO devices under UV sensitisation. As the surface-to-volume ratio increases with the decreasing channel width (from 50 $\mu$m to 100 nm), sensing response of the ZnO devices becomes more significant. Ppm level detection of various VOCs was observed; with a 25 ppm level Anisole detection being the lowest concentration. Additionally, using 100 nm device, detection of 10 ppm NO$_2$ was achieved at room temperature. The sensing response towards NO$_2$ was found to be increased with UV illumination and sensor temperature. This led to exhibit $\sim$171 % sensing response for a 2.5 ppm level of NO$_2$.

We have fabricated nanofuses from thin-film, arc-evaporation carbon for use in permanent data storage. Thin film carbon fuses have fewer fabrication barriers and retain the required resistivity and structural stability to work as a data storage medium. Carbon thin films were characterized for their electrical, microstructural, and chemical bonding properties. Annealing the thin-film carbon in an argon environment at 400°C reduced the resistivity from about 4*10-2 Ω cm as deposited down to about 5*10-4 Ω cm, allowing a lower blowing voltage. Nanofuses with widths ranging from 200 nm down to 60 nm were fabricated and tested. They blow with voltages between 2 V and 5.5 V, and the nanofuses remain stable in both a "1" and a "0" state under a constantly applied read voltage of 1 volt for over 90 hours, corresponding to a cumulative time of >1012 reads.

Magnetic permalloy nanostructures were fabricated onto a silicon wafer using electron beam lithography and a liftoff process. The lithography was performed with a Hitachi SU-70 SEM retrofitted with a Nabity NPGS lithography conversion kit. PMMA of 950kDa molecular weight was used as the photoresist. Features were either nanowires, nanodots, or elliptical or rectangular nanostructures. The nanowires had dimensions of 15µm x 200nm x 40nm, the nanodots had diameters of 145nm and thickness of 12nm, and the ellipses and rectangles had dimensions of 110nm x 50nm x 13nm. Characterization of the nanostructures was performed using the same Hitachi SEM as well as a Digital Instruments DI 3100 Nanoscope IIIa AFM used in magnetic force imaging mode. The SEM was used to measure lateral dimensions of the features and to capture images of features for proper documentation and for external simulation studies. The MFM was used to capture magnetic images of the samples to determine the magnetic state of the nanowires or arrays.

We report on the process parameters of nanoimprint lithography (NIL) for the fabrication of two-dimensional (2-D) photonic crystals. The nickel mould with 2-D photonic crystal patterns covering the area up to 20mm² is produced by electron-beam lithography (EBL) and electroplating. Periodic pillars as high as 200nm to 250nm are produced on the mould with the diameters ranging from 180nm to 400nm. The mould is employed for nanoimprinting on the poly-methyl-methacrylate (PMMA) layer spin-coated on the silicon substrate. Periodic air holes are formed in PMMA above its glass-transition temperature and the patterns on the mould are well transferred. This nanometer-size structure provided by NIL is subjective to further pattern transfer. / Singapore-MIT Alliance (SMA)

The field of Information and Communication Technologies is witnessing a development speed unprecedented in history. Moore’s law proves that the processor speed and memory size are roughly doubling each 18 months, which is expected to continue in the next decade. If photonics is going to play a substantial role in the ICT market, it will have to follow the same dynamics. There are mainly two groups of components that need to be integrated. The active components, including light sources, electro-optic modulators, and detectors, are mostly fabricated in III-V semiconductors. The passive components, such as waveguides, resonators, couplers and splitters, need no power supply and can be realized in silicon-related semiconductors. The prospects of silicon photonics are particularly promising, the fabrication is mostly compatible with standard CMOS technology and the on-chip optical interconnects are expected to increase the speed of microprocessors to the next generation. This thesis starts with designs of various silicon-based devices using finite-difference time-domain simulations. Parallel computation is a powerful tool in the modeling of large-scale photonic circuits. High Q cavities and resonant channel drop filters are designed in photonic crystal platform. Different methods to couple light from a single mode fiber to silicon waveguides are studied by coupled-mode theory and verified using parallel simulations. The performance of waveguide grating coupler for vertical radiation is also studied. The fabrication of silicon-based photonic devices involves material deposition, E-beam or optical lithography for pattern defining, and plasma/wet-chemistry etching for pattern transfer. For nanometer-scaled structures, E-beam lithography is the most critical process. Depending on the structures of the devices, both positive resist (ZEP520A) and negative resist (maN2405) are used. The proximity and stitch issues are addressed by careful dose correction and patches exposure. Some examples are given including photonic crystal surface mode filter, micro-ring resonators and gold grating couplers. In particular, high Q (2.6×105), deep notch (40 dB) and resonance-splitting phenomenon are demonstrated for silicon ring resonators. It is challenging to couple light into photonic integrated circuits directly from a single-mode fiber. The butt-coupled light-injecting method usually causes large insertion loss due to small overlap of the mode profiles and large index mismatch. Practically it is not easy to cleave silicon sample with smooth facet where the waveguide exposes. By adding gold gratings to the waveguides, light can be injected and collected vertically from single-mode fiber. The coupling efficiency is much higher. There is no need to cleave the sample. The access waveguides are much shortened and the stitch problem in E-beam lithography is avoided. In summary, this thesis introduces parallel simulations for the design of modern large-scale photonic devices, addresses various issues with Si-based fabrication, and analyses the data from the characterization. Several novel devices using silicon nanowire waveguides and 2D photonic crystal structures have been demonstrated for the first time. / QC 20100923

Nanopore-based single-molecule analysis of biomolecules such as DNA and proteins is a subject of strong scientific and technological interest. In recent years, solid state nanopores have been demonstrated to possess a number of advantages over biological (e.g., ion channel protein) pores due to the relative ease of tuning the pore dimensions, pore geometry, and surface chemistry. However, solid state fabrication methods have been limited in their scalability, automation, and reproducibility. In this work, a wafer-scale fabrication method is first demonstrated for reproducibly fabricating large arrays of solid-state nanopores. The method couples the high-resolution processes of electron beam lithography (EBL) and atomic layer deposition (ALD). Arrays of nanopores (825 per wafer) are successfully fabricated across a series of 4' wafers, with tunable pore sizes from 50 nm to sub-20 nm. The nanopores are fabricated in silicon nitride films with thicknesses varying from 10 nm to 50 nm. ALD of aluminum oxide is used to tune the nanopore size in the above range. By careful optimization of all the processing steps, a device survival rate of 96% is achieved on a wafer with 50 nm silicon nitride films on 60- 80 micron windows. Furthermore, a significant device survival rate of 88% was obtained for 20 nm silicon nitride films on order 100 micron windows. In order to develop a deeper understanding of nanopore fabrication-structure relationships, a modeling study was conducted to examine the physics of EBL, in particular: to investigate the effects of beam blur, dose, shot pattern, and secondary electrons on internal pore structure. Under the operating conditions used in pore production, the pores were expected to taper to a substantially smaller size than their apparent size in SEM. This finding was supported by preliminary conductance readings from nanopores.

In this study, optical behavior of metal nanoparticles having dimensions smaller than the wavelength of visible light is studied experimentally and numerically. Gold (Au) and silver (Ag) nanoparticles are studied due to their superior optical properties when compared to other metals. A compact code based on Discrete Dipole Approximation (DDA) is developed to compute extinction efficiencies of nanoparticles with various different properties such as material, dimension and geometry. To obtain self consistent nanoparticle arrays with well defined geometries and dimensions, Electron Beam Lithography (EBL) technique is mainly used as the manufacturing method. Dose parameters required to produce nanoparticles with dimensions down to 50 nm over substrates with different electrical conductivities are determined. Beam current is found to affect the doseV size relation. The use of thin Au films as antistatic layer for e-beam patterning over insulating substrates is considered and production steps, involving instabilities due to contaminants introduced to the system during additional removal steps, are clarified. 4 nm thick Au layer is found to provide sufficient conductivity for e-beam patterning over insulating substrates. An optical setup capable of performing transmittance and reflectance measurements of samples having small areas patterned with EBL is designed. Sizes of the metal nanoparticles are determined by scanning electron microscope (SEM) and spectral data obtained using the optical setup is analyzed to find out the parameters affecting the localized surface plasmon resonances (LSPR). Arrays of particles with diameters between 50 &ndash / 200 nm are produced and optically analyzed. Size and shape of the nanoparticles are found to affect the resonance behavior. Furthermore, lattice constants of the particle arrays and surrounding medium are also shown to influence the reflectance spectra. Axes with different lengths in ellipsoidal nanoparticles are observed to cause distinguishable resonance peaks when illuminated with polarized light. Peak intensities obtained from both polarizations are observed to decrease under unpolarized illumination. Binary systems consisting of nanosized particles and holes provided better contrast for transmitted light.

Electrochemical biosensors are cost effective, fast and portable devices, which can determine the existence and amounts of chemicals in a specific medium. These devices have many potential applications in many fields such as determination of diseases, process and product control, environmental monitoring, and drug research. To realize these potentials of the devices, many studies are being carried out to increase their sensitivity, selectivity and long term stabilities. Surface modification studies with various types of particles (metal nano particles, carbon nano tubes etc.) can be count among these studies. Although zeolites and zeo-type materials are investigated for many years, they still hold interest on them due to their capabilities. By means of their chemical resistances, large surface areas, tailorable surface properties, and porous structures they can be applied in many applicational fields. In some recent studies, these properties are intended to be used in the field of biosensors. The purpose of the current study was to investigate the effect of zeolite nanoparticles on electrochemical biosensor performances. Firstly, several different procedures were investigated in order to find the best and optimum methodology to attach previously synthesized zeolites on Si wafer substrates for the first time. For this purpose, the ultrasonication, spin coating and direct attachment methods were used and their efficiencies were compared. Perfectly oriented, fully covering, zeolite monolayers are produced by direct attachment method. Successively produced zeolite thin films were then patterned with the help of Electron Beam Lithography technique to show the compatibility of coating methods to the CMOS technology. Combination of Direct Attachment and EBL techniques resulted well controlled zeolite monolayer patterns. Then zeolite modified electrochemical biosensors were tested for their performances. With these experiments it was intended to improve the selectivity, sensitivity and storage stabilities of standard electrochemical biosensors. Experiments, conducted with different types of zeolites, showed that zeolites have various effects on the performances of electrochemical biosensors. Amperometric biosensor response magnitudes have been doubled with the addition of Silicalites. Faster conductometric electrode responses were achieved with enzyme immobilization on zeolite film technique. Also it is seen that Beta type zeolites modified through different ion exchange procedures, resulted different responses in IS-FET measurements.