• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • No language data
  • Tagged with
  • 10
  • 10
  • 10
  • 7
  • 4
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 1
  • 1
  • 1
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Fundamentals of solder interconnect wetting

Kang, Suk Chae 05 1900 (has links)
No description available.
2

Observation and modeling of heterogeneous microstructural evolution in Sn-Pb solder

Woodmansee, Michael W. 08 1900 (has links)
No description available.
3

An integrated process modeling methodology and module for sequential multilayered high-density substrate fabrication for microelectronic packages

Dunne, Rajiv Carl 12 1900 (has links)
No description available.
4

Prediction and validation of thermomechanical reliability in electronic packaging

Ding, Hai 08 1900 (has links)
No description available.
5

Fixturing analysis and synthesis for flexible circuit board assembly

Chen, Ruijun 05 1900 (has links)
No description available.
6

Evaluation of low stress dielectrics for board applications

Brownlee, Kellee Renee 12 1900 (has links)
No description available.
7

Methodologies for modeling simultaneous switching noise in multi-layered packages and boards

Chun, Sungjun 05 1900 (has links)
No description available.
8

Physics-based process modeling, reliability prediction, and design guidelines for flip-chip devices

Michaelides, Stylianos 08 1900 (has links)
No description available.
9

Solid State Pre-Formed Electronics Adhesive (SPEA)

Cope, Alexander Randon 13 September 2013 (has links)
In mobile and handheld consumer electronic markets, product use conditions drive the requirement for mechanical strength and device durability. The majority of relatively large form factor electronic components in a laptop, mobile internet device, PDA, or mobile phone use an adhesive as a stiffener to help protect the component from physical stresses imposed by daily wear and tear. Described herein is an innovative solution referred to as Solid State Pre-Formed Electronics Adhesive (SPEA), which enables a decrease in circuit board manufacturing throughput time while increasing mechanical durability with a consistent and characterized adhesive application process. Today, many consumer electronic ODM's (Original Design Manufacturers) and CM's (Contract Manufacturers) use a liquid adhesive dispensed after placement of an electronic component within the SMT (Surface Mount Technology) process. On average, this adds up to 60 seconds to the throughput time of a typical motherboard as the material needs to be applied and then cured. In addition, the current adhesive dispense application process is not tightly controlled and is highly variable depending on operator, material type, and circuit board density. Data will demonstrate that the effect of the adhesive deposition profile and consistency in application directly affects repeatable margin increase gains in a dynamic stress event. In partnership with a specialty chemical company, a unique thermoset epoxy compound was designed to provide maximum component to circuit board interconnect strength while maintaining its form at ambient temperatures. When applied to electronics manufacturing, the compound has the following advantages over current solutions: 1. Reduced Manufacturing Processing Time: Enables a solution that can be transitioned transparently into a circuit board manufacturing facility which reduces the average processing time for a typical device motherboard. 2. Improved Application Repeatability: Enables a solution that increases adhesive deposition consistency and placement repeatability, critical in achieving improved dynamic performance. 3. Delivers a Reference, Characterized Solution: Current industry adhesive application techniques and materials vary widely and component manufacturers cannot validate reliability performance with a confident baseline. This is due to the high variability of performance in commercially available adhesives. SPEA provides a characterized adhesive solution with a clear baseline margin increase on which to evaluate dynamically stressed system performance. The need to continually increase the resistance to component damage through dynamic testing is a critical aspect to consider given market trends and device roadmaps. Large component manufacturers have the opportunity to further embed themselves into untapped markets where portability and performance converge and drive the need for more robust packaging solutions. The development and application of SPEA will continue to maintain silicon and packaging reliability as consumer devices continue to shrink, becoming ever more portable.
10

Modeling of power supply noise in large chips using the finite difference time domain method

Choi, Jinseong 12 1900 (has links)
No description available.

Page generated in 0.1148 seconds