This thesis investigates the effects of ionizing radiation on the noise properties of n-channel power DMOS transistors. The pre-irradiation noise power spectral density of these transistors was found to vary as 1/ flambda where lambda (the slope of the noise power spectral density when plotted on a log-log scale) ranged from approximately 0.5 to 1.0. Radiation-induced trapped charge density was found to have a large effect on the magnitude and slope of the noise. Irradiation of devices was found to produce a more uniform distribution in time constants leading to the more ideal 1/f noise power spectrum as total dose increased. Polarity of bias applied during post-radiation anneal was found to force a distribution in time constants leading to an increase in lambda for devices under negative gate bias and a decrease in lambda for devices under positive gate bias. Radiation hardness of power MOSFETs was investigated as a function of their pre-irradiation 1/f noise. No correlation was found between noise magnitude and device hardness.

The Solar potential is studied, at the synoptical scale (Senegal-West Africa) via a set of terrestrial measurements of the sunshine duration, the insolation, the ambient temperature and the wind speed. First the missing data have been estimated (in Time and Space) via the study of the data structure and by use of a reconstitution formula derived from Correspondence Analysis. Then a geostatistical approach has been used to analyze a sufficiently long series of data to characterize statistically the climatological behavior of the Insolation in Space over the support defined above. Hence, the steps of deriving maps of isopleths for sparse Space and Time-series measurements of a given support will be presented. The possible applications are the cartography or simulation of fields, the optimization of measurement stations, the design of Solar equipments and the analysis of remote sensing data.

Faults on power distribution systems can be prevented quickly and reliably by using solid-state devices to coordinate the optimum functioning and operation of the distribution system. This thesis describes specific systems and circuits designed for this purpose. Some parts employed in the isolation of faults are: sensors, quadrature amplitude modulators, fiber optic cables, programmable logic controllers, generators, band pass filters and silicon controlled rectifiers. Design information and test data are presented.

The demand for maps and related cartographic products has increased greatly over the past years. This increase in the demand for cartographic products has greatly increased the work load for the cartographer because current practice requires the cartographer to manually identify and delineate the significant cartographic features from an image. The availability of digital image data has made it possible to use the computer to assist in the extraction and delineation of cartographic features. This research presents one approach to automating the delineation of large area features using neural networks for texture pattern classification.

The focus of this thesis is the computation of bit error rate in an optical fiber communication system when an avalanche photodiode (APD) is used for detection. The use of the APD increases the complexity of the BER calculation because it introduces an additional noise phenomenon: shot noise (plus multiplication noise). There are several methods to compute the BER. This thesis considers three of these methods: the Gaussian approximation, the saddlepoint approximation and a numerical quadrature method. An in-depth analysis of each computation method is presented after a thorough study of APD characteristics, involving its probability density function and its moment generating function. Numerical examples are shown and compared for each method. The examples show that the saddlepoint approximation method can be used to provide an accurate, simple form for the bit error rate, and that the Gaussian approximation tends to underestimate the BER at high gains. Different results with different photodetectors are illustrated throughout the thesis for a better understanding.

Hardware description languages can be powerful tools in creating digital system designs. AHPL, A Hardware Programming Language, is a hardware description language that simplifies the task of designing a digital system. One of the major problems in using a hardware description language is interfacing with commercially available simulation and layout tools. Many commercial tools use the Electronic Design Interchange Format (EDIF) in order to communicate designs. This thesis describes the AHPL to EDIF Netlist Translator (AENT) program. By using AENT, a designer can write an AHPL description, verify the design with a function level simulator, and generate a CMOS standard cell layout using a commercial layout tool. A post layout gate level simulation can also be performed to verify timing constraints. Several layout examples are given in this thesis, and results are compared with the Berkeley Synthesis System.

An image coding scheme combining subband coding and the established energy compaction technique of the discrete cosine transform (DCT) with trellis coded quantization (TCQ) is introduced. Image spectrums are split into 16 subband images using a quadrature mirror filter bank, and the DCT is performed on the lowest subband. The data is quantized using TCQ, transmitted and recombined at the receiver. It is shown that quantizing the subband data with TCQ decreases the mean-squared error (MSE) incurred in the quantization step, versus that of a Lloyd-Max scalar quantizer.

Dynamic bandwidth allocation plays an important role in integrated services networks. Effective bandwidth management can improve the overall performance of the network significantly. In integrated services networks, different types of traffic coexist. To serve these different types of traffic satisfactorily, hybrid switching is commonly used. Hybrid switching is an integration of circuit switching and packet switching in the same network. In this thesis, dynamic bandwidth allocation is studied to provide satisfactory hybrid switching performance. Specifically, we will study how to allocate bandwidths for continuous bit rate (CBR) traffic served by circuit switching and variable bit rate traffic (VBR) served by packet switching. The performance measure is based on the blocking probability of CBR traffic and the time delay of VBR traffic. Therefore, the objective of the dynamic bandwidth allocation is to maintain balance between blocking probability and delay under various traffic conditions. To accomplish this, the dynamic bandwidth allocation algorithms consists of traffic intensity estimation, traffic performance prediction, and performance optimization. A simulation is written to demonstrate the algorithm for various traffic scenarios.

An investigation into the feasibility of designing a monolithic high frequency voltage controlled oscillator is performed. With design constraints of an oscillator Q between 5 and 10 and minimal chip area, the resonant LC tank and negative resistive cross coupled differential amplifier circuit is analyzed and design guidelines are developed. Analysis of the circuit encompasses both linear and non-linear modes of operation of the circuit, predicts the fundamental frequency of oscillation, and highlights design limitations for the resonant elements in terms of meeting the Q specifications at higher frequencies. Experimental results on a fixed frequency version of the VCO circuit yielded good agreement with theoretical analysis. For the parameters tested, the error was on the order of 10% in most cases.

The arrival of high-speed, large-area IC's forces development of packages with high-density, small cross-sectional wiring. This trend is particularly clear for packages housing many chips (MCM's). It is shown how electrical, thermal, and fabricational constraints control line geometry in MCM's forcing the use of lossy lines. To obtain high speeds with these lossy lines, a generalized impedance-matched design is to combine load, line, and driver for overshoot-controlled performance. Using overshoot control, tradeoffs among power, area, and performance are derived for low-impedance buffers and drivers useful for lossy lines in MCM's.