NDLTD Global ETD Search
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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.

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Showing 711 to 720 of 2147 (0.011 seconds)
711

I/Q imbalance compensation for wideband electronic intelligent receivers

Mancuso, Vincent Chistopher 09 December 2013 (has links)
No description available.
Electrical Engineering
IQ Compensation
Receivers
FPGA
EW Receiver
712

Design of A Systolic Array-Based FPGA Parallel Architecture for the BLAST Algorithm and Its Implementation

Guo, Xinyu 13 December 2012 (has links)
No description available.
Bioinformatics
Computer Engineering
Computer Science
FPGA
Parallel
BLAST
Bioinformatics
713

HEURISTICS AND EXPERIMENTAL DESIGN FOR FPGA ROUTING ALGORITHMS

GAO, LI 03 December 2001 (has links)
No description available.
Computer Science
HEURISTICS
FPGA
CPU TIME MEASUREMENT
EXPERIMENTAL DESIGN
714

HARDWARE/SOFTWARE CO-DEBUGGING FOR RECONFIGURABLE COMPUTING APPLICATIONS

TIWARI, ANURAG 30 January 2002 (has links)
No description available.
FPGA
HWISC CO-DESIGN
Debugging
Reconfigurable computing
Co-Debugging
715

A MULTITHREADED RUNTIME SUPPORT ENVIRONMENT FOR DYNAMIC RECONFIGURABLE COMPUTING

PANDEY, ANKUR 27 September 2002 (has links)
No description available.
reconfigurable computing
runtime reconfiguration
runtime support environment
OS for FPGA
716

MACRO BASED COMPILER FOR A PARTIALLY RECONFIGURABLE COMPUTER

HANDA, MANISH January 2002 (has links)
No description available.
partial reconfiguration
dynamic reconfiguration
Field Programmable Gate Array (FPGA)
synthesis
717

DESIGN AND DEMONSTRATION OF A MULTI-TECHNOLOGY FIELD PROGRAMMABLE GATE ARRAY ARCHITECTURE

MAL, PROSENJIT 01 July 2004 (has links)
No description available.
FPGA
MULTI-TECHNOLOGY
ARCHITECTURE
CMOS
VLSI
CIRCUIT
PHOTORECEIVER
RECONFIGURABLEE
718

LOW POWER FPGA DESIGN TECHNIQUES FOR EMBEDDED SYSTEMS

TIWARI, ANURAG 31 May 2005 (has links)
No description available.
Low Power
FPGA
FSM
Finite State Machine
Technology mapping
Synthesis
719

AN OBJECT ORIENTED FRAMEWORK FOR BITSTREAM GENERATION FOR MULTI-TECHNOLOGY FPGA CHIPS

BEMALKHEDKAR, KALYAN 13 July 2005 (has links)
No description available.
Computer Science
720

MODELING OF I/O BLOCK AND SWITCH BLOCK FOR SECOND GENERATION MULTI-TECHNOLOGY FIELD PROGRAMMABLE GATE ARRAY (MT-FPGA)

SAMSANI, SIVA PRASAD REDDY 03 April 2006 (has links)
No description available.
MT-FPGA
I/O Block
SwitchBlock
VHDL-AMS
NC-Sim

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