Thesis (Ph.D.)--University of Hong Kong, 2002. / Includes bibliographical references (leaves 173-183) Also available in print.

Thesis (Ph. D.)--University of Wisconsin--Madison, 1981. / Typescript. Vita. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaves 239-245).

Snehal Udar, for the Doctor of Philosophy degree in Electrical and Computer Engineering, presented on May 4, of 2011, at Southern Illinois University Carbondale. TITLE: BUILT-IN SCHEMES FOR TEST PATTERN GENERATION AND FAULT LOCATION MAJOR PROFESSOR: Dr. D. Kagaris In this dissertation, we studied the areas of test pattern generation and fault location for detecting and diagnosing the faults in today's complex chips. In the first problem, a novel reseeding based test pattern generation scheme is analyzed by proposing a hardware efficient technique that uses irreducible polynomial-primitive element pair to generate distinct subsequences of test patterns. It is shown that for the given characteristic polynomial the hardware cost remains the same irrespective of the number of seeds required to generate the test sequence of given length. This scheme is targeted at generating pseudo-random test patterns that detect easy-to-detect faults. A counter based reseeding scheme is further analyzed that embeds a given set of fully specified test patterns in minimum number of clock cycles. Second problem investigates the effectiveness of inserting observation points on the circuit lines that along with primary output lines distinguish a given set of faults. Three hardware based approaches are proposed that aim at inserting minimum observation points, and are compared with each other for different diagnostic resolutions.

No description available.

There are two main threads of this thesis, namely, an unknown (unmeasurable) input reconstruction and fault detection and diagnosis. The developed methods are in the form of parity equations, i.e. finite impulse response filters of the available input and output measurements. In the first thread the design of parity equations for the purpose of an unknown input reconstruction of linear, time-invariant, discrete-time, stochastic systems is taken into consideration. An underlying assumption is that both measurable system inputs as well as the outputs can be subjected to noise, which leads to an errors-in-variables framework. The main contribution of the scheme is accommodation of the Lagrange multiplier method in order to minimise the influence of the noise on the unknown input estimate. Two potential applications of the novel input reconstruction method are proposed, which are a control enhancement of a hot strip steel rolling mill and an estimation of a pollutant level in a river. Furthermore, initial research is conducted in the field of the unknown input recon- struction for a class of nonlinear systems, namely, Hammerstein-Wiener systems, where a linear dynamic block is preceded and followed by a static nonlinear function. Many man-made as well as naturally occurring systems can be accurately described using Hammerstein-Wiener models. However, it is considered that not much attention has been paid to Hammerstein-Wiener systems in the errors-in-variables framework and in this thesis it is aimed to narrow this gap. The second thread considers a problem of robust (disturbance decoupled) fault de- tection as well as fault isolation and identification. Unmeasurable external stimuli, parameter variations or discrepancies between the system and the model act as distur- bances, which can obstruct the fault detection process and lead to false alarms. Thus, a fault detection filter needs to be decoupled from the disturbances. In this thesis the right eigenstructure assignment method used for the robust fault detection filter design is extended to systems with unstable invariant zeros. Another contribution re- gards the design of robust parity equations of any arbitrary order using both left and right eigenstructure assignment. Furthermore, a parity equation-based fault isolation and identification filter is designed which provides an estimate of the fault. A simple method for the calculation of thresholds whose violation indicates a fault occurrence is also proposed for the errors-in-variables framework.

A more accurate and flexible grid analysis is achieved through an adaptive and dynamic calculation of line parameters. This is needed for future smart grid implementation. The primary objective of this thesis is to analyze the calculation of transmission line parameters. The impact certain assumptions have on the accuracy of line parameters and fault location algorithms are evaluated. In particular, the impact of the grounded shield wire assumption on the accuracy of fault location algorithms is analyzed. This implies that the impedance of towers be taken into consideration, rather than the simplification of a direct connection of the earth wire to ground. Secondly, the phenomenon of skin-effect is analyzed and evaluated in regards to a more accurate representation of line parameters and a minimization of parameter inaccuracy. / text

The contribution of this dissertation is the development of a completely new and accurate algorithm SFSSE for synchronous fault simulation of sequential circuits. The distinctive difference between SFSSE (Synchronous Fault Simulation by Surrogate with Exceptions) and similar approaches for fault simulation in combinational logic circuits is that SFSSE is capable of handling faults stored in more than one memory elements and the reconvergence over time of the stored fault effect with the original fault. The experimental result shows a significant improvement for SFSSE by comparing its execution time to that of parallel fault simulation. After a stored fault list is established during one clock period, all paths from the output of that memory element to the primary outputs might be blocked in subsequent clock periods. A fault is usually propagated through many paths in various subnetworks over several clock periods, and it is detected when only one of these paths reaches a primary output. A new idea for efficiency is suggested in the last chapter to avoid the unproductive simulation activity. In that approach the waste of simulation time is avoided by overlapping the simulation of multiple clock periods.

Electrical transmission and distribution networks are prone to short circuit faults since they span over long distances to deliver the electrical power from generating units to where the energy is required. These faults are usually caused by vegetation growing underneath bare overhead conductors, large birds short circuiting the phases, mechanical failure of pin-type insulators or even insulation failure of cables due to wear and tear, resulting in creepage current. Short circuit faults are highly undesirable for distribution network companies since they cause interruption of supply, thus affecting the reliability of their network, leading to a loss of revenue for the companies. Therefore, accurate offline fault location is required to quickly tackle the repair of permanent faults on the system so as to improve system reliability. Moreover, it also provides a tool to identify weak spots on the system following transient fault events such that these future potential sources of system failure can be checked during preventive maintenance. With these aims in mind, a novel fault location technique has been developed to accurately determine the location of short circuit faults in a distribution network consisting of feeders and spurs, using only the phase currents measured at the outgoing end of the feeder in the substation. These phase currents are analysed using the Discrete Wavelet Transform to identify distinct features for each type of fault. To achieve better accuracy and success, the scheme firstly uses these distinct features to train an Artificial Neural Network based algorithm to identify the type of fault on the system. Another Artificial Neural Network based algorithm dedicated to this type of fault then identifies the location of the fault on the feeder or spur. Finally, a series of Artificial Neural Network based algorithms estimate the distance to the point of fault along the feeder or spur. The impact of wind farm connections consisting of doubly-fed induction generators and permanent magnet synchronous generators on the accuracy of the developed algorithms has also been investigated using detailed models of these wind turbine generator types in Simulink. The results obtained showed that the developed scheme allows the accurate location of the short circuit faults in an active distribution network. Further sensitivity tests such as the change in fault inception angle, fault impedance, line length, wind farm capacity, network configuration and white noise confirm the robustness of the novel fault location technique in active distribution networks.

Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.

Fault location in distribution systems is a critical component of outage management and service restoration, which directly impacts feeder reliability and quality of the electricity supply. Improving fault location methods supports the Department of Energy (DOE) “Grid 2030” initiatives for grid modernization by improving reliability indices of the network. Improving customer average interruption duration index (CAIDI) and system average interruption duration index (SAIDI) are direct advantages of utilizing a suitable fault location method. As distribution systems are gradually evolving into smart distribution systems, application of more accurate fault location methods based on gathered data from various Intelligent Electronic Devices (IEDs) installed along the feeders is quite feasible. How this may be done and what is the needed methodology to come to such solution is raised and then systematically answered. To reach this goal, the following tasks are carried out: 1) Existing fault location methods in distribution systems are surveyed and their strength and caveats are studied. 2) Characteristics of IEDs in distribution systems are studied and their impacts on fault location method selection and implementation are detailed. 3) A systematic approach for selecting optimal fault location method is proposed and implemented to pinpoint the most promising algorithms for a given set of application requirements. 4) An enhanced fault location method based on voltage sag data gathered from IEDs along the feeder is developed. The method solves the problem of multiple fault location estimations and produces more robust results. 5) An optimal IED placement approach for the enhanced fault location method is developed and practical considerations for its implementation are detailed.