A Discrete Extended Kalman Filter has been designed to process measurements from a magnetometer, sun sensor, IMU, and GPS receiver to provide the relative position, velocity, attitude, and gyro bias of a chaser spacecraft relative to a target spacecraft. An Extended Kalman Filter with Uncompensated Bias has also been developed for the implementation of well known biases and errors that are not directly observable. A detailed explanation of the algorithms, models, and derivations that go into both filters is presented. With this simulation and specific sensor selection the position of the chaser spacecraft relative to the target can be estimated to within about 5 m, the velocity to within .1 m/s, and the attitude to within 2 degrees for both filters. If a thrust is applied to the IMU measurements, it takes about 1.5 minutes to get a good position estimate, using the Extended Kalman Filter with Uncompensated Bias. The error settles almost immediately using the general Extended Kalman Filter. These filters have been designed for and can be implemented on almost any small, low cost, low power satellite with this inexpensive set of sensors. / text

This dissertation mainly discuses various microstrip bandpass filter (BPF) designs. The filter designs include: a coupled line BPF using nonuniform arbitrary image impedances, miniaturized BPF utilizing dumbbell shaped slot resonator (DSSR), BPF employing isosceles triangle shaped patch resonator (ITSPR), BPF with a complimentary split ring resonator (CSRR) and triple-band BPF (TBBPF). In the coupled line BPF designs, a capacitive gap-coupled BPF and parallel coupled line BPF are introduced, where two different arbitrary image impedances are applied for the designs. Based on the proposed equivalent circuit model, the coupled BPF's design equations are derived, and they are validated from comparisons of the calculated and simulated results. For a miniaturized BPF, the DSSR is utilized in the filter design. An equivalent circuit model of the DSSR is also presented and validated through simulations and measurements. The ITSPR is introduced for simple BPF and diplexer designs. The ITSPR's design equations, effective dielectric constant, and fractional bandwidth are discussed, and their validities are demonstrated from electromagnetic (EM) simulations and measurements. The coupled type complementary split ring resonator (CSRR) is introduced for a compact direct-coupled BPF. The proposed unit cell of the resonator consists of two CSRRs, where gaps of outside rings face each other to achieve a strong cross coupling. For an analysis of the coupled CSRR, an equivalent circuit model is discussed and validated through circuit and EM simulations. Based on the coupled CSRR structure, two-/four- pole direct-coupled BPFs are designed, simulated, and measured. The TBBPF design using admittance inverters are presented. In the TBBPF design, the center frequencies and fractional bandwidths (FBW) of each passband can be adjustable. Low cost phased array systems operating from 8 to 12 GHz are introduced. A phased array using a piezoelectric transducer (PET) phase shifter is designed and tested. Compared to the phased array using the PET phase shifter, another phased array utilizing 4-bit monolithic microwave integrated circuit (MMIC) phase shifters is demonstrated. Both phased array systems are simple and easy to fabricate.

A fully-differential base-band transimpedance low-pass filter is designed for use in a direct conversion wireless receiver. Existing base-band transimpedance amplifiers (TIA) often utilize single-pole filters which do not provide good stop-band rejection and may even allow the filter to saturate in the presence of large interferers near the edge of the pass-band. The designed filter is placed in parallel with an existing single-pole TIA filter and diverts stop-band current signals away from the existing filter, providing added rejection and safeguarding the filter from saturating. The presented filter has a bandwidth of 10 MHz, achieves 35 dB rejection at 50 MHz (25 dB in post-layout simulations), and can process interferers as large as 10 mA. The circuit is designed in Jazz 0.18 m CMOS technology, and it is shown, using macromodels, that the design is scalable to smaller, faster technologies.

This thesis studies spatial and temporal filtering techniques and their applications in fiber optic communication systems. Differential mode delay (DMD) in multimode fibers (MMFs) and multipath interference (MPI) are two major impairments in fiber optic communication systems. DMD lends to inter symbol interference in MMF communication systems which seriously limit the bit rate-distance product of the system. MPI leads to interference pattern at the output of a single mode fiber link which increases the bit error rate of the system. In this thesis, we propose a method which uses spatial filtering technique in a 4F system to reduce DMD and MPI effects. Typically, higher order modes have higher spatial frequency components and therefore, they are spatially separated from the lower mode after Fourier transform. By optimizing the bandwidth of a spatial filter, unwanted higher order modes can be suppressed. Therefore, DMD and MPI effects in fiber optic communication systems can be reduced at the cost of losing some fraction of the signal power. In this thesis, we also propose a new application of temporal filtering technique. A time lens is a phase modulator which introduces a quadratic phase factor in time domain. Combined with single mode fibers, a time lens can be used to perform Fourier transform in time domain. A tunable optical filter can be implemented using a modified temporal 4F system which is analogy with the spatial 4F system. The merit of this method is that no additional signal processing is needed to reverse the bit sequence at the output of the 4F system and that the channels to be demultiplexed at a node can be dynamically reconfigured. / Thesis / Master of Applied Science (MASc)

FIR filters occupy a central place many signal processing applications which either alter the shape, frequency or the sampling frequency of the signal. FIR filters are used because of their stability and possibility to have linear-phase but require a high filter order to achieve the same magnitude specifications as compared to IIR filters. Depending on the size of the required transition bandwidth the filter order can range from tens to hundreds to even thousands. Since the implementation of the filters in digital domain requires multipliers and adders, high filter orders translate to a large number of these arithmetic units for its implementation. Research towards reducing the complexity of FIR filters has been going on for decades and the techniques used can be roughly divided into two categories; reduction in the number of multipliers and simplification of the multiplier implementation.  One technique to reduce the number of multipliers is to use cascaded sub-filters with lower complexity to achieve the desired specification, known as FRM. One of the sub-filters is a upsampled model filter whose band edges are an integer multiple, termed as the period L, of the target filter's band edges. Other sub-filters may include complement and masking filters which filter different parts of the spectrum to achieve the desired response. From an implementation point-of-view, time-multiplexing is beneficial because generally the allowable maximum clock frequency supported by the current state-of-the-art semiconductor technology does not correspond to the application bound sample rate. A combination of these two techniques plays a significant role towards efficient implementation of FIR filters. Part of the work presented in this dissertation is architectures for time-multiplexed FRM filters that benefit from the inherent sparsity of the periodic model filters. These time-multiplexed FRM filters not only reduce the number of multipliers but lowers the memory usage. Although the FRM technique requires a higher number delay elements, it results in fewer memories and more energy efficient memory schemes when time-multiplexed. Different memory arrangements and memory access schemes have also been discussed and compared in terms of their efficiency when using both single and dual-port memories. An efficient pipelining scheme has been proposed which reduces the number of pipelining registers while achieving similar clock frequencies. The single optimal point where the number of multiplications is minimum for non-time-multiplexed FRM filters is shown to become a function of both the period, L and time-multiplexing factor, M. This means that the minimum number of multipliers does not always correspond to the minimum number of multiplications which also increases the flexibility of implementation. These filters are shown to achieve power reduction between 23% and 68% for the considered examples. To simplify the multiplier, alternate number systems like the LNS have been used to implement FIR filters, which reduces the multiplications to additions. FIR filters are realized by directly designing them using ILP in the LNS domain in the minimax sense using finite word length constraints. The branch and bound algorithm, a typical algorithm to implement ILP problems, is implemented based on LNS integers and several branching strategies are proposed and evaluated. The filter coefficients thus obtained are compared with the traditional finite word length coefficients obtained in the linear domain. It is shown that LNS FIR filters provide a better approximation  error compared to a standard FIR filter for a given coefficient word length. FIR filters also offer an opportunity in complexity reduction by implementing the multipliers using Booth or standard high-radix multiplication. Both of these multiplication schemes generate pre-computed multiples of the multiplicand which are then selected based on the encoded bits of the multiplier. In TDF FIR filters, one input data is multiplied with a number of coefficients and complexity can be reduced by sharing the pre-computation of the multiplies of the input data for all multiplications. Part of this work includes a systematic and unified approach to the design of such computation sharing multipliers and a comparison of the two forms of multiplication. It also gives closed form expressions for the cost of different parts of multiplication and gives an overview of various ways to implement the select unit with respect to the design of multiplexers. Particle filters are used to solve problems that require estimation of a system. Improved resampling schemes for reducing the latency of the resampling stage is proposed which uses a pre-fetch technique to reduce the latency between 50% to 95%  dependent on the number of pre-fetches. Generalized division-free architectures and compact memory structures are also proposed that map to different resampling algorithms and also help in reducing the complexity of the multinomial resampling algorithm and reduce the number of memories required by up to 50%.

No description available.

In this thesis, we propose a miniaturized LTCC balanced filter that integrates bandpass filter (BPF) and balun. In order to reject interferences, we have the transmission zero of out-band by extra capacities and inductances in the prototype of Second-Order BPF. On the other hand, we miniaturize the balun by revising the length of couple-line with four shunt capacities. The practice size of the miniaturized balanced filter is 2.0mm x 1.25mm x 0.95mm.The insertion and return losses are less than -2.5dB and -20dB over operating frequency band, respectively. The phase difference is less than 5 ¢X, and the amplitude difference is within -0.5dB in operating frequency band. The size is the smallest in the similar commercial product and relative journal.

Conventional gm-c filters have limited voltage swings in low voltage operation. CMOS companding filters replace gm-c filters in low voltage environment for high dynamic range. The square-root domain filter and log-domain filter belongs to this companding filter category. In this thesis, a second order low pass square root domain filter (SRD filter) based on the up-down TL (translinear loop) circuit structure is presented. The SRD filter consists of four geometric-mean cells and three squarer/divider cells. The advantages of the proposed circuits are low supply voltage, low power consumption, high bandwidth, and low total harmonic distortion (THD). The circuit has been fabricated with 0.35£gm CMOS technology. It operates with a supply voltage of 1.5V, and the bias current varies from 0.5£gA to 30£gA. Measurement results show that the cutoff frequency can be tuned from 3.12MHz to 8.11MHz when the Capacitance (C) is 5pF.The total harmonic distortion is 0.28%, and the power consumption is 1.09mW.

This thesis involves restoration, reconstruction, and enhancement of a digitized library of hand-written documents. Imaging systems that perform this digitization often degrade the quality of the original documents. Many techniques exist for reconstructing, restoring, and enhancing digital images; however, many require <i> a priori </i> knowledge of the imaging system. In this study, only partial <i> a priori </i> knowledge is available, and therefore unknown parameters must be estimated before restoration, reconstruction, or enhancement is possible. The imaging system used to digitize the documents library has degraded the images in several ways. First, it has introduced a ringing that is apparent around each stroke. Second, the system has eliminated strokes of narrow widths. To restore these images, the imaging system is modeled by estimating the point spread function from sample impulse responses, and the image noise is estimated in an attempt to apply standard linear restoration techniques. The applicability of these techniques is investigated in the first part of this thesis. Then nonlinear filters, structural techniques, and enhancement techniques are applied to obtain substantial improvements in image quality. / Master of Science

ITC/USA 2006 Conference Proceedings / The Forty-Second Annual International Telemetering Conference and Technical Exhibition / October 23-26, 2006 / Town and Country Resort & Convention Center, San Diego, California / Most modern digital filtering is done by taking the average (mean) of a signal or some weighted average. Another method is to use feedback, which more closely resembles how analog filters with feedback operate. In the case of low pass filters, all these methods tend to give a trade off in getting the signal to pass while attenuating the higher frequency noise. An alternative is to use a median filter, which selects the mid value of a group of points. While this is not as computationally simple as other filters, it allows for the attenuation of noise while allowing sudden changes in signal level to pass thru unaltered. This paper discusses the characteristics of median filters and methods of implementing them.