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Elektromagnetická kompatibilita spínaných napájecích zdrojů / EMC of switched-mode power suppliesOlivík, Lukáš January 2012 (has links)
The goal of this thesis is to design flyback converter with given parameters complying with standards for electromagnetic compatibility. This thesis describes detailed design of the flyback converter. It summarizes the recommendations for PCB design. Knowledge from number of comparative measurements of the impact of component selection on conducted emission signature was applied during the flyback converter design. Big part of the thesis is aimed on conducted emission measurement and separation of common mode and differential mode emissions. The simple and fast Time domain measurement of conducted emission is described. Final measurement of designed converter was performed at the end of the thesis.
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New leading/trailing edge modulation strategies for two-stage AC/DC PFC adapters to reduce DC-link capacitor ripple currentSun, Jing 17 September 2007 (has links)
AC/DC adapters mostly employ two-stage topology: Power Factor Correction (PFC) pre-regulation stage followed by an isolated DC/DC converter stage. Low power AC/DC adapters require a small size to be competitive. Among their components, the bulk DC-link capacitor is one of the largest because it should keep the output voltage with low ripple. Also, the size of this capacitor is penalized due to the universal line voltage application. Synchronization through employing leading edge modulation for the first PFC stage and trailing edge modulation for the second DC/DC converter stage can significantly reduce the ripple current and ripple voltage of the DC-link capacitor. Thus, a smaller DC-link capacitance can be used, lowering the cost and size of the AC/DC adapter. Benefits of the synchronous switching scheme were already demonstrated experimentally. However, no mathematical analysis was presented. In this thesis, detailed mathematical analyses in per-unit quantity are given to facilitate the calculation of the DC-link capacitor ripple current reduction with Leading/Trailing Edge Modulation strategies. One of the limitations of leading/trailing edge modulation is that the switching frequencies of the two stages need to be equal to achieve the best reduction of the DC-link capacitor ripple current. The DC-link capacitor ripple current will become larger if the switching frequency of the DC/DC converter is larger than that of the PFC pre-regulator, which blocks us to employ higher frequency for isolated DC/DC converter to reduce its transformer size. This thesis proposed a new Leading/Trailing Edge Modulation strategy to further reduce the DC-link bulk capacitor ripple current when switching frequency of DC/DC converter stage is twice the switching frequency of PFC stage. This proposed pulse width modulation scheme was verified by simulation. Experimental results obtained through digital control based on FPGA are also presented in this thesis.
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New leading/trailing edge modulation strategies for two-stage AC/DC PFC adapters to reduce DC-link capacitor ripple currentSun, Jing 17 September 2007 (has links)
AC/DC adapters mostly employ two-stage topology: Power Factor Correction (PFC) pre-regulation stage followed by an isolated DC/DC converter stage. Low power AC/DC adapters require a small size to be competitive. Among their components, the bulk DC-link capacitor is one of the largest because it should keep the output voltage with low ripple. Also, the size of this capacitor is penalized due to the universal line voltage application. Synchronization through employing leading edge modulation for the first PFC stage and trailing edge modulation for the second DC/DC converter stage can significantly reduce the ripple current and ripple voltage of the DC-link capacitor. Thus, a smaller DC-link capacitance can be used, lowering the cost and size of the AC/DC adapter. Benefits of the synchronous switching scheme were already demonstrated experimentally. However, no mathematical analysis was presented. In this thesis, detailed mathematical analyses in per-unit quantity are given to facilitate the calculation of the DC-link capacitor ripple current reduction with Leading/Trailing Edge Modulation strategies. One of the limitations of leading/trailing edge modulation is that the switching frequencies of the two stages need to be equal to achieve the best reduction of the DC-link capacitor ripple current. The DC-link capacitor ripple current will become larger if the switching frequency of the DC/DC converter is larger than that of the PFC pre-regulator, which blocks us to employ higher frequency for isolated DC/DC converter to reduce its transformer size. This thesis proposed a new Leading/Trailing Edge Modulation strategy to further reduce the DC-link bulk capacitor ripple current when switching frequency of DC/DC converter stage is twice the switching frequency of PFC stage. This proposed pulse width modulation scheme was verified by simulation. Experimental results obtained through digital control based on FPGA are also presented in this thesis.
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Highly Integrated Dc-dc ConvertersJia, Hongwei 01 January 2010 (has links)
A monolithically integrated smart rectifier has been presented first in this work. The smart rectifier, which integrates a power MOSFET, gate driver and control circuitry, operates in a self-synchronized fashion based on its drain-source voltage, and does not need external control input. The analysis, simulation, and design considerations are described in detail. A 5V, 5-µm CMOS process was used to fabricate the prototype. Experimental results show that the proposed rectifier functions as expected in the design. Since no dead-time control needs to be used to switch the sync-FET and ctrl-FET, it is expected that the body diode losses can be reduced substantially, compared to the conventional synchronous rectifier. The proposed self-synchronized rectifier (SSR) can be operated at high frequencies and maintains high efficiency over a wide load range. As an example of the smart rectifier's application in isolated DC-DC converter, a synchronous flyback converter with SSR is analyzed, designed and tested. Experimental results show that the operating frequency could be as high as 4MHz and the efficiency could be improved by more than 10% compared to that when a hyper fast diode rectifier is used. Based on a new current-source gate driver scheme, an integrated gate driver for buck converter is also developed in this work by using a 0.35µm CMOS process with optional high voltage (50V) power MOSFET. The integrated gate driver consists both the current-source driver for high-side power MOSFET and low-power driver for low-side power iv MOSFET. Compared with the conventional gate driver circuit, the current-source gate driver can recovery some gate charging energy and reduce switching loss. So the current-source driver (CSD) can be used to improve the efficiency performance in high frequency power converters. This work also presents a new implementation of a power supply in package (PSiP) 5MHz buck converter, which is different from all the prior-of-art PSiP solutions by using a high-Q bondwire inductor. The high-Q bondwire inductor can be manufactured by applying ferrite epoxy to the common bondwire during standard IC packaging process, so the new implementation of PSiP is expected to be a cost-effective way of power supply integration.
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High-frequency Quasi-square-wave Flyback RegulatorZhang, Zhemin 02 December 2016 (has links)
Motivated by the recent commercialization of gallium-nitride (GaN) switches, an effort was initiated to determine whether it was feasible to switch the flyback converter at 5 MHz in order to improve the power density of this versatile isolated topology. Soft switching techniques have to be utilized to eliminate the switching loss to maintain high efficiency at multi-megahertz. Compared to the traditional modeling of zero-voltage-switching quasi-square-wave converters, a numerical methodology of parameters design is proposed based on the steady-state model of zero-voltage switching quasi-square-wave flyback converter. The magnetizing inductance is selected to guarantee zero-voltage switching for the entire input and load range with the trade-off design for conduction loss and turn-off loss.
A design methodology is introduced to select a minimum core volume for an inductor or coupled inductors experiencing appreciable core loss. The geometric constant Kgac = MLT/(Ac2WA) is shown to be a power function of the core volume Ve, where Ac is the effective core area, WA is the area of the winding window, and MLT is the mean length per turn for commercial toroidal, ER, and PQ cores, permitting the total loss to be expressed as a direct function of the core volume. The inductor is designed to meet specific loss or thermal constraints. An iterative procedure is described in which two- or three-dimensional proximity effects are first neglected and then subsequently incorporated via finite-element simulation. Interleaved and non-interleaved planar PCB winding structures were also evaluated to minimize leakage inductance, self-capacitance and winding loss. The analysis on the trade-off between magnetic size, frequency, loss and temperature indicated the potential for a higher density flyback converter.
A small-signal equivalent circuit of QSW converter was proposed to design the control loop and to understand the small-signal behavior. By adding a simple damping resistor on the traditional small-signal CCM model, it can predict the pole splitting phenomenon observed in QSW converter. With the analytical expressions of the transfer functions of QSW converters, the impact of key parameters including magnetizing inductance, dead time, input voltage and output power on the small-signal behavior can be analyzed. The closed-loop bandwidth can be pushed much higher with this modified model, and the transient performance is significantly improved.
With the traditional fix dead-time control, a large amount of loss during dead time occurred, especially for the eGaN FETs with high reverse voltage drop. An adaptive dead time control scheme was implemented with simple combinational logic circuitries to adjust the turn on time of the power switches. A variable deadtime control was proposed to further improve the performance of adaptive dead-time control with simplified sensing circuit, and the extra conduction loss caused by propagation delay in adaptive dead-time control can be minimized at multi-megahertz frequency. / Ph. D. / With the fast development of telecom, computer and network systems, high efficient and small volume power supplies are highly desired. A typical method for achieving high power density involves increasing the frequency and implement soft-switching techniques to minimize loss. Thanks to the recent commercialization of the advanced semiconductor gallium-nitride (GaN) switches, it is feasible to design high density power supplies and cost effective power system.
Several challenges including optimization of power converter, high frequency magnetics and implementation of control architecture have been addressed in this dissertation which helps to realize this compact power system. With the implementation of proposed circuit model and seminumerical design procedures for magnetics, a 30W high-frequency isolated DC/DC converter with planar inductor is fabricated to verify the theoretical analysis, which also demonstrates much improved performances.
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Zvyšování účinnosti a optimalizace výkonových pulzních měničů / Efficiency Improvement and Optimization of High Power Switching ConvertersMartiš, Jan January 2018 (has links)
This thesis focuses on optimization and increasing the efficiency of high-power DC/DC switching converters with transformer (switching power supplies). The work focuses mainly on using converters with flyback topology for high power, even though it is a common belief that this type of converter is not suitable for high power. This topology was selected because of potentially better achievable parameters, especially the efficiency, in comparison to a commonly used forward converter – in a flyback converter, losses are produced only in one magnetic component (transformer) in contrast to two components (transformer and inductor) in the forward converter. Compared to resonant and quasi-resonant converters, the flyback converter is easily controllable in the whole output voltage and current range. To make the flyback converter favorable for a high-power use, some innovative circuit modifications were made and modern semiconductor and passive components were used. Theoretical part of the work deals with efficiency optimization of the flyback converter, based on analytical solution. Operating parameters of the converter – switching frequency and parameters of the transformer (flux density and numbers of turns) are commonly only guessed or chosen from experience. The objective of this part is a mathematically exact determination of these parameters to achieve lowest total losses of the converter for given input parameters. In a certain case, it was possible to obtain the final solution analytically, in other cases the final solution step had to be done with a help of software. A prototype of a 12-kW switching power supply with a flyback converter was constructed to validate the proposed solutions and methods. The power supply fits into a space of only 33x33x16 cm. Modern semiconductors based on the silicon-carbide (SiC) technology (MOS-FET transistors and diodes) were used. After bringing the converter to a full-power operation, an efficiency of 96.8 % of the DC/DC converter was measured. High efficiency was obtained for a wide range of output parameters. A certain comparison with a forward converter with the same output parameters is done in the work. Not only from an efficiency point of view, the flyback converter seems very perspective.
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Univerzální napájecí zdroj s mikrokontrolérem / General-purpose power supply with microcontrollerJorda, Ivo January 2014 (has links)
The aim of this thesis is design of adjustable switched mode power supply with symmetrical output of 25 V, and switched mode power supply with fixed output voltage of 5 V. Required maximum output current of each outputs is 3 A. At the beginning of the paper function of the basic SMPS topologies is described. Next all reqiured SMPSs are designed and chosen parts of the design are simulated. In the second half of the thesis assembly and testing of PCB are described as well as functions of programs. Last chapter contains results of meassurement of power supply paramters.
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DESIGN AND IMPLEMENTATION OF AN ACTIVE CELL BALANCING OF A LITHIUM IRON PHOSPHATE (LIFEPO4) BATTERY MODULELukmon Ayodele Otunubi (18853648) 21 June 2024 (has links)
<p dir="ltr">Batteries have become essential for a wide range of applications in the field of energy storage and electrification, from portable gadgets to electric cars and renewable energy systems. But effectiveness, performance, and lifespan of a battery pack are closely related to each of the individual cells of which it is composed. The phenomenon of cell voltage imbalance, which can result in a variety of problems ranging from decreased capacity and efficiency to safety concerns and premature failure, poses a significant challenge in managing battery systems.</p><p dir="ltr">Therefore, battery cell balancing plays a crucial role in improving the overall performance of battery packs. To guarantee uniform charge and discharge characteristics, balancing is the process of equalizing the charge of individual cells inside a battery pack. Battery cell balancing seeks to prolong the operational life of packs, improve the efficiency of its energy use, and ensure the safety of the overall system.</p><p dir="ltr">The methods used for battery cell balancing encompass a wide range of approaches, from passive methods that release extra energy as heat, to active methods that move energy across cells. The particular battery chemistry, application requirements, and required level of balancing precision are only a few examples of the variables that influence the choice of balancing technique.</p><p dir="ltr">Lithium Iron Phosphate (LiFePO4) rechargeable batteries are widely used by electric utility companies in battery storage applications. Battery cells are combined to form a battery module. Each module is constantly monitored with sensors and controlled by a Battery Management System (BMS). The BMS performs balancing of the cells. Each cell in the battery stack is monitored to maintain a healthy battery state of charge (SoC). The motivation for this work is to develop an active balancing system to replace a passive system currently being performed manually on an existing battery storage system consisting of LiFePO4 cells. An active cell balancer was designed using the LT8584 active cell balancer, which is based on a flyback DC-DC converter design. An LTspice simulation of the design was created for a single cell. It demonstrates critical parameters of the flyback converter cycle time. A PCB board, designed using KiCAD, was implemented. It is anticipated that the proposed design could be used to restore the health of SoC of faulty modules in lieu of removing and replacing them with a new module, resulting in potential cost savings. The proposed design is scalable in that it could be used for <i>n</i> number of cells in a battery module consisting of LiFePO4 battery cells.</p>
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Μέθοδοι εξοικονόμησης ενέργειας σε ηλεκτροκίνητα οχήματα / Methods of energy saving in electric vehiclesΡίκος, Ευάγγελος 25 June 2007 (has links)
Σκοπός της παρούσας εργασίας είναι η μελέτη των βασικών τμημάτων που απαρτίζουν ένα ηλεκτρικό όχημα, με άμεσο στόχο τη μέγιστη δυνατή εξοικονόμηση ενέργειας. Προς την κατεύθυνση αυτή μελετάται αρχικά η βαθμίδα φόρτισης των συσσωρευτών. Παρουσιάζονται οι προδιαγραφές και προτείνεται ως βέλτιστη τοπολογία αυτή του Flyback η οποία αντιμετωπίζει λειτουργικές δυσκολίες. Έτσι προτείνεται μια ειδική μεθοδολογία σχεδιασμού βασιζόμενη στην επιλογή του λόγου του Μ/Τ. Επίσης προτείνεται ένα νέο κύκλωμα καταστολής των υπερτάσεων λόγω σκέδασης. Η αποτελεσματική λειτουργία επιβεβαιώνεται μέσω εξομοιώσεων και πειραματικών δοκιμών. Στο δεύτερο μέρος παρουσιάζεται ένα νέο κύκλωμα τροφοδοσίας. Πρόκειται για μετατροπέα μονής βαθμίδας με ένα τρανζίστορ κα αποτελεσματική καταστολή υπερτάσεων. Παράλληλα πραγματοποιεί βελτίωση του συντελεστή ισχύος του κυκλώματος. Στο τρίτο μέρος μελετάται το κινητήριο σύστημα και προτείνεται μια μέθοδος ελέγχου της μαγνητικής ροής και του λόγου μετάδοσης του κιβωτίου ταχυτήτων ώστε να επιτυγχάνεται η ελάχιστη δυνατή ενεργειακή κατανάλωση του οχήματος. Τα αποτελέσματα εξομοίωσης επιβεβαιώνουν την αποτελεσματικότητα της προτεινόμενης μεθόδου. / Basic aim of the present work is the analytical study of the basic part of an EV, in order to be obtained a good energy saving. For this purpose the charging unit of an EV is studied. The specifications which must fulfill this device are exhibited and the Flyback topology is suggested as the optimal. However it appears some important problems. For this purpose, a new strategy of design based on the transformer.
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Projeto e desenvolvimento de fontes auxiliares para transformadores de estado sólido / Design and development of auxiliary power supply for solid state transformersKehler, Leandro Becker 31 August 2015 (has links)
This master thesis presents the development of an auxiliary power supply to provide energy to sensors, gate drivers, instrumentation circuits and control of a three-stage Solid State Transformer (SST). These devices require an insulated power supply of ±15V and 5V. For reason of reliability and modularity, a distributed auxiliary source is proposed. Thus, it is necessary a power supply to provide energy to the low voltage (LV) side and another to the medium voltage (MV) side. With this proposal, the auxiliary power supply does not need to have the same galvanic insulation of the SST, 25kV. However, a local power supply must operate at high voltage levels and, consequently, contain a high step-down voltage gain. Relative to LV side, the most generally used topologies as an auxiliary power supply are discussed. However, these topologies cannot be used at the MV converters, due to the high voltage stress levels involved. A study of topologies used on medium and high voltage and which enable to reach a high step-down voltage gain is realized, and two interesting topologies for this application were found. One of them uses a Flying capacitor converter connected in cascade with a Double-Ended Flyback converter. The Flying capacitor converter lowers the DC bus voltage in a controlled manner to low voltage levels. So the Double-ended Flyback converter operates in LV and provides the insulated outputs to command circuits of SST. The other topology is a unidirectional four-level NPC converter operating as Double-ended Flyback converter. For this case, a modulation strategy that allows the converter to reach a high step-down voltage gain was also proposed. These topologies were evaluated and the one which showed the best result was the four-level Double-ended Flyback converter. This converter was implemented and the experimental results prove to be effective. For the LV side, a Half-bridge LLC resonant converter as auxiliary power supply was used. This converter operates in ZVS and performs the output voltage regulation through the operating frequency variation. The experimental results of this converter are also presented. / Este trabalho de mestrado apresenta o desenvolvimento de fontes auxiliares para alimentar sensores, circuitos de comando, instrumentação e o controle de um Transformador de Estado Sólido (SST) de três estágios. Estes dispositivos necessitam de alimentação isolada com tensões de ±15V e 5V e por questões de confiabilidade e modularidade, propõe-se a utilização de fontes auxiliares distribuídas. Assim, emprega-se uma fonte auxiliar para alimentar o lado de média tensão (MT) e outra para alimentar o lado de baixa tensão (BT). Com essa proposta, as fontes auxiliares não necessitam ter a mesma isolação galvânica do SST, 25kV. Entretanto, uma das fontes locais deve operar em níveis de tensão elevados e, por consequência, apresentar baixo ganho estático. No lado de BT, as principais topologias normalmente utilizadas como fonte auxiliar são discutidas. No entanto, devido aos altos níveis de tensão envolvidos, estas topologias não podem ser aplicadas ao conversor que opera em MT. Um estudo sobre topologias aplicadas a média tensão e que possibilitam alcançar um baixo ganho estático é realizado, sendo que duas topologias se mostram interessantes para esta aplicação. Uma consiste na utilização de um conversor de capacitores flutuantes conectado em cascata com um conversor Double-Ended Flyback. O conversor de capacitores flutuantes rebaixa a tensão do barramento CC, de forma controlada, para baixa tensão. Assim o Double-Ended Flyback opera em BT e fornece as saídas isoladas para alimentar os circuitos de comando do SST. A outra topologia trata-se de um conversor NPC de quatro níveis unidirecional operando como conversor Double-Ended Flyback. Para este caso, também foi proposta uma estratégia de modulação que permite o conversor alcançar o baixo ganho estático. Essas topologias foram avaliadas, apresentando melhor resultado a esta aplicação o conversor Double-ended Flyback de quatro níveis, conforme será demonstrado neste trabalho. Esse conversor foi implementado e os resultados experimentais comprovam o seu funcionamento. Para a fonte do lado de BT utilizou-se um conversor Half-Bridge LLC ressonante que opera em ZVS e realiza a regulação da tensão de saída pela variação da frequência de operação. Os resultados experimentais deste conversor também são apresentados.
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