This thesis includes two topics. The first topic is a programmable DLL-based frequency multiplier, which can be a local oscillator in RF applications. The second one is a ROM-less direct digital frequency synthesizer to serve as a good reference clock or to be used in digital modulation and demodulation. A CMOS local oscillator using a programmable DLL-based frequency multiplier is presented. In this work, low-Q on-chip inductors are not needed. The clock of the output frequency is digitally controllable, which is ranged from 7´ to 10´ of an input reference clock. The design is carried out by TSMC 1P5M 0.25 mm CMOS process at 2.5 V power supply. The output frequency range of the physical chips measurement is about 1.0 GHz ~ 1.5 GHz. Maximum power dissipation is 58.2 mW at 1.5 GHz output. A ROM-less direct digital frequency synthesizer (DDFS) employing trigonometric quadruple angle formula is presented. In a system-level simulation, the spurious tones performance is suppressed to be lower than -130 dBc. The resolution is up to 13 bits. The maximum error is also analyzed mathematically to meet the simulation results.

Terahertz source technology has been an active area of research for a number of years. This has helped develop continuous wave solid-state sources that are highly desirable in a wide range of applications spanning from Earth science to medical science. However, even with advances in terahertz technology, the generation of fundamental source power at these frequencies is still challenging. Promising electronic solid-state devices fall short in overcoming source power shortage due to electronic breakdown mechanism and fabrication limits at terahertz frequencies. The fundamental physical limitation of photonic devices, such as low photon energy, force cryogenic operation which at times is impractical. Schottky diode frequency multipliers often offer a very practical solution for generating continuous wave radiation based on solid-state technology. This harmonic source technology is today a most certain candidate for many applications where compactness and room temperature operation is desired. However, despite of all the advances in Schottky diode fabrication and their use in frequency multiplication, output power falls rapidly with increasing frequency. Thermal constrains, fabrication limits, assembly errors and parasitic losses all constitute changes that affect the performance of these devices and make it difficult to reproduce experimental data. To overcome these problems and progress towards the generation of milliwatts of power at terahertz frequencies, the study of existing methods to generate and handle high power is necessary. In the first part of the thesis, the design, fabrication and development of two Schottky diode-based frequency doublers is discussed. The work focuses on the generation of high-power sources that are capable of handling higher input powers while maintaining good thermal efficiencies. A detailed study into the machining tolerances, assembly errors and temperature effects are evaluated for the frequency doublers. High frequency effect such as velocity saturation is also addressed. Depending on the design frequency and power handling, two different circuit configurations are employed for the frequency doublers. While the high-power 80/160 GHz frequency doubler used a discrete flip-chip diode configuration, the 160/320 GHz frequency doubler employed an integrated diode membrane to mitigate sensitivity issues encountered during assembly and enable correlation between simulated and measured data. The second part proposes the use of millimeter-wave Schottky diode-based radiometers for imaging of composites samples. The focus of this experiment is the introduction of an alternate EM inspection method with the use of broadband Schottky diode components. This technique combines two different fields {--} non-destructive testing and radiometry, which presents a potentially new and interesting area for research. Since no single method can qualify to be the most accurate for all inspections, and with the future integration bringing down manufacturing costs of high frequency components, this demonstration presents a new approach to consider for future material imaging and evaluation experiments.

<p>Automotive Radars have introduced various functions on automobiles for driver’s safety and comfort, as part of the Intelligent Transportation System (ITS) including Adaptive Cruise Control (ACC), collision warning or avoidance, blind spot surveillance and parking assistance. Although such radar systems with 24 GHz carrier frequency are already in use but due to some regulatory issues, recently a permanent band has been allocated at 77-81 GHz, allowing for long-term development of the radar service. In fact, switchover to the new band is mandatory by 2014.</p><p>A frequency multiplier will be one of the key components for such a millimeter wave automotive radar system because there are limitations in direct implementation of low phase noise oscillators at high frequencies. A practical way to build a cost-effective and stable source at higher frequency is to use an active multiplier preceded by a high spectral purity VCO operating at a lower frequency. Recent improvements in the performance of SiGe technology allow the silicon microelectronics to advance into areas previously restricted to compound semiconductor devices and make it a strong competitor for automotive radar applications at 79 GHz.</p><p>This thesis presents the design of active frequency doubler circuits at 20 GHz in a commercially available SiGe BiCMOS technology and at 40GHz in SiGe bipolar technology (Infineon-B7h200 design). Buffer/amplifier circuits are included at output stages to drive 50 Ω load. The frequency doubler at 20 GHz is based on an emitter-coupled pair operating in class-B configuration at 1.8 V supply voltage. Pre-layout simulations show its conversion gain of 10 dB at -5 dBm input, fundamental suppression of 25dB and NF of 12dB. Input and output impedance matching networks are designed to match 50 Ω at both sides.</p><p>The millimeter wave frequency doubler is designed for 5 V supply voltage and has the Gilbert cell-based differential architecture where both RF and LO ports are tied together to act as a frequency doubler. Both pre-layout and post-layout simulation results are presented and compared together. The extracted circuit has a conversion gain of 8 dB at -8 dB input, fundamental suppression of 20 dB, NF of 12 dB and it consumes 42 mA current from supply. The layout occupies an area of 0.12 mm2 without pads and baluns at both input and output ports. The frequency multiplier circuits have been designed using Cadence Design Tool.</p>

Automotive Radars have introduced various functions on automobiles for driver’s safety and comfort, as part of the Intelligent Transportation System (ITS) including Adaptive Cruise Control (ACC), collision warning or avoidance, blind spot surveillance and parking assistance. Although such radar systems with 24 GHz carrier frequency are already in use but due to some regulatory issues, recently a permanent band has been allocated at 77-81 GHz, allowing for long-term development of the radar service. In fact, switchover to the new band is mandatory by 2014. A frequency multiplier will be one of the key components for such a millimeter wave automotive radar system because there are limitations in direct implementation of low phase noise oscillators at high frequencies. A practical way to build a cost-effective and stable source at higher frequency is to use an active multiplier preceded by a high spectral purity VCO operating at a lower frequency. Recent improvements in the performance of SiGe technology allow the silicon microelectronics to advance into areas previously restricted to compound semiconductor devices and make it a strong competitor for automotive radar applications at 79 GHz. This thesis presents the design of active frequency doubler circuits at 20 GHz in a commercially available SiGe BiCMOS technology and at 40GHz in SiGe bipolar technology (Infineon-B7h200 design). Buffer/amplifier circuits are included at output stages to drive 50 Ω load. The frequency doubler at 20 GHz is based on an emitter-coupled pair operating in class-B configuration at 1.8 V supply voltage. Pre-layout simulations show its conversion gain of 10 dB at -5 dBm input, fundamental suppression of 25dB and NF of 12dB. Input and output impedance matching networks are designed to match 50 Ω at both sides. The millimeter wave frequency doubler is designed for 5 V supply voltage and has the Gilbert cell-based differential architecture where both RF and LO ports are tied together to act as a frequency doubler. Both pre-layout and post-layout simulation results are presented and compared together. The extracted circuit has a conversion gain of 8 dB at -8 dB input, fundamental suppression of 20 dB, NF of 12 dB and it consumes 42 mA current from supply. The layout occupies an area of 0.12 mm2 without pads and baluns at both input and output ports. The frequency multiplier circuits have been designed using Cadence Design Tool.

Microwave frequency multipliers are very useful and advantageous components in microwave systems, especially, where the generation of high frequency sinusoidal signals is very difficult because of degrading performance of the solid state oscillators with increasing frequency. These components are frequently employed in diverse applications such as commercial wireless communication systems, microwave transmitters and receivers, and military systems. In the following work the basic principles of microwave FET frequency multipliers, specifically concentrated on triplers, are studied presenting theoretical concept and utilizing computerized simulation of piecewise linear FET (PLF) model. The use of PLF model which neglects nonlinear reactances and relies on resistive nonlinearities allows for the theoretical concept and, consequently, the multiplication mechanism in a frequency multiplier to be clearly and easily identified. At the end of this study, after presenting basic considerations on FET frequency multipliers a practical microwave frequency tripler design is presented.

No description available.

Signal generation at high frequency has become increasingly important in numerous wireline and wireless applications. In many gigahertz and millimeter-wave frequency ranges, conventional frequency generation techniques have encountered several design challenges in terms of frequency tuning range, phase noise, and power consumption. Recently, injection locking has been a popular technique to solve these design challenges for frequency generation. However, the narrow locking range of the injection locking techniques limits their use. Furthermore, they suffer from significant reference spur issues. This dissertation presents novel frequency generation techniques based on envelope detection for low-phase-noise signal generation using injection-locked frequency multipliers (ILFMs). Several calibration techniques using envelope detection are introduced to solve conventional problems in injection locking. The proposed topologies are demonstrated with 0.13um CMOS technology for the following injection-locked frequency generators. First, a mixed-mode injection-frequency locked loop (IFLL) is presented for calibrating locking range and phase noise of an injection-locked oscillator (ILO). The IFLL autonomously tracks the injection frequency by processing the AM modulated envelope signal bearing a frequency difference between injection frequency and ILO free-running frequency in digital feedback. Second, a quadrature injection-locked frequency tripler using third-harmonic phase shifters is proposed. Two capacitively-degenerated differential pairs are utilized for quadrature injection signals, thereby increasing injection-locking range and reducing phase error. Next, an injection-locked clock multiplier using an envelope-based frequency tracking loop is presented for a low phase noise signal and low reference spur. In the proposed technique, an envelope detector constantly monitors the VCO's output waveform distortion caused by frequency difference between the VCO frequency and reference frequency. Therefore, the proposed techniques can compensate for frequency variation of the VCO due to PVT variations. Finally, this dissertation presents a subharmonically injection-locked PLL (SILPLL), which is cascaded with a quadrature ILO. The proposed SILPLL adopts an envelope-detection based injection-timing calibration for synchronous reference pulse injection into a VCO. With one of the largest frequency division ratios (N=80) reported so far, the SILPLL can achieve low RMS jitter and reference spur. / Ph. D. / Signal generation at high frequency has become increasingly important in numerous wireline and wireless applications. In many gigahertz and millimeter-wave frequency ranges, conventional frequency generation techniques have encountered several design challenges in terms of frequency tuning range, phase noise, and power consumption. Recently, injection locking which synchronizes a signal frequency has been a popular technique to solve these design challenges for frequency generation. However, narrow operation ranges of the injection locking techniques limit their use. Furthermore, they suffer from significant noise degradation. This dissertation presents studies of frequency generation techniques based on envelope detection (amplitude modulation) for low-phase-noise signal generation using injection-locked frequency multipliers. Several calibration techniques using envelope detection are introduced to solve conventional problems in injection locking. First, a mixed-mode injection-frequency locked loop is presented for calibrating locking range and phase noise of an injection-locked oscillator. Second, a quadrature injection-locked frequency tripler using third-harmonic phase shifters is proposed to increase injection-locking range and reduce phase error. Third, an injection-locked frequency multiplier using an envelope-based frequency tracking loop is presented for a low phase noise signal and low noise degradation. Finally, this dissertation presents a subharmonically injection-locked PLL with a novel injection-timing calibration circuit, which is connected to a quadrature frequency multiplier. The proposed designs are demonstrated with 0.13µm CMOS technology.

This work deals with a design of the microwave transverter for 5 760 MHz to 146 MHz. It is divided to a few parts. The first one is focused to design of the local oscillator which generates the signal at frequency f = 116.9583MHz. The oscillator is designed like a crystal oscillator. Its output signal is multiplied and amplified in a second part. The next parts deal with design of the band pass filters. There I chose the design of the filters and did the measurements. The microwave receiver and transmitter circuits are designed with the modern monolithic circuits. The main job of this part is to design low noise amplifier and the power amplifier. At the end of this work I do the measurements and the comparison with the simulations.

Diese Arbeit beschreibt den Entwurf, die Analyse und die Verifikation von integrierten Schaltungen zur Frequenzumsetzung für drahtlose Übertragungssysteme im Millimeterwellenbereich. Bei der Beschreibung der zur Verfügung stehenden Halbleitertechnologien und der Aufbau- und Verbindungstechniken wird deutlich, dass parasitäre Widerstände, Kapazitäten und Induktivitäten sämtlicher Verbindungen Verluste und Reflexionen verursachen, die mit der Signalfrequenz ansteigen. Dies motiviert die Reduktion der Signalfrequenz zur Verringerung dieser Verluste, soweit wie dies in einem Millimeterwellensystem möglich ist. Neben den in drahtlosen Übertragungssystemen ohnehin erforderlichen Mischern zur Modulation und Demodulation werden in dieser Arbeit auch Frequenzmultiplizierer vorgestellt. Mit diesen Schaltungen ist es möglich, das hochfrequente Trägersignal direkt neben den Mischern zu erzeugen und mit möglichst kurzen Leitungen anzuschließen, sodass die parasitären Verluste dieser Verbindung sowie die Reflexionen minimal werden. Mit Ausnahme der Verbindungen zu den Antennen kann dadurch die Frequenz der restlichen extern anzuschließenden Signale, nämlich des zu übertragenden Basisbandsignals und des subharmonischen LO-Signals, wesentlich verringert werden, wodurch die Verluste insgesamt reduziert werden. In dieser Arbeit werden dafür zwei Frequenzverdoppler und ein Frequenzversechsfacher vorgestellt, die jeweils mit einer Eingangsfrequenz im Bereich um 30 GHz Ausgangssignale bei 60 GHz bzw. bei 180 GHz erzeugen. Diese drei Schaltungen wurden mit einem Schwerpunkt auf der Unterdrückung unerwünschter Harmonischer und einer gleichzeitig effizienten Erzeugung der gewünschten Harmonischen entworfen. Damit konnte der Stand der Technik für BiCMOS-Frequenzmultiplizierer mit einer Ausgangsfrequenz von bis zu 210 GHz verbessert werden. Sowohl hinsichtlich der absoluten DC-Leistung des Frequenzversechsfachers von lediglich 63 mW, als auch bezüglich der Effizienz (PAE) von 0,28 %, der Verstärkung von 10 dB und der Unterdrückung unerwünschter Harmonischer von bis zu 35 dB sind die erzielten Ergebnisse außerdem besser als von einigen Schaltungen aus leistungsfähigeren III-V-Halbleiterprozessen. Passend zur Mittenfrequenz von 180 GHz am Ausgang des Frequenzversechsfachers, die auch die Mittenfrequenz des IEEE G-Bands ist, werden außerdem integrierte Aufwärts- und Abwärtsmischer entwickelt, die auf der für Kommunikationssysteme vergleichsweise wenig beachteten Sechstor-Architektur basieren. Die Vorteile der Sechstor-Architektur wurden zuvor bereits bei niedrigeren Frequenzen sowohl mit integrierten als auch mit diskret aufgebauten Schaltungen demonstriert. Ein Ziel dieser Arbeit ist die darauf aufbauende Entwicklung und Untersuchung von integrierten I-Q-Mischern mit dieser Architektur für drahtlose Kommunikationssysteme bei 180 GHz in einem 130 nm-BiCMOS-Prozess. Dafür werden geeignete Detektoren und Reflektoren präsentiert, mit denen die Implementierung in diesem Frequenzbereich möglich ist. Mit den erzielten Ergebnissen konnte jeweils der Stand der Technik für integrierte Sechstor-Aufwärts- und -Abwärtsmischer verbessert werden: Im Fall der Sechstor-Aufwärtsmischer stellen die durchgeführten Messungen die erste Verifikation dieser Architektur im Millimeterwellenbereich dar. Auch im Fall der Abwärtsmischer ist die entworfene Schaltung die erste Realisierung bei einer Mittenfrequenz von über 120 GHz. Die erzielten Ergebnisse zeigen, dass die Sechstor-Architektur im Millimeterwellenbereich für die Anwendung in drahtlosen Übertragungssystemen geeignet ist. Hinsichtlich der HF-Eigenschaften sind die erzielten Ergebnisse vergleichbar mit oder besser als solche, die mit technologisch aufwendigeren und oftmals energieintensiveren Schalter-Mischern, wie z.B. den Gilbert-Mischern, erreicht werden. Darüber hinaus wird anhand von mathematischen Schaltungsanalysen gezeigt, dass sich diese Mischerarchitektur ebenfalls durch ihre gute analytische Modellierbarkeit auszeichnet. Selbst mit stark idealisierten und vereinfachten Modellen kann der Mischgewinn bei 180 GHz mit einer Abweichung zur Messung und zur Simulation von lediglich rund 5 dB berechnet werden.:Kurzfassung Abstract Symbolverzeichnis Vorveröffentlichungen 1. Einleitung 2. Fertigungsprozesse für Schaltungen im Millimeterwellenbereich 2.1. Halbleitertechnologien 2.2. Aufbau- und Verbindungstechnik 2.3. Reduktion von Verlusten mittels Frequenzumsetzung 3. Frequenzmultiplizierer 3.1. Frequenzverdoppler mit Polyphasenfilter 3.2. Frequenzverdoppler mit aktivem und passivem Balun 3.3. Frequenzversechsfacher 3.4. Anwendung in einem Millimeterwellensystem 4. Mischer 4.1. Sechstor-Interferometer 4.2. Sechstor-Abwärtsmischer 4.3. Sechstor-Aufwärtsmischer 5. Zusammenfassung und Ausblick A. Betragsberechnungen der auslaufenden Wellen des Sechstors B. Lösung der nichtlinearen Differenzialgleichung C. Differenzen der Quadrate und Kuben harmonischer Summen Literaturverzeichnis Danksagung / In this thesis the design, analysis and verification of integrated circuits for wireless communication systems operating at millimeter waves is presented. During a review of the available manufacturing processes for integrated circuits, printed circuit boards, and interconnects, problems associated with these techniques are identified. Parasitic elements, such as resistors, capacitors, and inductors introduce losses that increase with the signal frequency. This motivates the reduction of the signal frequency wherever possible, so as to reduce these frequency-dependent losses. To achieve this, millimeterwave up- and downconverting mixers, which are anyway required in wireless systems for the modulation and demodulation of an rf carrier signal, and frequency multipliers for generation of those carrier signals are presented in this thesis. With the frequency multipliers it is possible to generate the carrier signals as spatially close to the mixers as possible, reducing the required length of the connection and the losses and reflecions associated with it. Two frequency doublers and a frequency sixtupler were designed for the conversion of input signals at 30 GHz to output signals at 60 GHz and at 180 GHz, respectively. The designs are focused on an energy-efficient generation of the desired harmonic and a large suppression of other undesired harmonics. In this way, the demonstrated results for the frequency sixtupler at 180 GHz improve the state-of-the-art for both BiCMOS and III-V circuits in terms of power consumption, power added efficiency (PAE), conversion gain and harmonic suppression. With the output frequency at up to 210 GHz and with a dc power consumption of 63 mW, a conversion gain of 10 dB, a PAE of 0.28 %, and a harmonic suppression of 35 dB is reached. Matching the output frequency of the sixtupler, two quadrature mixers operating at 180 GHz are presented. They are based on the six-port technique, which offers some promising features at millimeter wave frequencies, but is still not very popular for the application in integrated communication systems. Some research has already been conducted on six-port receivers for radar and communication systems operating at lower frequencies, both as integrated circuits and on printed circuit boards. In the case of six-port downconversion mixers, competetive results with discrete III-V diodes and transistors on printed circuit boards were demonstrated, but very little research on integrated realizations has been published to date. One goal of this thesis is therefore to design integrated six-port mixers at 180 GHz and investigate this architecture for the quadrature up- and downconversion in communication systems. Suitable active detectors and reflectors are proposed to enable the implementation of the six-port technique at these frequencies. In this way, the first implementation of the six-port technique for the upconversion at millimeterwave frequencies is demonstrated. For the downconversion, the rf center frequency at 180 GHz is the highest among six-port implementations to date. The results in terms of rf performance compare well against state-of-the-art switching mixers, such as Gilbert cells. Moreover, the six-port architecture is found to be much simpler in terms of the circuit complexity and it enables the circuit analysis using only simple and idealistic models. With such models, the conversion gain at 180 GHz can be calculated with an error of only about 5 dB. In its minimal realization, a quadrature mixer with a very low dc power consumption can be designed. This makes the six-port technique increasingly attractive as the rf frequency is increased and switching mixers consume a higher dc and rf power.:Kurzfassung Abstract Symbolverzeichnis Vorveröffentlichungen 1. Einleitung 2. Fertigungsprozesse für Schaltungen im Millimeterwellenbereich 2.1. Halbleitertechnologien 2.2. Aufbau- und Verbindungstechnik 2.3. Reduktion von Verlusten mittels Frequenzumsetzung 3. Frequenzmultiplizierer 3.1. Frequenzverdoppler mit Polyphasenfilter 3.2. Frequenzverdoppler mit aktivem und passivem Balun 3.3. Frequenzversechsfacher 3.4. Anwendung in einem Millimeterwellensystem 4. Mischer 4.1. Sechstor-Interferometer 4.2. Sechstor-Abwärtsmischer 4.3. Sechstor-Aufwärtsmischer 5. Zusammenfassung und Ausblick A. Betragsberechnungen der auslaufenden Wellen des Sechstors B. Lösung der nichtlinearen Differenzialgleichung C. Differenzen der Quadrate und Kuben harmonischer Summen Literaturverzeichnis Danksagung

No description available.