The continued scaling of device dimensions in complementary metal oxide semiconductor (CMOS) technology within the sub-100 nm region requires an alternative high dielectric constant (high-k) oxide layer to counter high tunneling leakage currents, a metallic gate electrode to address polysilicon depletion, boron penetration and high polysilicon sheet resistance, and high mobility channel materials to boost the CMOS performance. Metal gates can also offer improved thermal and chemical stability, but their use requires that we improve our understanding of how the metal alloy phase, crystallographic orientation, and composition affect the electronic properties of the metal alloy-oxide interface. To replace n++ and p++ polysilicon gate electrodes and maintain scaled device performance requires metal gate electrodes with work functions within 0.2 eV of the silicon conduction and valence band edges, i.e., 5.0-5.2 and 4.1-4.3 eV, for PMOS and NMOS devices, respectively. In addition to work function and thermal/chemical stability, metal gates must be integrated into the CMOS process flow. It is the aim of this work to significantly expand our knowledge base in alloys for dual metal gates by carrying out detailed electrical and materials studies of the binary alloy systems of Ru with p-type metal Pt. Three n-type metals systems, Ru-Ta, Ru-Hf and Ru-Nb have also been partially investigated. This work also focuses on high mobility Ge p-MOSFETs for improved CMOS performance. DC magnetron sputtering has been used to deposit binary alloy films on thermally grown SiO2. The composition of the alloy films have been determined by Rutherford backscattering spectrometry and the identification of phases present have been made using x-ray and electron diffraction of samples. The microstructure of the phases of interest has been examined in the transmission electron microscope and film texture was characterized via x-ray diffraction. The electrical characterization includes basic resistivity measurements, and work function extraction. The work function has been determined from MOS capacitor and Schottky diodes. The need for electron and hole mobility enhancement and the progress in the development of high-k gate stacks, has lead to renewed interest in Ge MOSFETs. The p-MOS mobility data for Ge channel devices have been reported. The results indicate greater than 2 x improvements in device mobility as compared to standard Si device. A low frequency noise assessment of silicon passivated Ge p-MOSFETs with a TiN/TaN/HfO2 gate stack has been made. For the first time we also report results on low frequency noise characterisation for a Ge P+- n junctions with and without Ni germanidation.

L'intégration du métal dans les nœuds technologiques sub-20 nm requiert une conformité supérieure à celle permise par la PVD. Les techniques de CVD, plus spécifiquement la MOCVD et l'ALD, ont été identifiées comme les meilleures solutions pour le dépôt de métal. Pour une application de métal de grille, les alliages carbo-nitrurés de titane et tantale sont considérés comme les plus prometteurs. Dans ce travail une revue détaillée des mécanismes de dépôt par MOCVD et ALD, ainsi que sur l'influence du plasma sur les matériaux déposés est réalisée. Dans un premier temps, les fenêtres de procédés possibles pour un ajustement des propriétés des métaux sont inspectées attentivement. L'accent est mis sur l'impact du plasma sur le métal et sur les mécanismes réactionnels inhérents grâce à une caractérisation poussée du plasma. Par la suite, l'intégration de ces métaux est étudiée avec une analyse précise des interactions se déroulant aux interfaces. La corrélation entre les propriétés physico-chimiques et le comportement électrique des empilements métal/diélectrique à forte permittivité est soutenue par une analyse XPS. Finalement, le dopage aluminium de dépôts de TiN et TaN MOCVD est étudié pour l'obtention de grilles n-mos et p-mos. Par comparaison des propriétés et comportements du dopage aluminium de métaux déposés par PVD et MOCVD, des mécanismes de diffusion sont proposés afin d'expliquer le rôle de l'aluminium sur les variations observées. / For the sub-20 nm technological nodes metal conformity requirements are beyond the possibilities of the currently used PVD deposition technique. CVD techniques, more specifically MOCVD and ALD, are identified as the best techniques for metal deposition. For metal-gate application, titanium and tantalum carbo-nitrides alloys are considered as the most promising. In this work, a detailed review of MOCVD and ALD deposition mechanisms and plasma influence on the deposited material is carried out. First, process windows for successful tuning of the metal properties are examined. Plasma impact on the metal and the inherent reaction mechanisms are also highlighted with the help of plasma characterisation. Then great importance is given to the integration of these metals, by careful study of the interactions taking place at the interfaces. Correlations between physico-chemical properties and electrical behavior of the metal/high-k dielectric stack are introduced thanks to XPS characterisation. Finally, aluminium doping of MOCVD TiN and TaN is considered for n-mos and p-mos gate characteristics achievement. By comparison of the properties and behaviours of Al doped metals deposited by PVD and MOCVD, diffusion mechanisms are proposed to explain the role of Al in the observed changes.