This thesis explores Single-Photon Avalanche Diodes (SPADs), which are solid-state devices for photon timing and counting, and concentrates on SPADs integrated in nano-scale CMOS. The thesis focuses on: the search for new theory regarding Geiger-mode operation; proving the utility of calibrated Technology Computer- Aided Design (TCAD) tools for accurately simulating SPADs for the first time; the investigation of how manufacture influences device operation; and the integration of high performance SPADs into CMOS which rival discrete devices. The accepted theories of SPAD operation are revisited and it is discovered that previously neglected minority carriers have many significant roles such as determining: after-pulsing, Dark Count Rate (DCR), bipolar “SPAD latch-up,” nonequilibrium DCR, and “quenching”. The “quenching” process is revisited and it is concluded that it is the “probability time” of ≈100-200ps, and not the previously thought latching current that is important. SPADs are also found to have transient negative differential resistance. The new theories of SPADs are also supported by steady-state 1D, 2D and 3D TCAD simulations as well as novel transient simulations and videos. It is demonstrated as possible to simulate DCR, Photon Detection Efficiency (PDE), guard ring performance, breakdown voltage, breakdown voltage variation, “quenching,” and transient operation of SPADs with great accuracy. The manufacture of SPADs is studied focusing on the operation and optimisation of guard rings and it is found that ion implantation induced asymmetry from the tilt and rotation/twist is critical. Where symmetric, guard rings fail first along the <100> directions due to enhanced mobility. Process integration rules are outlined for obtaining high performance SPADs in CMOS while maintaining compatibility with transistors. The minimisation of tunnelling with lightly-doped junctions and the reduction of ion implantation induced defects by additional annealing are found essential for achieving low DCR. The thesis demonstrates that it is possible to realise high performance SPADs in CMOS through the innovation of a “Deep SPAD” which achieves record PDE of ≈72% at 560nm with >40% PDE from 410-760nm, combined with 18Hz DCR, <60ps FWHM timing resolution, and <4% after-pulsing which is demonstrated to have potential for significant further improvement. The findings suggest that CMOS SPAD-based micro-systems could outperform existing photon timing and counting solutions in the future.

This thesis describes the fabrication and characterization of GaN homojunction visible-blind ultraviolet (UV) p-i-n avalanche photodiodes (APDs) grown by metalorganic chemical vapor deposition (MOCVD) on free-standing bulk GaN substrates. The objective of this research is to develop GaN UV p-i-n APDs with high linear-mode avalanche gains and the Geiger-mode operation for single photon detection. Low noise, high responsivity, and high detectivity are also required for fabricated APDs used as photodiodes in the photovoltaic mode (zero bias) and the photoconductive mode (low reverse bias). High material defect density and immature fabrication technology have hampered the development of III-nitride APDs in the past. In this thesis, sidewall leakage reduction methods have been developed to achieve significant improvement in dark current density, noise performance, and photo detection performance. A record linear-mode avalanche gain > 10⁵ for GaN APDs was demonstrated at λ = 360 nm. The first Geiger-mode deep UV (DUV) APD using front-illuminated homojunction p-i-n diode structure on a free-standing bulk GaN substrate was also measured with single photo detection efficiency (SPDE) of 1.0 % and dark count probability (DCP) of 0.03 at 265 nm. The performance of fabricated homojunction GaN p-i-n photodiodes was also evaluated in the photoconductive mode as well as the photovoltaic mode. For an 80-µm-diameter device biased at - 20 V (in the photoconductive mode) the dark current density is lower than 40 pA/cm² which is the lowest value achieved for any III-nitride photodiode so far. Its responsivity is 0.140 A/W at 360 nm with an ultraviolet-visible rejection ratio of 8×10³. The room-temperature noise equivalent power is 4.27×10 ⁻¹⁷ W-Hz-[superscript 0.5] and the detectivity D* is 1.66×10¹⁴ cm-Hz[superscript 0.5]-W ⁻¹ at - 20 V. The minimum detectable optical power is as low as 100 fW. They are among the best values reported for reverse-biased GaN p-i-n photodiodes to date.

No description available.

L’objectif de cette thèse est de développer un détecteur innovant de particules chargées, dénommé 3D Silicon Coincidence Avalanche Detector (3D-SiCAD), réalisable en technologie silicium CMOS standard avec des techniques d’intégration 3D. Son principe de fonctionnement est basé sur la détection en "coïncidence" entre deux diodes à avalanche en mode "Geiger" alignées verticalement, avec la finalité d’atteindre un niveau de bruit bien inférieur à celui de capteurs à avalanche standards, tout en gardant les avantages liés à l’utilisation de technologies CMOS; notamment la grande variété d’offres technologiques disponibles sur le marché, la possibilité d’intégrer dans un seul circuit un système complexe de détection, la facilité de migrer et mettre à jour le design vers une technologie CMOS plus moderne, et le faible de coût de fabrication. Le détecteur développé dans ce travail se révèle particulièrement adapté au domaine de la physique des particules de haute énergie ainsi qu’à la physique médicale - hadron thérapie, où des performances exigeantes sont demandées en termes de résistance aux rayonnements ionisants, "material budget", vitesse, bruit et résolution spatiale. Dans ce travail, un prototype a été conçu et fabriqué en technologie HV-CMOS 0,35µm, en utilisant un assemblage 3D de type "flip-chip" avec pour finalité de démontrer la faisabilité d’un tel détecteur. La caractérisation du prototype a finalement montré que le dispositif développé permet de détecter des particules chargées avec une excellente efficacité de détection, et que le mode "coïncidence" réduit considérablement le niveau de bruit. Ces résultats très prometteurs mettent en perspective la réalisation d’un système complet de détection CMOS basé sur ce nouveau concept. / The objective of this work is to develop a novel position sensitive charged particle detector referred to as "3D Silicon Coincidence Avalanche Detector" (3D-SiCAD). The working principle of this novel device relies on a "time-coincidence" mode detection between a pair of vertically aligned Geiger-mode avalanche diodes, with the aim of achieving negligible noise levels with respect to detectors based on conventional avalanche diodes, such as Silicon Photo-Multipliers (SiPM), and, at the same time, providing single charged particle detection capability thanks to the high charge multiplication gain, inherent of the Geiger-mode operation. A 3D-SiCAD could be particularly suitable for nuclear physics applications, in the field of High Energy Physics experiments and emerging Medical Physics applications such as hadron-therapy and Proton Computed Tomography whose future developments demand unprecedented figures in terms of material budget, noise, spatial resolution, radiation hardness, power consumption and cost-effectiveness. In this work, a 3D-SiCAD demonstrator has been successfully developed and fabricated in the Austria Micro-Systems High-Voltage 0.35 μm CMOS technology by adopting a “flip-chip” approach for the 3D-assembling. The characterization results allowed demonstrating the feasibility of this novel device and validating the expected performances in terms of excellent particle detection efficiency and noise rejection capability with respect to background counts.