Oscillators are ubiquitous to radio frequency circuits, where frequency translations and channel selection play a central role in the analogue communications channel. Oscillators also form part of digital systems as a time reference. Typical heterodyne receivers require an intermediate frequency channel. The associated oscillators and variable filters can only be centred perfectly at a single frequency, and degrade performance at the boundaries of the channel. These circuits also require image-rejecting filters and phase-locked loops in order to enable down-conversion. The penalties for these components are increased circuit area and power consumption. A direct down-conversion circuit will reduce the number of components in the system. A requirement added by the structural change is a passive sub-harmonic mixer. Quadrature oscillators may be achieved by cross-coupling two nominally identical LC differential voltage-controlled oscillators. Because of the widespread use of voltage-controlled oscillators in wireless communication systems, the development of comprehensive nonlinear analysis is pertinent in theory and applications. A key characteristic that defines the performance of an oscillator is the phase noise measurement. The voltage-controlled oscillator is also a key component in phase-locked loops, as it contributes to most of the out-of-band phase noise, as well as a significant portion of in-band noise. Current state-of-the-art modulation techniques, implemented at 60 GHz, such as quadrature amplitude modulation, and orthogonal frequency domain multiplexing, require phase noise specifications superior to 90 dBc/Hz at a 1 MHz offset. It has been shown that owing to the timing of the current injection, the Colpitts oscillator tends to outperform other oscillator structures in terms of phase noise performance. The Colpitts oscillator has a major flaw in that the start-up gain must be relatively high in comparison to the cross-coupled oscillator. The oscillation amplitude cannot be extended as in the cross-coupled case. The oscillator’s bias current generally limits the oscillation amplitude. The phase noise is defined by a stochastic differential equation, which can be used to predict the system’s phase noise performance. The characteristics of the oscillator can then be defined using the trajectory. The model projects the noise components of the oscillator onto the trajectory, and then translates the noise into the resulting phase and amplitude shift. The phase noise performance of an oscillator may be improved by altering the shape of the trajectory. The trajectory of the oscillator is separated into slow and fast transients. Improving the shape of the oscillator’s slow manifold may improve its phase noise performance, and improving the loaded quality factor of the tank circuit may be shown to directly improve upon close-in phase noise. The approach followed describes oscillator behaviour from a circuit-level analysis. The derived equations do not have a closed form solution, but are reformulated using harmonic balance techniques to yield approximate solutions. The results from this closed form approximation are very close to both the numerical solutions of the differential equations, as well as the Simulation Program with Integrated Circuit Emphasis solutions for the same circuits. The derived equations are able to predict the amplitude and frequency in the single-phase example accurately, and are extended to provide a numerical platform for defining the amplitude and frequency of a multiphase oscillator. The analysis identifies various circuit components that influence the oscillator’s phase noise performance. A circuit-level modification is then identified, enabling the decoupling of some of the factors and their interactions. This study demonstrates that the phase noise performance of a Colpitts oscillator may be significantly improved by making the proposed changes to the oscillator. The oscillator’s figure of merit is improved even further. When a given oscillator is set at its optimum phase noise level, the collector current will account for approximately 85% of the phase noise; with the approach in this work, the average collector current is reduced and phase noise performance is improved. The key focus of the work was to identify circuit level changes to an oscillator’s structure that could be improved or changed to achieve better phase noise performance. The objective was not to improve passive components, but rather to identify how the noise-to-phase noise transfer function could be improved. The work successfully determines what can be altered in an oscillator that will yield improved phase noise performance by altering the phase noise transfer function. / The concept is introduced on a differential oscillator and then extended to the multiphase oscillator. The impulse sensitivity function of the modified multiphase oscillator is improved by altering the typical feedback structure of the oscillator. The multiphase oscillator in this work is improved from -106 dBc/Hz to -113 dBc/Hz when considering the phase noise contribution from the tank circuits’ bias current alone. This is achieved by uniquely altering the feedback method of the oscillator. This change alters the noise-to-phase noise properties of the oscillator, reducing phase noise. The improvement in the phase noise does not account for further improvements the modification would incorporate in the oscillator’s limit cycle. For a given tank circuit, supply current and voltage, compared to an optimised Colpitts oscillator, the modifications to the feedback structure proposed in this work would further improve the figure of merit by 9 dB. This is not considering the change in the power consumption, which would yield a further improvement in the figure of merit by 7 dB. This is achieved by relaxing the required start-up current of the oscillator and effecting an improvement in the impulse sensitivity function. Future research could include further modelling of the phase shift in the feedback network, including the transmission lines in the feedback networks using the harmonic balance technique in a numerical form. The feedback technique can also be modified to be applicable to single and differential oscillators. / Dissertation (MEng)--University of Pretoria, 2017. / National Research Foundation / The Department of Science and Technology, South Africa / GEW Technologies (Pty) Ltd / Electrical, Electronic and Computer Engineering / MEng / Unrestricted

Cette thèse est une tentative vers la conception de la bande Ka émetteur-récepteur RF pour les réseaux de capteurs sans fil (WSN), pour lesquelles la consommation d'énergie, le coût et la taille sont des paramètres critiques. Au sens de la consommation d'énergie, un transmetteur RF est la partie la plus cruciale d'un nœud de capteur. Nous avons choisi STMicroelectronics 90nm global purpose (GP) pour atteindre la technologie CMOS à faible puissance, faible coût et de petite taille. Pour la première fois, nous avons introduit la bande Ka dans le context de WSN, a fin de bénéficier de l'immunité élevée du réseau et la petite taille antenne. Étant donné que la technologie que nous avons choisi et du kit associé fonderie de conception n'est pas pour la conception RF, nous avons été obligés de mettre au point un outil de conception individuelle pour la bande à ondes millimétriques. De cette façon, nous avons développé une solution simple et précise le modèle MOS transistor, comprenant charge et le modèle de capacité, modèle de bruit et le modèle complet des effets parasites. Nous avons proposé une nouvelle structure pour les inducteurs de la ligne de transmission et un modèle précis de RLGC a été développé pour la conception et la simulation de ces inducteurs. Et puis par la simulation de la pleine d'onde (full wave) électromagnétique dans le logiciel HFSS, nous avons extrait des parameters du modele d'incucteurs , et d'autres éléments passifs, telles que des pads RF et T-jonctions. Comme notre première expérience, nous avons conçu et optimisé une LNA à 30 GHz, en utilisant notre outil de conception. Le LNA conçu a été fabriqué dans STMicroelectronics 90nm global dans le processus de GP CMOS et a été mesurée dans le laboratoire IMEP. Les résultats des mesures montrent 10dB gain de puissance et de 4,8 dB figre bruit (noise figure) avec 4mW DC la consommation de puissance. Dans l'étape suivante, nous avons conçu et optimisé mieux 30GHz LNA. La simulation post-layout montre 13.9dB gain de puissance et 3.6d figre bruit, avec seulement 3 mW de consommation de puissance. Nous avons proposé un lien simple radio et un structure simple a ete presente pour le récepteur_émetteur. Dans le récepteur, nous avons utilisé la structure hétérodyne, ou dans la quelle nous avons utilise de l'idee de Mixer Harmonique paire et oscillateur couple, à surmonter de nombreux problèmes se pose en mm bande des ondes dans la technologie CMOS. Le Mixer a été conçu en utilisant les résultats d'analyse et de simulation dans le kit de conception de fonderie: 4dB gain de conversion et de 5,8 double side band figre de bruit avec 2.2Mw consommation de puissance, un excellent résultat en comparaison avec les œuvres similaires rapports comme IF Stage 2GHz qui a été conçu comme multi-slice-amplificateur de la chaîne de detection pour accroître (ugmenter)la performance du récepteur et d'atteindre plus faible consommation d'énergie. Enfin, le récepteur a été simulé dans MATLAB et--87dBm de sensibilité, 890KHz de bande passante, avec 6.65mW consommation d'énergie sont obtenus. L'émetteur a été conçu aussi simple que possible, en utilisant idée power oscillateur, délivrant 6mW puissance RF de l'antenne. L'émetteur a généralement les 25% de power efficacité qui est très bon résultat en comparaison avec les œuvres déclarées.

In this Master's thesis, a direct-conversion receiver front-end has been designed in a 0.18um CMOS technology. Direct-conversion receivers (DCR) have obvious advantages over the heterodyne counterpart. Since the intermediate frequency (IF) is zero, the problem of image is circumvented. As a result, no front-end image reject filter is required and the channel selection requires only a low-pass filter, which makes it easy to integrate directly on chip. However, the DCR also suffers from several drawbacks such as extreme sensitivity to DC offsets, 1/f noise, local oscillator (LO) leakage/radiation, front-end nonlinearity and I/Q mismatch. This implies very high demands on the DCR front-end. The front-end comprises a low-noise amplifier (LNA) and a mixer. Different LNA and mixer architectures has been studied and from the mentioned inherited problems with direct conversion, one proposal for a solution is a differential source degenerated LNA and a differential harmonic mixer, which has been designed and simulated. The LNA has a gain of 12dB, a noise figure of 3.6dB and provides a return loss better than -15dB. The overall noise figure of the signal path is 8dB and the overall IIP3 and IIP2 is -12dBm and 31dBm, respectively.

<p>In this Master's thesis, a direct-conversion receiver front-end has been designed in a 0.18um CMOS technology. </p><p>Direct-conversion receivers (DCR) have obvious advantages over the heterodyne counterpart. Since the intermediate frequency (IF) is zero, the problem of image is circumvented. As a result, no front-end image reject filter is required and the channel selection requires only a low-pass filter, which makes it easy to integrate directly on chip. However, the DCR also suffers from several drawbacks such as extreme sensitivity to DC offsets, 1/f noise, local oscillator (LO) leakage/radiation, front-end nonlinearity and I/Q mismatch. This implies very high demands on the DCR front-end. </p><p>The front-end comprises a low-noise amplifier (LNA) and a mixer. Different LNA and mixer architectures has been studied and from the mentioned inherited problems with direct conversion, one proposal for a solution is a differential source degenerated LNA and a differential harmonic mixer, which has been designed and simulated. </p><p>The LNA has a gain of 12dB, a noise figure of 3.6dB and provides a return loss better than -15dB. The overall noise figure of the signal path is 8dB and the overall IIP3 and IIP2 is -12dBm and 31dBm, respectively.</p>