In the modern semiconductor world, there is a significant scaling of the transistor dimensions--The transistor gate length and the gate oxide thickness drop down to only several nanometers. Today the semiconductor industry is already dominated by submicron devices and other material devices for the high transistor density and performance enhancement. In this case, the semiconductor reliability issues are the most important thing for commercialization. The major reliability issues caused by voltage are hot carrier effects (HCs) and gate oxide breakdown (BD) effects. These issues are recently more important to industry, due to the small size and high lateral field in short-channel of the device will cause high electrical field and other reliability issues. This dissertation primarily focuses on the study of the CMOS device gate oxide breakdown effect on different kinds of circuits performance, also some HC effects on circuit's performance are studied. The physical mechanisms for BD have been presented. A practical and accurate equivalent breakdown circuit model for the CMOS device was studied to simulate the RF performance degradation on the circuit level. The BD location effect has been evaluated. Furthermore, a methodology was developed to predict the BD effects on the circuit's performances with different kinds of BD location. It also provides guidance for the reliability considerations of the digital, analog, and RF circuit design. The BD effects on digital circuits SRAM, analog circuits Sample&Hold, and RF building blocks with the nanoscale device--low noise amplifier, LC oscillator, mixer, and power amplifier, have been investigated systematically. Finally 90 nm device will be used to study the HC effect on the circuit's performance. The contributions of this dissertation include: Providing a thorough study of the gate oxide breakdown issues caused by the voltage stress on the device--from device level to circuit level; Studying real voltage stress case--high frequency (950 MHz) dynamic stress, and comparing with the traditional DC stress; A simple, practical, and analytical method is derived to study the gate oxide breakdown effect including breakdown location effect and soft / hard breakdown on the digital, analog and RF circuits performances. A brief introduction and simulation for 90 nm device HC effect provide some useful information and helpful data for the industry. The gate oxide breakdown effect is the most common device reliability issue. The successful results of this dissertation, from device level to circuit level, provide an insight on how the BD affects the circuit's performance, and also provide some useful data for the circuit designers in their future work.

Nous étudions un mélangeur d'ondes térahertz (THz) réalisé avec le supraconducteur à haute température critique YBaCuO en couches ultraminces (10 à 50 nm). Le travail vise à concevoir un démonstrateur portable pour la détection hétérodyne térahertz passive, avec une cryogénie simplifiée à 60-80 kelvin (projet ANR MASTHER).Le principe de détection est le bolomètre à électrons chauds (HEB) jusqu'à présent développé avec des supraconducteurs à basse température critique. L'effet HEB est mis en ¿uvre dans une constriction en YBaCuO (quelques centaines de nm de dimensions latérales). Cette structure conduit à un détecteur THz sensible et rapide (bande passante instantanée de 100 GHz). Le rayonnement THz est couplé à la constriction par une antenne planaire large bande.En premier lieu, les échanges thermiques entre réservoirs d'électrons et de phonons (YBaCuO et son substrat) sont modélisés. Nous établissons ainsi les conditions optimales pour le HEB en termes de dimensions de la constriction et de puissance de l'oscillateur local requises pour un mélange performant (gain et bruit). Par rapport aux modèles antérieurs, nous introduisons une approche de "point chaud" nouvelle incluant l'influence de la fréquence THz dans YBaCuO, ainsi que l'adaptation d'impédance entre la constriction et l'antenne. En second lieu, nous décrivons l'optimisation des étapes de micro-fabrication des HEB, en particulier les lithographies électronique et optique, pour obtenir des constrictions de 300 nm de côté. De premiers dispositifs ont été testés en détection directe infrarouge. Les performances entre des couches d'YBaCuO ultraminces préparées suivant différentes techniques sont comparées. / We report on the development of a terahertz (THz) wave mixer made from high critical temperature superconducting YBaCuO ultrathin films (10 to 50 nm). The work is part of the MASTHER ANR project aiming at a portable demonstrator for passive terahertz heterodyne detection, implementing simplified cryogenics (60 to 80 kelvin). The detection principle is that of the hot electron bolometer (HEB) so far mainly developed with low critical temperature superconductors. The HEB effect is implemented in an YBaCuO constriction (a few hundred nm in lateral dimensions). This structure can lead to a sensitive and fast THz detector (theoretical instantaneous bandwidth of 100 GHz). The THz radiation is coupled to the YBaCuO constriction by means of a wideband planar antenna. The new aspects first concern the modeling of heat exchange between electrons and phonons reservoirs (YBaCuO and its substrate). Our results establish the optimum operating conditions in terms of dimensions of the constriction and the local oscillator power required for high performance THz mixing (conversion gain and noise temperature). We are introducing in particular a new "hot spot" modeling approach, which takes into account the influence of the terahertz frequency in the YBaCuO material and the impedance matching between the antenna and the constriction. Second, we have developed and optimized the HEB micro-fabrication process in clean room, especially the electronic and optical lithography steps, to obtain constrictions of 300 nm lateral size. Our first devices have been tested by direct detection in the infrared. The performance between YBaCuO ultrathin films prepared using various techniques are compared.

General lighting with InGaN light emitting diodes (LEDs) as light sources is of particular interest in terms of energy savings and related environmental benefits due to high lighting efficiency, long lifetime, and Hg-free nature. Incandescent and fluorescent light sources are used for general lighting almost everywhere. But their lighting efficiency is very limited: only 20-30 lm/W for incandescent lighting bulb, approximately 100 lm/W for fluorescent lighting. State-of-the-art InGaN LEDs with a luminous efficacy of over 200 lm/W at room temperature have been reported. However, the goal of replacing the incandescent and fluorescent lights with InGaN LEDs is still elusive since their lighting efficiency decreases substantially when the injection current increases beyond certain values (typically 10-50 Acm-2). In order to improve the electroluminescence (EL) performance at high currents for InGaN LEDs, two approaches have been undertaken in this thesis. First, we explored the preparation and characterization of non-polar and semi-polar GaN substrates (including a-plane, m-plane and semi-polar planes). These substrates serve as promising alternatives to the commonly used c-plane, with the benefit of a reduced polarization-induced electric field and therefore higher quantum efficiency. It is demonstrated that LEDs on m-plane GaN substrates have inherently higher EL quantum efficiency and better efficiency retention ability at high injection currents than their c-plane counterparts. Secondly, from a device structure level, we explored the possible origins of the EL efficiency degradation at high currents in InGaN LEDs and investigated the effect of hot electrons on EL of LEDs by varying the barrier height of electron blocking layer. A first-order theoretical model is proposed to explain the effect of electron overflow caused by hot electron transport across the LED active region on LED EL performance. The calculation results are in agreement with experimental observations. Furthermore, a novel structure called a “staircase electron injector” (SEI) is demonstrated to effectively thermalize hot electrons, thereby reducing the reduction of EL efficiency due to electron overflow. The SEI features several InyGa1-yN layers, with their In fraction (y) increasing in a stepwise manner, starting with a low value at the first step near the junction with n-GaN.