This work deal with simulation of basic structure of OFDM modulator and demodulator of the upcoming standard 5G NR. In MATLAB are simulated basic parts including modulation, reference signal inserting, Fourier transform, cyclic prefix inserting, AWGN and multi-path propagation. In this work is proposed implementation of the modulator and demodulator into RFSoC board and his configuration. Designed generator is implemented with the use of STEMLab RedPitaya platform. In Matlab software is generated 5G OFDM signal used to transmitt. Received signal is evaluated in Matlab software.

The main objective of this work is to study methods of reducing BER and suggest possible resolution of matched filter. In the first part, the methods are theoretically analyzed and subsequently their function models are sugested in the computer programme Matlab Simulink. On these models, the behaviour for different input values is simulated and on their basis, the output depending on probability of the false income on SNR for each of models is worked out. In the second part, the design of the laboratory preparation with a view to the matched filter is described. This suggestion is divided into the parts which are subsequently described and outputs from the implementation of the suggested resolution are added. Thereinafter, the implementation of the proposed resolution and the results achieved at measurement of the realized produkt are closely described. This product is to be made for educational and laboratory purposes in terms of lessons The Theory of Communication.

This thesis deals with continuous system simulation. The systems can be described by system of differential equations or block diagram. Differential equations are usually solved by numerical methods that are integrated into simulation software such as Matlab, Maple or TKSL. Taylor series method has been used for numerical solutions of differential equations. The presented method has been proved to be both very accurate and fast and also procesed in parallel systems. The aim of the thesis is to design, implement and compare a few versions of the parallel system.

No description available.

No description available.

No description available.

Orientador: Nobuo Oki / Banca: Saulo Finco / Banca: Cláudio Kitano / Resumo: Nesse trabalho, propõe-se o projeto e implementação de um sintetizador de sinais ortogonais utilizando técnicas de circuito integrado e processo CMOS. O circuito do sintetizador baseia-se em um modelo matemático que utiliza multiplicadores e integradores analógicos, para geração de bases de funções ortogonais, tais como os polinômios de Legendre, as funções de base coseno e seno, a smoothed-cosine basis e os polinômios de Hermite. Funções ortogonais são bastante empregadas em processamento de sinais, e a implementação deste método matemático é capaz de gerar vários tipos de funções em um mesmo circuito integrado. O projeto proposto utiliza blocos analógicos funcionais para implementar o sintetizador. Os blocos que compõem o sintetizador foram projetados utilizando circuitos diferenciais, processamento em modo de corrente e técnicas de low-voltage. Algumas topologias utilizadas estão descritas na literatura, sendo que algumas foram adaptadas e mesmo modificadas, como no caso do multiplicador de corrente. Outras tiveram que ser propostas. As simulações e os resultados experimentais mostraram que o sintetizador é capaz de gerar funções ortogonais com amplitude e distorções satisfatórias. O sintetizador pode ser alimentado em 3V, tal qual foi projetado, tem faixa de entrada de ±20 μA e apresenta DHT (distorção harmônica total) inferior a 4% no quinto e último estágio em cascata. / Abstract: In this work, a design and implementation of a synthesizer of orthogonal signals using CMOS technology and design technique for integrated circuits is proposed. The synthesizer circuit used analog multipliers and integrators for produce orthogonal functions such as Legendre polynomials, cosine and sine basis of functions, smoothed-cosine basis and Hermite polynomials. Orthogonal functions can be employed in signal processing and the implementation proposed can generate several kinds of functions in the same integrated circuit. In the synthesizer design building blocks was employed. The synthesizer's blocks were design using differential circuits, low-voltage and current-mode techniques. Some topologies from papers were adapted or modified, as in the case of the current multiplier. Other topologies had to be proposed. The simulation and experimental results have shown that the synthesizer is able to produce orthogonal functions with satisfactory quality in distortions and amplitude. The synthesizer has a 3V supply voltage, a input current range of ±20 μA and it presents less than 4% of THD (Total Harmonic Distortion) in the last output in cascade. / Mestre

Made available in DSpace on 2016-06-02T20:09:05Z (GMT). No. of bitstreams: 1 DissDGM.pdf: 9494818 bytes, checksum: aaab5a58df0da3a8e1e33fde851dd7e5 (MD5) Previous issue date: 2007-02-28 / Universidade Federal de Sao Carlos / The residential automation have been used by entrepreneurs as strategy to add value to the project and the product, in order to generate a competitive advantage. Currently independent mechanisms of automation in several areas are being used in the residences. The huge challenge is integrate all of these systems, making possible economy, comfort and an easy use. For this function, observed in the market the new role Home Technology Integrator as member of design team. This dissertation proposes to evaluate new forms of organization as part of the new project process for intelligent residential building and to characterize the profile of Home Technology Integrator, in order to contribute for this panorama, where changes are significant and fast. / A automação residencial têm sido usada por empreendedores como estratégia para agregar valor ao projeto e ao produto, gerando um diferencial competitivo. Hoje são utilizados nas residências mecanismos isolados de automação em diversas áreas e o grande desafio atual é conseguir integrar todos estes sistemas, possibilitando economia, conforto e facilidade de uso. Para desempenhar esta função, destaca-se no mercado a presença gradativa da figura do integrador de sistemas residenciais como participante da equipe de projeto. Visando contribuir para este panorama de mudanças tão velozes e significativas nas estratégias competitivas, propõe-se estudar nesta dissertação as formas de organização do processo de projeto em um novo produto complexo (edifícios residenciais inteligentes), assim como, caracterizar o perfil do integrador de sistemas residenciais.

New algorithms for the matrix exponential and its Fréchet derivative are presented. First, we derive a new scaling and squaring algorithm (denoted expm[new]) for computing eA, where A is any square matrix, that mitigates the overscaling problem. The algorithm is built on the algorithm of Higham [SIAM J.Matrix Anal. Appl., 26(4): 1179-1193, 2005] but improves on it by two key features. The first, specific to triangular matrices, is to compute the diagonal elements in the squaring phase as exponentials instead of powering them. The second is to base the backward error analysis that underlies the algorithm on members of the sequence {||Ak||1/k} instead of ||A||. The terms ||Ak||1/k are estimated without computing powers of A by using a matrix 1-norm estimator. Second, a new algorithm is developed for computing the action of the matrix exponential on a matrix, etAB, where A is an n x n matrix and B is n x n₀ with n₀ << n. The algorithm works for any A, its computational cost is dominated by the formation of products of A with n x n₀ matrices, and the only input parameter is a backward error tolerance. The algorithm can return a single matrix etAB or a sequence etkAB on an equally spaced grid of points tk. It uses the scaling part of the scaling and squaring method together with a truncated Taylor series approximation to the exponential. It determines the amount of scaling and the Taylor degree using the strategy of expm[new].Preprocessing steps are used to reduce the cost of the algorithm. An important application of the algorithm is to exponential integrators for ordinary differential equations. It is shown that the sums of the form $\sum_{k=0}^p\varphi_k(A)u_k$ that arise in exponential integrators, where the $\varphi_k$ are related to the exponential function, can be expressed in terms of a single exponential of a matrix of dimension $n+p$ built by augmenting $A$ with additional rows and columns. Third, a general framework for simultaneously computing a matrix function, $f(A)$, and its Fréchet derivative in the direction $E$, $L_f(A,E)$, is established for a wide range of matrix functions. In particular, we extend the algorithm of Higham and $\mathrm{expm_{new}}$ to two algorithms that intertwine the evaluation of both $e^A$ and $L(A,E)$ at a cost about three times that for computing $e^A$ alone. These two extended algorithms are then adapted to algorithms that simultaneously calculate $e^A$ together with an estimate of its condition number. Finally, we show that $L_f(A,E)$, where $f$ is a real-valued matrix function and $A$ and $E$ are real matrices, can be approximated by $\Im f(A+ihE)/h$ for some suitably small $h$. This approximation generalizes the complex step approximation known in the scalar case, and is proved to be of second order in $h$ for analytic functions $f$ and also for the matrix sign function. It is shown that it does not suffer the inherent cancellation that limits the accuracy of finite difference approximations in floating point arithmetic. However, cancellation does nevertheless vitiate the approximation when the underlying method for evaluating $f$ employs complex arithmetic. The complex step approximation is attractive when specialized methods for evaluating the Fréchet derivative are not available.

This work describes numerical integration and solution for ordinary differential equations by the Taylor series by different types of integrators. The next part is a description of floating point and fixed point arithmetic. Subsequently, we are presenting designs and calculation methods for parallels multiplication and division integrators in floating point and fixed point arithmetic. The designs were realized in VHDL and implemented on FPGA. Finally we summarizes the proposed solution and compare time complexity with another numerical methods.