Orientador: Mônica Alonso Cotta / Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Física Gleb Wataghin / Made available in DSpace on 2018-09-02T10:59:50Z (GMT). No. of bitstreams: 1 Nica_MarianaZavarize_M.pdf: 75724631 bytes, checksum: 1480ea9eb35b1740d4b908e32d13c9c4 (MD5) Previous issue date: 2017 / Resumo: Neste trabalho, estudamos o crescimento de nanofios planares de InP pelo mecanismo Vapor-Líquido-Sólido (VLS), com o objetivo de entender a dinâmica da nanopartícula metálica catalisadora durante o processo. Para isso utilizamos substratos de GaAs (111)A e o sistema de Epitaxia de Feixe Químico (CBE). O óxido nativo não foi totalmente removido termicamente antes do crescimento, com o objetivo de manter o nanofio isolado eletricamente do substrato. Como um dos objetivos do trabalho, estudamos a possibilidade de controle da direção de crescimento do nanofio planar através de diferentes tratamentos de superfície, e de modo independente da cristalografia do substrato utilizado. As amostras processadas e/ou crescidas foram caracterizadas por técnicas de microscopia eletrônica (varredura e transmissão) e microscopia de força atômica. Investigamos inicialmente como a camada de óxido influencia as direções de crescimento dos nanofios planares no substrato não tratado. Posteriormente, processamos padrões de linhas com rugosidade ligeiramente diferente da mostrada pelo substrato, utilizando técnicas como Litografia por Feixe de Elétrons (EBL), Corrosão por Feixe de Íons Focalizados (FIB) e Ataque por Íons Reativos (RIE). Os padrões gravados eram compostos por linhas perpendiculares com várias micra de comprimento e larguras de dezenas de nm. Observamos que existe uma relação direta do diâmetro do nanofio com a orientação que este assume ao chegar à região onde se encontra a linha (se segue alinhado à linha ou se a ignora; ou se muda sua orientação). Nossos resultados podem ser explicados pelas diferentes energias de superfície presentes no problema, que afetam a dinâmica da nanopartícula catalisadora. Nosso trabalho também mostra que é possível obter maior controle da orientação espacial do nanofio planar crescido, controlando o processamento da superfície e o diâmetro da nanopartícula / Abstract: In this work, we studied the growth of InP planar nanowires by the vapor-liquid-solid (VLS) mechanism, in order to understand the metallic catalyst nanoparticle dynamics during this process. In our studies, we used GaAs (111)A substrates and the Chemical Beam Epitaxy (CBE) system. The native oxide layer was not completely thermally desorbed, in order to keep the nanowire electrically isolated from the substrate. As one of the goals of this work, we study the possibility to control nanowire growth direction via different surface treatments, independently of the substrate crystallography. Our processed and/or grown samples were characterized by electron (scanning and transmission) and atomic force microscopy. We first investigated how the oxide layer influences the growth directions of planar nanowires on unprocessed substrates. Subsequently, patterns of lines with roughness slightly different from those shown by the substrate were patterned using techniques such as Electron-beam Lithography (EBL), Focused Ion-beam Corrosion (FIB) and Reactive Ion Etching (RIE). These patterns were composed of perpendicular lines with several micra in length and tens of nanometers wide. We observed that there is a direct relation between the nanowire diameter and the orientation that the nanowire assumes when it reaches the region where the line is located (if the nanowire aligns with the line or ignores it, or if its orientation changes). Our results can be explained by the different surface energies present in the problem, which affect the dynamics of the catalytic nanoparticle. Our work also shows that it is possible to obtain better control of the spatial orientation of the grown planar nanowire, by controlling the surface processing and the nanoparticle diameter / Mestrado / Física / Mestra em Física / 132655/2015-2 / CNPQ

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Que ce soit pour la fabrication de transistors ultimes fonctionnant à haute fréquence et faible consommation d’énergie ou pour celle de composants quantiques exploitant le transport balistique d’électrons, l’élaboration de nanostructures de semiconducteurs III-V à faible masse effective électronique est aujourd’hui un enjeu majeur. Différentes approches existent pour atteindre des dimensions caractéristiques largement sub-100nm. Les nanostructures peuvent être définies par une approche descendante en combinant gravure sèche anisotrope et amincissement chimique digital d’une couche semiconductrice ou par une approche ascendante en élaborant directement les nanostructures désirées. Dans le deuxième cas, la croissance de nanofils catalysée par une bille métallique nanométrique a connu un engouement important ces quinze dernières années. La fabrication de composants utilisant ce procédé reste cependant très compliquée et nécessite souvent le report des nanofils sur un substrat hôte rendant extrêmement difficile la réalisation de circuits complexes. L’approche par croissance sélective dans les ouvertures d’un masque diélectrique offre au contraire des perspectives plus intéressantes. Si l’épitaxie à base d’organométalliques en phase vapeur a démontré son efficacité pour ce type de croissance, l’épitaxie par jets moléculaires peut permettre d’améliorer encore la pureté des nanostructures. C’est dans ce contexte que nous avons étudié les propriétés électriques de nanostructures III-V épitaxiées sélectivement sur substrat InP. L’utilisation d’un flux d’hydrogène atomique pendant la croissance permet d’obtenir une bonne sélectivité de croissance. Son impact sur les propriétés optiques et électriques du semiconducteur a d’abord été étudié puis l’utilisation de procédés de nanofabrication a permis l’élaboration et la caractérisation électrique de nanostructures. Des composants en InGaAs de type TLM, multi-branches ou MOSFET ont démontré la qualité des matériaux épitaxiés puisque des mobilités effectives à l’état de l’art pour ce type de matériau ont été obtenues. Grâce à l’utilisation de croissances sélectives multiples, nous avons pu élaborer des hétérostructures originales telles que des nanofils planaires à cœur InGaAs et coquille InP ou des hétérojonctions InGaAs/GaSb radiales ou axiales. Pour ces dernières, l’obtention de caractéristiques courant-tension présentant une résistance différentielle négative montre une bonne qualité d’interface, offrant des perspectives intéressantes pour la fabrication de nano-hétérojonctions tunnel. / The fabrication of nanoscale devices such as high frequency and low energy consumption transistors or quantum devices exploiting ballistic electrons transport requires the development of nanostructures with low effective mass III-V materials. Several technologies exist to reach typical dimensions well below the 100-nm range. The nanostructures can be defined by a top-down approach through a combination of anisotropic dry etching and digital chemical thinning of a semiconductor layer, or by a bottom-up approach with a direct elaboration of the nanostructures. In the second case, metal-catalyst-assisted nanowire growth has been widespread since the last fifteen years. However, the fabrication of devices based on this process is still tricky and often requires the transfer of the nanowires to a host substrate for device processing, preventing any complex circuit production. The approach by selective area growth inside dielectric mask openings exhibits a better scalability. If the organometallic vapor phase epitaxy (MOVPE) has proved its efficiency for this type of growth, molecular beam epitaxy (MBE) may further improve the nanostructure purity. Within this context, we study the electrical properties of selectively grown III-V materials on InP substrate by MBE. We demonstrate that the use of an atomic hydrogen flux during the growth ensures a good selectivity with respect to the dielectric mask and has a positive impact on the optical and electrical properties of the grown semiconductor. The electrical characterization of InGaAs nanostructures is performed thanks to the development of dedicated process such as TLM, branched nanowires or MOSFET devices. It reveals good transport properties with the state-of-the-art effective mobility for this kind of alloy. We then show that selective area epitaxy is also a valuable tool to develop original heterostructures such as in-plane InGaAs/InP core-shell nanowires with raised contacts and radial or axial InGaAs/GaSb heterojunctions. For these latter, the negative differential resistances observed on the current-voltage characteristics demonstrate a good interface quality, offering interesting possibilities for tunnel nano-heterojunction development.

This research is related to the molecular beam epitaxy (MBE ) to grow GaSb . The fabrication of GaSb/InGaSb strained quantum well and superlattice structures are used for photodetection . They are carefully investigated to obtain high quality of GaSb films. The growth mechanisms related to the major factors of (1) Subtrate temperature (2) Beam flux ratio(V/III). The properties of GaSb epilayers are characterized by different methods such as the X-ray diffraction , I-V curve and Raman spectra . The optimum growth conditions 500¢J of substrate temperature and the V/III flux ratio about 2~3 have been obtained. On the basis of structure, the best growth conditions is identified by the peak intensity and FWHM related to the quality of the GaSb films by the X-ray diffraction. On the basis of electrical property, the best growth conditions is identified by the lowest leakage current for the p-n junction related to the quality of the GaSb films by the I-V curve. On the basis of optical property, the best growth conditions is identified by the LO mode phonon intensity related to the quality of the GaSb films by the Raman spectra. Based on the GaSb growth studied here, the study will be focused in the quantum well and quantum dot laser devices furtherly by us.

Due to the high electron mobility compared with Si, much attention has been focused on III-V compound semiconductors (gallium arsenide (GaAs) and indium phosphide (InP)) high-speed devices. The high-k material TiO2 not only has high dielectric constant (k = 35-100) but has well lattice match with GaAs and InP substrate. Therefore, titanium oxide (TiO2) was chosen to be the gate oxide in this study. The major problem of III-V compound semiconductors is known to have poor native oxide on it and leading to the Fermi level pinning at the interface of oxide and semiconductor. The C-V stretch-out phenomenon can be observed and the leakage current is high. The higher dielectric constant of poly-crystalline TiO2 film grown on GaAs can be obtained by metal organic chemical vapor deposition (MOCVD). But the high leakage current also occurred due to the grain boundary and defects in the poly-crystalline TiO2 film. The surface passivation of GaAs with (NH4)2Sx treatment (S-GaAs) could prevent it from oxidizing after cleaning and improve the interface properties of MOSFET. The fluorine from liquid phase deposited SiO2 solution can passivate the grain boundary of poly-crystalline MOCVD-TiO2 film and interface state. The high dielectric constant and low leakage current of fluorine passivated MOCVD-TiO2/S-GaAs can be obtained. The leakage current densities are 3.41 x 10-7 A/cm2 and 1.13 x 10-6A/cm2 at ¡Ó1.5 MV/cm, respectively. The Dit is 4.6 x 1011 cm-2eV-1 at the midgap. The dielectric constant can reach 71. In addition, the post-metallization annealing (PMA) is another efficiency way to improve the MOCVD-TiO2 quality. The mechanism of PMA process is from the reaction between the aluminum contact and hydroxyl groups existed on TiO2 film surface. Then the active hydrogen is produced to diffuse through the oxide and passivate the oxide traps. For PMA (350oC)-MOCVD-TiO2 on S-GaAs MOS structure, the leakage current densities can reach 2.5 x 10-7 and 5 x 10-7 A/cm2 at ¡Ó1.5 MV/cm, respectively. The dielectric constant and the Dit are 66 and 5.96 x 1011 cm-2eV-1, respectively. In order to avoid the leakage current from grain boundary of poly-crystalline TiO2, and liquid phase deposited TiO2 (LPD-TiO2) at low temperature can preserve the function of sulfur passivation. Therefore, the amorphous LPD-TiO2 was deposited on S-GaAs. The leakage current densities are 1.04 x 10-7 and 1.91 x 10-7 A/cm2 at ¡Ó0.5 MV/cm, respectively. The Dit is 3.2 x 1011 cm-2eV-1 and the dielectric constant is 48. The LPD-TiO2 film was deposited on (NH4)2Sx treated InP (S-InP), and the 4 x 100 £gm2 enhancement mode N channel InP MOSFET with LPD-TiO2 as gate oxide was fabricated, which showed the good characteristic. The normalized maximum gm is 43 mS/mm at VG = 1.3 V for VDS fixed at 1 V. The maximum calculated £gFE of 348 cm2/V¡Es at VDS = 1 V is obtained.

In the past few decades, Si-based CMOS technology is approaching to its physical quantum limit by scaling down the gate length and gate oxide thickness to achieve higher drive current for low power and high speed application. High k/III-V stack provides an alternative solution because III-V based metal-oxide-semiconductor (MOS) devices have higher drive current due to the higher electron mobility than silicon. Also high k oxides lower the gate leakage current significantly due to larger thickness under the same equivalent oxide thickness (EOT) compared with SiO₂ beyond the 22 nm node. The main obstacle for high k/III-V based MOSFETs is the lack of high quality, thermodynamically stable insulators that passivate the interface, which is also the main driving force in the research area of high k/III-V stack. One of the main focuses of this dissertation is developing a fabrication process flow to lower the interface trap density to enhance the performance of MOSFETs with high k oxides on III-V substrates. Also, an emerging memory device with SiO[subscript x] is also developed. This device can be electrically switched between a high-resistance state (HRS, or OFF-state) and a low-resistance state (LRS, or ON-state). Also it shows high potential for next generation nonvolatile memories due to its small cell area, fast write/erase time, low write voltage, good endurance and scalability. The other main focuses of this dissertation is studying the electroforming, set/reset voltages and passivation issue in this resistive random access memory (RRAM or ReRAM). The first part of this dissertation is about lowering the interface trap density of high k/III-V stack by using a thin layer of Al₂O₃ or LaAlO₃. ALD Al₂O₃/HfO₂ bi-layer gate oxide with different Al₂O₃ thickness (0, 5, 10Å) was deposited. Also ALD LaAlO₃/HfO₂ bi-layer gate oxide with different LaAlO₃ thickness (0, 5, 10, 20, 30, 42Å) was deposited. The total EOT of the bi-layer was maintained at ~1.8nm. Also single La[subscript x]Al[subscript 1-X]O (X =0.25, 0.33, 0.5, 0.66, 0.75) gate dielectric with different La doping level was deposited (EOT=2.5±0.4nm). Device characteristics are compared by using different thickness of interfacial layer. The second part of this dissertation is about F incorporation into high k oxide by using SF₆ plasma. The effect of SF₆ plasma treatment of HfO₂ on III-V substrates is demonstrated. Also effect of different plasma power and different treatment time of SF₆ plasma is studied to optimize plasma conditions. High k bilayer (Al₂O₃/HfO₂) is also used to further improve the device performance by better interface passivation with Al₂O₃. HfO₂ gate oxide dielectric is also engineered using SF₆ plasma treatment to incorporate more F. The third part is a study of III-V tunneling FET using In[subscript 0.7]Ga[subscript 0.3]As p-n junction. The device performance with different n doping concentration is compared. Higher n doping concentration will increase the drive current by reducing the tunneling width while too higher n doping concentration results in tunneling in the middle of p-n junction and significantly increase the subthreshold swing. The forth part is the electroforming, set/reset and passivation study of ReRAM device with SiO[subscript x]. Different methods to reduce the electroforming voltage are developed. Set/reset process is also studied and a possible model is proposed to explain the set/ reset process. A new device structure without sidewall edge is studied for passivation and application in air. The final part is the summary of Ph.D work and also suggestions for future work are discussed. / text

Continuous downscaling of transistor size has been the major trend of the semiconductor industry for the past half century. In recent years, however, fundamental physical limits to continued downscaling were encountered. In order to overcome these limits, the industry experimented --- and continues to experiment --- with many new materials and architectures. Non-invasive, in-line methods of characterizing critical properties of these structures are in demand. This dissertation develops optical second-harmonic generation (SHG) to characterize performance-limiting defects, band alignment or strain distribution in four advanced electronic material systems of current interest: (1) Hot carrier injection (HCI) is a key determinant of the reliability of ultrathin silicon-on-insulator (SOI) devices. We show that time-dependent electrostatic-field-induced SHG probes HCI from SOI films into both native and buried oxides without device fabrication. (2) Band offsets between advanced high-k gate dielectrics and their substrates govern performance-limiting leakage currents, and elucidate interfacial bond structure. We evaluate band offsets of as-deposited and annealed Al₂O₃, HfO₂ and BeO films with Si using internal photoemission techniques. (3) Epi-GaAs films grown on Si combine the high carrier mobility and superior optical properties of III-V semiconductors with the established Si platform, but are susceptible to formation of anti-phase boundary (APB) defects. We show that SHG in reflection from APB-laden epi-films is dramatically weaker than from control layers without APBs. Moreover, scanning SHG images of APB-rich layers reveal microstructure lacking in APB-free layers. These findings are attributed to the reversal in sign of the second-order nonlinear optical susceptibility [chi]⁽²⁾ between neighboring anti-phase domains, and demonstrate that SHG characterizes APBs sensitively, selectively and non-invasively. (4) 3D integration --- i.e. connecting vertically stacked chips with metal through-Si-vias (TSVs) --- is an important new approach for improving performance at the inter-chip level, but thermal stress of the TSVs on surrounding Si can compromise reliability. We present scanning SHG images for different polarization combinations and azimuthal orientations that reveal the sensitivity of SHG to strain fields surrounding TSVs. Taken together, these results demonstrate that SHG can identify performance-limiting defects and important material properties quickly and non-invasively for advanced MOSFET device applications. / text

The semiconductor alloy indium gallium nitride (InxGa1-xN) offers substantial potential in the development of high-efficiency multi-junction photovoltaic devices due to its wide range of direct band gaps, strong absorption and other optoelectronic properties. This work uses a variety of characterization techniques to examine the properties of InxGa1-xN thin films deposited in a range of compositions by a novel plasma-enhanced evaporation deposition system. Due to the high vapour pressure and low dissociation temperature of indium, the indium incorporation and, ultimately, control of the InxGa1-xN composition was found to be influenced to a greater degree by deposition temperature than variations in the In:Ga source rates in the investigated region of deposition condition space. Under specific deposition conditions, crystalline films were grown in an advantageous nano-columnar microstructure with deposition temperature influencing column size and density. The InxGa1-xN films were determined to have very strong absorption coefficients with band gaps indirectly related to indium content. However, the films also suffer from compositional inhomogeneity and In-related defect complexes with strong phonon coupling that dominates the emission mechanism. This, in addition to the presence of metal impurities, harms the alloy’s electronic properties as no significant photoresponse was observed. This research has demonstrated the material properties that make the InxGa1-xN alloy attractive for multi-junction solar cells and the benefits/drawbacks of the plasma-enhanced evaporation deposition system. Future work is needed to overcome significant challenges relating to crystalline quality, compositional homogeneity and the optoelectronic properties of In-rich InxGa1-xN films in order to develop high-performance photovoltaic devices. / Thesis (Master, Mechanical and Materials Engineering) -- Queen's University, 2011-09-29 21:28:58.898

Capture of the energy in sunlight relies mainly on the use of light-absorbing semiconductors, in solar cells and in water-splitting devices. While solar cell efficiency has increased dramatically since the first practical device was made in 1954, production costs for the most-efficient solar absorbers, III-V semiconductors, remain high. This is largely a result of use of expensive, slow growth methods which rely on hazardous gas-phase precursors. Alternative growth methods are necessary to lower the cost for III-V materials for use in solar cells and improve the practicality of water-splitting devices. The research goal of this dissertation is two-fold: to expand the capabilities of close-spaced vapor transport, an alternative growth method for III-Vs to demonstrate its compatibility with current technologies; and to explore the fundamental chemistry of close-spaced vapor transport as a growth method for these materials. This dissertation surveys plausibly lower-cost growth methods for III-V semiconductors (Chapter II) and presents in-depth studies on the growth chemistry of two ternary III-Vs: GaAs1-xPx (Chapter III) and Ga1-xInxP (Chapter IV). Finally, the growth of GaAs microstructures which could be utilized in a water-splitting device is studied (Chapter V). This dissertation includes previously published and unpublished co-authored material. / 2019-01-09

The fields of telecommunications and optoelectronics are under constant pressure to shrink devices and reduce power consumption. Micro-scale photonic and plasmonic structures can trap light and enhance the brightness of active emitters; thus, these types of structures are promising avenues to accomplishing the goals of miniaturization and efficiency. A deeper understanding of specific structures is important in order to gauge their suitability for specific applications. In this dissertation, two types of microstructures are explored: one-dimensional silicon photonic crystals and self-assembled indium islands. This dissertation will provide novel characterization of these structures and a description of how to utilize or compensate for the observed features. A photonic crystal can act as a tiny resonator for certain wavelengths, making it a promising structure for applications that require extremely small lasers. However, because of silicon’s indirect bandgap, a silicon photonic crystal cavity would require the addition of an active emitter to function as a light source. Attempts to incorporate erbium into these cavities, and the observation of an unusual coupling phenomenon, will be discussed. Self-assembled indium islands are plasmonic structures that can be grown via molecular beam epitaxy. In theory, these islands should be pure indium nanoantennas on top of a smooth gallium arsenide substrate. In practice, the component materials are less segregated than predicted, giving rise to unexpected hollow dome shapes and a sub-surface indium layer. Although these features were not an intended result of indium island growth, they provide information regarding the island formation process and potentially contribute additional applications.