Due to the high electron mobility compared with Si, much attention has been focused on III-V compound semiconductors (gallium arsenide (GaAs) and indium phosphide (InP)) high-speed devices. The high-k material TiO2 not only has high dielectric constant (k = 35-100) but has well lattice match with GaAs and InP substrate. Therefore, titanium oxide (TiO2) was chosen to be the gate oxide in this study. The major problem of III-V compound semiconductors is known to have poor native oxide on it and leading to the Fermi level pinning at the interface of oxide and semiconductor. The C-V stretch-out phenomenon can be observed and the leakage current is high. The higher dielectric constant of poly-crystalline TiO2 film grown on GaAs can be obtained by metal organic chemical vapor deposition (MOCVD). But the high leakage current also occurred due to the grain boundary and defects in the poly-crystalline TiO2 film. The surface passivation of GaAs with (NH4)2Sx treatment (S-GaAs) could prevent it from oxidizing after cleaning and improve the interface properties of MOSFET. The fluorine from liquid phase deposited SiO2 solution can passivate the grain boundary of poly-crystalline MOCVD-TiO2 film and interface state. The high dielectric constant and low leakage current of fluorine passivated MOCVD-TiO2/S-GaAs can be obtained. The leakage current densities are 3.41 x 10-7 A/cm2 and 1.13 x 10-6A/cm2 at ¡Ó1.5 MV/cm, respectively. The Dit is 4.6 x 1011 cm-2eV-1 at the midgap. The dielectric constant can reach 71. In addition, the post-metallization annealing (PMA) is another efficiency way to improve the MOCVD-TiO2 quality. The mechanism of PMA process is from the reaction between the aluminum contact and hydroxyl groups existed on TiO2 film surface. Then the active hydrogen is produced to diffuse through the oxide and passivate the oxide traps. For PMA (350oC)-MOCVD-TiO2 on S-GaAs MOS structure, the leakage current densities can reach 2.5 x 10-7 and 5 x 10-7 A/cm2 at ¡Ó1.5 MV/cm, respectively. The dielectric constant and the Dit are 66 and 5.96 x 1011 cm-2eV-1, respectively. In order to avoid the leakage current from grain boundary of poly-crystalline TiO2, and liquid phase deposited TiO2 (LPD-TiO2) at low temperature can preserve the function of sulfur passivation. Therefore, the amorphous LPD-TiO2 was deposited on S-GaAs. The leakage current densities are 1.04 x 10-7 and 1.91 x 10-7 A/cm2 at ¡Ó0.5 MV/cm, respectively. The Dit is 3.2 x 1011 cm-2eV-1 and the dielectric constant is 48. The LPD-TiO2 film was deposited on (NH4)2Sx treated InP (S-InP), and the 4 x 100 £gm2 enhancement mode N channel InP MOSFET with LPD-TiO2 as gate oxide was fabricated, which showed the good characteristic. The normalized maximum gm is 43 mS/mm at VG = 1.3 V for VDS fixed at 1 V. The maximum calculated £gFE of 348 cm2/V¡Es at VDS = 1 V is obtained.

The design, fabrication and performance of an Extraordinary Magnetoresistance (EMR) and a Vertical Mesa Hall Sensor (VMHS) are studied. EMR devices have been fabricated from a 2DEG InAs/GaSb structures which exhibit a low carrier density and high mobility that achieve the best performance. The general electrical magneto-transport properties are given. The experiments investigate mainly different metallic patterns, which are Rectangular, Triangular and Tip pattern between 4-300 K. Probe configurations and the enhancement of relative size of metallic patterns are described. EMR effect is due to current deflection around the metal-semiconductor interface. The results are metallic pattern dependent. Using finite element analysis, good agreement between experimental and theoretical results was found. The best performance sensor is a symmetrical metallic Tip pattern. It is enhanced by the length of the Tip’s point and the large metallic area. This pattern when combines with an asymmetrical probe configuration, exhibits the highest EMR of 900% at –0.275T measured by inner probes and the best sensitivity of 54Ω/T at room temperature. The second study presents in-plane Hall effect sensors made from InSb. A simple device geometry has been used in which current flows in a plane perpendicular to the device surface. Device sensitivity depends on its geometry and a series of different contacts are used to investigate the geometry of the current flow distribution. The structures produced are only sensitive to the presence of one in-plane field component, and they also demonstrate good angular selectivity. Multi-electrodes were used to investigate biasing current from both mesa and substrate condition. We are able to examine the Hall voltage as a function of contact positions and also to create multiple VMHS. Offset reduction of devices has been achieved by moving the ground contacts to re-balance the current distribution under the mesa surface.

Designs for PnP GaAs/InxGa1-xAs/GaAs heterojunction bipolar transistors (HBTs) are proposed and simulated with the aid of commercial software. Band diagrams, Gummel plots and common emitter characteristics are shown for the specific case of x=1, x=0.7, and x linearly graded from 0.75 to 0.7. Of the three designs, it is found that the linearly graded case has the lowest leakage current and the highest current gain. IV curves for all four possible classes of InAs/GaAs heterojunction (nN, nP, pN, pP) are calculated. A pN heterojunction is fabricated and characterized. In spite of the 7% lattice mismatch between InAs and GaAs, the diode has an ideality factor of 1.26 over three decades in the forward direction. In the reverse direction, the leakage current grows exponentially with the magnitude of the bias, and shows an effective ideality factor of 3.17, in stark disagreement with simulation. IV curves are taken over a temperature range of 105 K to 405 and activation energies are extracted. For benchmarking the device processing and the characterization apparatus, a conventional GaAs homojunction diode was fabricated and characterized, showing current rectification ratio of 109 between plus one volt and minus one volt. Because the PnP material for the optimal HBT design was not available, an Npn GaAs/InAs/InAs HBT structure was processed, characterized, and analyzed. The Npn device fails in both theory and in practice; however, by making a real structure, valuable lessons were learned for crystal growth, mask design, processing, and metal contacts. / Master of Science

IQE (Europe) Ltd. manufactures group III/V compound semiconductor material structures, using the Metal Organic Vapour Phase Epitaxy process. The manufactured ranges of semi-conducting materials are relative to discrete or multi-compound use of Gallium Arsenide or Indium Phosphide [III/V]. For MOVPE to compete in large-scale markets, the manufacturing process requires transformation into a reliable, repeatable production process. This need is identified within the process scrap percentage of the process when benchmarked against the more mature Si-CVD process. With this wide-ranging product base and different material systems, flexible processes and systems are essential. The negative impact however, of this demanded flexibility is a complex system, resulting in instability. Minor fluctuations in time, flow, pressure, temperature, or composition in the manufacturing process, will lead to characteristic differences in the produced material [product], when comparing the prescribed run to the actual run. The product profile changes very rapidly, correspondingly the failure profile of the process is equally as dynamic, it is essential therefore that the analysis and projected activities and actions can be identified and consolidated in a timely manner. This project evaluates the process used by IQEE to manufacture III/V compound semi-conducting material structures and uses the business performance to identify the process drivers. One year's [1997] business and process information is used for a single iteration of the improvement cycle. These drivers are then utilised as operators and offer the critical weaknesses in the process related to performance blockages. Some of the techniques utilised in the process evaluation and cause derivation; are original contributions specifically derived for use with a multi-platform complex process with multiple cause and effect operators. A double reporting FMEA contributes a differing rank for like machines running differing products, offering a machine specific failure profile. A novel composite of P-diagram and process flow techniques enables determination of activity influences confirming the key failure mechanism as previously identified by the business risk analysis. This project concludes by nominating the key failure mechanism accounting for 41% of the approximate 50% scrap figure identified again within the business risk analysis. The effects attributed to this failure mechanism are 2- dimensionally analysed utilising an original double operating FMEA, plotting effect to effect for the individual causes, offering a prioritised list of failure categories. The highest priority failure mode is addressed by an equipment design exercise, resulting in an overall 10% sales potential recontribution.

La production d'énergie photovoltaïque est une option d'avenir pour répondre au développement économique de notre société tout en réduisant notre impact sur l'environnement. Mais pour devenir compétitive, cette filière doit améliorer le rendement des cellules solaires. Une technologie d'avenir consiste à combiner différents matériaux via une croissance par épitaxie et l'usage du collage direct. Cette thèse, financée par SOITEC, vise au développement du collage d'arseniure de gallium (GaAs) sur le phosphure d'indium (InP) pour la cellule SmartCell. L'objectif est d'optimiser son comportement électrique via un modèle numérique prenant en compte son état physico-chimique. Nous présentons d'abord un ensemble d'outils de caractérisations électriques pour réaliser une mesure I(V) précises de l'interface de collage. En fonction des cas, nous détaillons des contacts métalliques adaptés pour améliorer cette caractérisation. Une étude détaillée de l'hétérostructure GaAs/InP et des homostructures GaAs/GaAs et InP/InP amène ensuite à une compréhension de leur mécanisme de collage. Après recuit thermique, le procédé de collage hydrophile engendre des oxydes d'interfaces qui se résorbent dans le cas de l'InP et se fragmentent pour le GaAs. A paramètres constants, les empilements obtenus sont meilleurs que ceux de l'état de l'art au niveau électrique et mécanique. Nous poursuivons avec des propositions de procédés innovants pour maitriser l'oxyde d'interface et optimiser l'hétérostructure. Parmi ces options nous validons l'approche avec exposition ozone qui vise à générer sélectivement un oxyde avant mise en contact. L'empilement obtenu affiche une résistance proche de nos mesures de référence et a un fort potentiel. Enfin l'étude se conclue sur la présentation d'un modèle numérique inédit reliant procédé de collage, état d'interface et comportement électrique. A recuit donné, l'interface est hétérogène avec une zone reconstruite (conduction thermo-électronique) et une zone avec oxyde (conduction tunnel). Ces régions s'activent préférentiellement en fonction de la température de fonctionnement. Elles sont pondérés par un critère qui détermine le niveau de reconstruction du collage et qui sera utile pour de futurs développements de l'application. / The solar photovoltaic is a promising way to support our economical growth while it can reduce the environmental impact of our society. But, to be truly competitive, the sector has to develop more efficient solar cells. An interesting option aims at combining different materials either by epitaxy growth and direct bonding. The Ph.D. was funded by the SOITEC company with the goal to develop the bonding of the gallium arsenide (GaAs) on the indium phosphide (InP) for the SmartCell architecture. We had to optimize its electrical behavior with a numerical model taking into account the bonding interface state. We introduce the study with a wide range of I(V) tools to precisely characterize the bonding interface. Depending on the case, we detail suitable metal contacts to improve the test. A study in deep of the GaAs/InP heterostructure and the GaAs/GaAs and the InP/InP homostructures leads to a better understanding of the bonding mechanisms. After a thermal annealing, the hydrophilic bonding process generates oxyde compounds at the interface which are absorbed in the InP case and are fragmented in the GaAs case. For given parameters, our stacks are electrically and mechanically better than the state of the art. Then we propose innovative processes to control the interface oxyde and thus optimize the heterostructure. Among them, we validate a new approach with ozone exposure that selectively generates an oxyde prior to bonding. The interface resistance of the stack is therefore closed to our best results and has great potentials. To conclude, the study focuses on a novel numerical model connecting the bonding process, the interface state and the electrical behavior. For a given annealing, the interface is heterogenous with reconstructed areas (thermionic conduction) and oxyde areas (tunnel conduction). These regions are preferentially activated as a function of the operating temperature. They are weighted by a criteria determining the level of the bonding reconstruction which will be useful for the future developments of the application.

The vertical-cavity surface-emitting laser or VCSEL is a special type of diode laser, which has established itself in optoelectronic applications asa low-cost, high-quality miniaturized light source. The development of VCSELs can be largely promoted with support from computer simulations. In this study, we have used such simulations, on one hand to understand and improve the VCSEL performance, and on the other hand to prepare for analyzing new device concepts such as transistor-VCSELs. This thesis starts with a background introduction to the principle idea of VCSELs and then states the significance of this simulation work.Then it briefly introduces the previously used simulation workbench Sentaurus and explains the mathematical approach and the computation methods of the finally chosen simulator PICS3D. The case study of a fabricated and characterized epitaxially regrown VCSEL is the major component of this work. First the device configuration is demonstrated with detailed discussion on several design features. Second the physical models of electrical, optical and thermal phenomena along with their key parameters are presented and so are the advanced models for the active region. The main results of simulation, including steady-state characteristics and small-signal modulation, show good agreement with the experimental results and reveal some imperfections of the device design and processing, such as the overestimated stability of the regrown junction and the variation of cavity length caused by over-etch. This work is also treated as an evaluation of the simulator PICS3D, and two problems are identified: one is the troublesome way to construct a 3D device by coupling several 2D layer structures together, requiring the mesh for each layer structure to be compatible; the other would be the tricky boundary setting for the adopted method, Effective Index Method (EIM), for the transverse field calculation when only a weak index guiding effect exits in the cavity. Finally, we summarize this work and suggest some tasks for further simulations.

Des puits quantiques à base d'hétérostructures In0.53 Ga0.47 As/In0.52 Al0.48 As, fabriqués par épitaxie par jets moléculaires sur substrats InP(111)A, sont étudiés par microscopie et spectroscopie à effet tunnel à basse température et sous ultra-vide. La première partie est consacrée à une étude de la surface épitaxiée (111)A de In0.53 Ga0.47 As de type n. Il est découvert que le niveau de Fermi de surface est positionné dans la bande de conduction, à proximité du niveau de Fermi de volume, et peut être partiellement contrôlé en variant la concentration d'impuretés de type n dans le volume. Ce résultat est confirmé en déterminant la relation de dispersion de la bande de conduction en surface. Un tel dépiégeage partiel du niveau de Fermi de surface indique que la densité d'états de surface accepteurs est faible. Il est proposé que ces états proviennent de défauts ponctuels natifs localisés à la surface. La deuxième partie, basée sur les résultats obtenus dans la première partie, est consacrée à une étude de puits quantiques In0.53 Ga0.47 As de surface, déposés sur des barrières In0.52 Al0.48 As selon la direction (111)A. Les mesures sont conduites sur la surface épitaxiée (111)A du puits quantique In0.53 Ga0.47 As, de manière à pouvoir sonder à l'échelle du nanomètre la distribution de densité locale d'états électroniques dans le plan du puits quantique. Il est confirmé que des sous-bandes électroniques sont formées dans le puits quantique, et que la concentration d'électrons dans le puits peut être contrôlée du fait du dépiégeage partiel du niveau de Fermi de surface. Il est découvert qu'un phénomène de percolation d'états localisés survient dans la queue de chaque sous-bande, ce qui indique la présence d'un potentiel désordonné dans le puits quantique. Les seuils de percolation sont déterminés en utilisant un modèle semi-classique. L'origine du potentiel désordonné est attribuée à une distribution aléatoire des défauts ponctuels natifs à la surface du puits quantique. Il est également découvert qu'un état lié apparaît au bas de chaque sous-bande à proximité d'un défaut ponctuel natif de type donneur. L'énergie de liaison et le rayon de Bohr des états liés peuvent être directement déterminés. De plus, il est démontré que l'énergie de liaison et le rayon de Bohr sont fonctions de l'épaisseur du puits quantique, en accord quantitatif avec des calculs variationnels d'impuretés dans le modèle de l'atome d'hydrogène.