Satisfaire les besoins en énergie de manière responsable est possible grâce aux énergies renouvelables, notamment éoliennes et solaires. Cependant ces centres de captation d’énergie sont éloignés dans zones de consommation. Le transport de l’énergie via des réseaux HVDC (haute tension courant continu) permet un rendement et une flexibilité avantageuse face au transport HVAC (haute tension courant alternatif). Ceci est rendu possible grâce aux convertisseurs utilisant l’électronique de puissance. Les récents développements sur les semi-conducteurs à large bande interdite, plus particulièrement le carbure de silicium (SiC) offrent la possibilité de concevoir ces convertisseurs plus simples, utilisant des briques technologiques de plus fort calibre (≤ 10 kV). Cependant le packaging, essentiel à leur bon fonctionnement, ne suit pas ces évolutions. Dans cette thèse, nous explorons les technologies actuelles ainsi que les limites physique et normatives liées au packaging haute tension. Des solutions innovantes sont proposées pour concevoir un module de puissance haute tension, impactant que faiblement les paramètres connexes (résistance thermique, isolation électrique et paramètres environnementaux). Les éléments identifiés comme problématiques sont traités individuellement. La problématique des décharges partielles sur les substrats céramiques métallisés est développée et une solution se basant sur les paramètres géométriques a été testée. Le boitier standard type XHP-3 a été étudié et une solution permettant de le faire fonctionner à 10 kV à fort degré de pollution a été développée. / The supply of carbon-free energy is possible with renewable energy. However, windfarms and solar power plants are geographically away from the distribution points. Transporting the energy using the HVDC (High Voltage Direct Current) technology allow for a better yield along the distance and result in a cost effective approach compared to HVAC (High Voltage Alternative Current) lines. Thus, there is a need of high voltage power converters using power electronics. Recent development on wide bandgap semiconductors, especially silicon carbide (SiC) allow a higher blocking voltage (around 10 kV) that would simplify the design of such power electronic converters. On the other hand, the development on packaging technologies needs to follow this trend. In this thesis, an exploration of technological and normative limitation has been done for a high voltage power module design. The main hot spot are clearly identified and innovative solutions are studied to provide a proper response with a low impact on parasitic parameters. Partial Discharges (PD) on ceramic substrates is analyzed and a solution of a high Partial Discharge Inception Voltage (PDIV) is given based on geometrical parameters. The XHP-3 like power modules are studied and a solution allowing a use under 10 kV at a high pollution degree (PD3) is given.

The use of insulated-gate bipolar transistor (IGBT)-based power converters is increasing exponentially. This is due to high performance of these devices in terms of efficiency and switching speed. However, due to the switching action, high frequency electromagnetic interference (EMI) noises are generated. Design of a power converter with reduced EMI noise level is one of the primary objectives of this research. The first part of the work focuses on designing common-mode (CM) filters, which can be integrated with differential-mode (DM) filters for three-phase pulse-width modulation (PWM) rectifier-based motor drives. This work explores the filter design based on the CM equivalent circuit of the drive system. Guidelines are provided for selection of the filter components. Different variants of the filter topology are evaluated to establish the effectiveness of the proposed topology. Analytical results based on Bode plot of the transfer functions are presented, which suggest effective EMI reduction. Experimental results based on EMI measurement on the grid side and CM current measurement on the motor side are presented. These results validate the effectiveness of the filter. In the second part of the work, it is shown that inclusion of CM filters into DM filters results in resonance oscillations in the CM circuit. An active damping strategy is proposed to damp the oscillations in both line-to-line and line-to-ground ac voltages and currents. An approach based on pole placement by state feedback is used to actively damp both the DM and CM filter oscillations. Analytical expressions for state-feedback controller gains are derived for both continuous-and discrete-time models of the filter. Trade-off in selection of the active damping gain on the lower-order grid current harmonics is analysed using a weighted admittance function method. In the third part of the work, single-phase grid-connected power converters are considered. An integrated CM filter with DM LCL filter is proposed. The work explores the suitability of PWM methods for single-phase and parallel single-phase grid-connected power converters. It is found that bipolar PWM and unipolar PWM with 180◦interleaving angle are suitable for single-phase and parallel single-phase power converters, respectively. The proposed configuration along with the PWM methods reduces the CM voltage, CM current, and EMI noise level effectively. It is also shown that the suggested circuit is insensitive to nonidealities of the power converter such as dead-time mismatch, mismatch in converter-side inductors, unequal turn on and turn off of the switches, and propagation delays. In the fourth part of the work, the inter-phase inductor in parallel interleaved power converters is integrated with LCL filter boost inductor. Different variant designs are presented and compared with the proposed structure. It is shown that the proposed structure makes use of standard core geometries and consumes lesser core material as well as copper wire. Hence, it reduces the overall size and cost of the power converter. In the present work, a 10kVA three-phase back-to-back connected with input LCL filter and output dv/dt filter, a 5kVA single-phase grid-connected power converter with LCL filter, and a 7.5kVA parallel single-phase grid-connected power converter with LCL filter are fabricated in the laboratory to evaluate and validate the proposed methods. The experimental results validate the proposed methods that result in significant EMI performance improvement of grid-connected power converters.

Les MOSFET en SiC sont appelées à remplacer les IGBT en Silicium pour des applications de demandant une plus forte vitesse de commutation. Cependant, les MOSFET en SiC ont encore quelques problèmes de fiabilité, tels que la robustesse de la diode interne ou bien la robustesse de l'oxyde de grille. Cette dernière est liée à l’oxyde de grille des composants du type MOSFET. Des instabilités de la tension de seuil sont aussi signalées. Cette thèse aborde ces deux sujets sur des MOSFET commerciaux 1200 V. L'étude de la diode interne met en évidence que les caractéristiques I-V (de la diode intrinsèque) demeurent stables après l'application d'un stress. Cependant, une dérive surprenante de la tension de seuil apparaît. Des tests complémentaires, en stressant le canal à la place de la diode, avec les mêmes contraintes n'ont pas montré de dérive significative de la tension de seuil. Donc, l'application d'un stress en courant quand le composant est en mode d'accumulation semble favoriser l'apparition des instabilités de la tension de seuil. La robustesse de l'oxyde de grille concerne les instabilités de la tension de seuil, mais aussi l'estimation de la durée de vie à des conditions d'opération nominales. Les résultats obtenus montrent que la durée de vie de l'oxyde de grille n'est plus un problème. Pourtant, le suivi du courant de grille pendant les tests ainsi que les caractérisations de la capacité de grille mettent en évidence des translations de la courbe C(V) à cause des phénomènes d’injection des porteurs et de piégeage, mais aussi la possible présence d’ions mobiles. Aussi, une bonne analyse des dégradations et dérives liées à l’oxyde de grille doit être réalisée. / SiC power MOSFETs are called to replace Si IGBT for some medium and high power applications (hundreds of kVA). However, even if crystallographic defects have been drastically reduced, SiC MOSFETs are always concerned by some robustness issues such as the internal diode robustness or the robustness of the gate oxide. The last one especially affects MOSFETs devices and is linked to the apparition of instabilities in the threshold voltage. This thesis focuses on these two issues. The study of the internal diode robustness highlighted that the I-V curve (of the intrinsic diode) remains stable after the application of a current stress in static mode, but also with the DUT placed in a converter with inductive switchings. These are the most stressful conditions. However, a surprising drift in the threshold voltage has been observed when some devices operates under these conditions; in static mode or in a converter. Complementary tests stressing the channel instead of the internal diode in the same temperature and dissipated power, have not resulted in a drift of the threshold voltage. Thus, the application of a current stress when the device is in accumulation regime could favour the apparition of instabilities in the threshold voltage. The study of the gate oxide focus in the instabilities of the threshold voltage, but also on the expected lifetime of the oxide at nominal conditions. Results obtained shown that the expected lifetime (TDDB) of the oxide is no longer a problem. Indeed, tests realized in static mode, but also in a converter under inductive switching conditions resulted in expected lifetimes well above 100 years. However, the monitoring of the gate current during the test and gate capacitance characterizations C(V) highlighted a shift in the capacitance due to carrier injection and trapping phenomena and probably to the presence of mobile-ions. Still regarding the instabilities of the threshold voltage, classic tests resulted in no significant variations of the threshold voltage at 150 _C. However, at 200 _C the drift observed for some manufacturers is higher than +30%. This is unacceptable for high-temperature applications and evidence that the quality of the gate oxide and the SiC=SiO2 interface must continue to be improved, together with the manufacturing methods to minimize the presence of mobile ions in the substrate.

Tato disertační práce se zabývá využitím programovatelných hradlových polí (FPGA) v diagnostice měničů, využívajících spínaných IGBT tranzistorů. Je zaměřena na budiče těchto výkonových tranzistorů a jejich struktury. Přechodné jevy veličin, jako jsou IG, VGE, VCE během procesu přepínání (zapnutí, vypnutí), mohou poukazovat na degradaci IGBT. Pro měření a monitorování těchto veličin byla navržena nová architektura budiče IGBT. Rychlé měření a monitorování během přepínacího děje vyžaduje vysokou vzorkovací frekvenci. Proto jsou navrhovány paralelní vysokorychlostní AD převodníky (> 50 MSPS). Práce je zaměřena převážně na návrh zařízení s FPGA včetně hardware a software. Byla navržena nová deska plošných spojů s FPGA, která plní požadované funkce, jako je řízení IGBT pomocí vícenásobných paralelních koncových stupňů, monitorování a diagnostiku, a propojení s řídicí jednotkou měniče.