An interactive software shell has been developed which integrates several packaging simulation tools developed at the University of Arizona which are used to analyze electro-magnetic coupling between interconnects in an integrated circuit. This software shell uses experimental frames to manage this simulation process. Through the experimental frames, the model descriptions and the model inputs are separated, and input data is verified for correctness. This model/input separation allows several model variations to be tested based on several input variations. The results of these simulations are then analyzed and displayed graphically. Further work for the software shell is discussed. This tool provides a user-friendly, efficient method for performing coupled-line analyses in interconnect systems.

The focus of this work is on the steady-state analysis of RE circuits using a coupled device and circuit simulator. Efficient coupling algorithms for both the time-domain shooting method and the frequency-domain harmonic balance method have been developed. A modified Newton shooting method considerably improves the efficiency and reliability of the time-domain analysis. Three different implementation approaches of the harmonic balance method for coupled device and circuit simulation are investigated and implemented. These include the quasi-static, non-quasi-static, and modified-Volterra-series approaches. Comparisons of simulation and performance results identify the strengths and weakness of these approaches in terms of accuracy and efficiency. / Graduation date: 2005

Algorithms and simulators comprised of SPICE3 as a circuit level simulator and two device simulators EOFLOW and PROPHET for accurate simulation of new types of devices are presented in this thesis. An integration of EOFLOW with SPICE3 creates a capability for efficient simulation of a system containing interconnected electroosmotic flow channels together with control electronics. Using this simulator, an accurate simulation of a complex interconnection of channels has been performed. In addition, various flow control schemes have been evaluated for their effectiveness. Coupling of PROPHET and SPTCE3 allows for the simulation of accurate semiconductor device models. This capability is necessary for critical RF and analog applications. The coupled SPICE3-HB-PROPHET simulator incorporates the harmonic balance algorithm for large-signal frequency domain analysis. Applications of this analysis are demonstrated in the noise coupling between devices sharing the same silicon substrate. / Graduation date: 2003

The conventional approach to validate the analog and mixed signal designs utilizes extensive SPICE-level simulations. The main challenge in this approach is to know when all important corner cases have been simulated. An alternate approach is to use the formal verification techniques. Formal verification techniques have gained wide spread popularity in the digital design domain; but in case of analog and mixed signal designs, a large number of test scenarios need to be designed to generate sufficient simulation traces to test out all the specified system behaviours. Analog and mixed signal designs can be formally modeled as hybrid systems and therefore techniques used for formal analysis and verification of hybrid systems can be applied to the analog and mixed signal designs. Generally, formal verification tools for hybrid systems work at the abstract level where we model the systems in terms of differential equations or algebraic equations. However the analog and mixed signal system designers are very comfortable in designing the circuits at the transistor level. To bridge the gap between abstraction level verification and the designs validation which has been implemented at the transistor level, the very important issue we need to address is: Can we formally verify the circuits at the transistor level itself? For this we have proposed a framework for doing the formal verification of analog and mixed signal designs using SPICE simulation traces in one of the hybrid systems formal verification tools (i.e. Checkmate from CMU). An extension to a formal verification approach of hybrid systems is proposed to verify analog and mixed signal (AMS) designs. AMS designs can be formally modeled as hybrid systems and therefore lend themselves to the formal analysis and verification techniques applied to hybrid systems. The proposed approach employs simulation traces obtained from an actual design implementation of AMS circuit blocks (for example, in the form of SPICE netlists) to carry out formal analysis and verification. This enables the same platform used for formally validating an abstract model of an AMS design to be also used for validating its different refinements and design implementation, thereby providing a simple route to formal verification at different levels of implementation. Our approach has been illustrated through the case studies using simulation traces form the different frameworks i.e. Simulink/Stateflow framework and the SPICE simulation traces. We demonstrate the feasibility of our approach around the Checkmate and the case studies for hybrid systems and the analog and mixed signal designs.