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1	An Optimization Framework for Embedded Processors with Auto-Modify Addressing Modes Lau, ChokSheak 08 December 2004 (has links) Modern embedded processors with dedicated address generation unit support memory accesses using indirect addressing mode with auto-increment and auto-decrement. The auto-increment/decrement mode, if properly utilized, can save address arithmetic instructions, reduce static and dynamic footprint of the program and speed up the execution as well. We propose an optimization framework for embedded processors based on the auto-increment and decrement addressing modes for address registers. Existing work on this class of optimizations focuses on using an access graph and finding the maximum weight path cover to find an optimized stack variables layout. We take this further by using coalescing, addressing mode selection and offset registers to find further opportunities for reducing the number of load-address instructions required. We also propose an algorithm for building the layout with considerations for memory accesses across basic blocks, because existing work mainly considers intra-basic-block information. We then use the available offset registers to try to further reduce the number of address arithmetic instructions after layout assignment. 56300 Motorola DSP56300 Graph coloring Embedded systems Embedded processors Compiler optimization Offset assignment Address generation SOA GOA Coalesce Stack size GCC Address register Offset register Modify register Digital signal processing DSP Interference graph Access graph

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An Optimization Framework for Embedded Processors with Auto-Modify Addressing Modes