No description available.

Recent advances in power electronics have lead to the wide spread adoption of advanced power supplies and energy efficient devices. This has lead to increased levels of harmonic currents in power systems, degrading the performance of electrical machinery and interfering with telecommunication services. Active filters provide a solution to these problems by compensating for the distorted currents drawn by non-linear loads. Optimal methods for controlling these active filters have been determined by computer simulation and experimental implementation. Methods used for isolating the harmonic content of an unbalanced three phase load current were compared by computer simulations. A technique based on the Fast Fourier Transform (FFT) was developed as part of this work and shown to perform favourably. Notch Filtering, Sinusoidal Subtraction, Instantaneous Reactive Power Theory, Synchronous Reference Frame and Fast Fourier Transform methods were simulated. The methods shown to be suitable for compensation of three phase unbalanced loads were implemented in a Digital Signal Processor to evaluate true performance. These methods were Notch Filtering, Sinusoidal Subtraction, Fast Fourier Transform, and a High Pass Filter based method. A completely digital hysteresis current controller for a three phase active filter inverter has been developed and implemented with a Field Programmable Gate Array. This controller interfaces directly to a digital signal processor and is resistant to electromagnetic interference. Results from the experimental hardware verified that the active filter model used for simulation is accurate, and may be used for further development of harmonic isolation methods. A technique using notch filtering gives the best performance for steady loads, with the FFT based technique giving the most flexible operation for a range of load current characteristics. Novel use of the FFT based harmonic isolation technique allows selective cancellation of individual harmonics, with particular application to multiple shunt filters connected in parallel.

This thesis describes a new concept, applicable to high-power current-sourced conversion (CSC), where a controllable firing-angle shift is introduced between series and parallel converters to enable independent active and reactive power control. The firing-shift concept solves a difficult problem, by giving thyristor based CSCs the control flexibility of pulse-width modulated (PWM) converters, but without a loss in efficiency or rating. Several configurations are developed, based on the firing-shift concept, and provide flexible, efficient solutions for both very high power HVDC transmission, and very high current industrial processes. HVDC transmission configurations are first developed for 4-quadrant high-pulse operation, based on the series connected multi-level current reinjection (MLCR) topology. Independent reactive power control between two ends of an HVDC link are proven under firing-shift control, with high-pulse operation, and without on-load tap changing (OLTC) transformers. This is followed by application of firing-shift control to a bi-directional back-to-back HVDC link connecting two weak systems to highlight the added dc voltage control flexibility of the concept. The fault recovery capability of an MLCR based ultra-HVDC (UHVDC) long distance transmis-sion scheme is also proven under firing-shift control. The scheme responds favourably to both ac disturbances and hard dc faults, without the risk of commutation failures and instability experienced during fault recovery of line-commutated conversion. The two-quadrant capability of very high current rectification is also proven with configurations based on phase-shifted 12-pulse and MLCR parallel CSCs. The elimination of the electro-mechanical OLTC/satruable reactor voltage control, the high-current CSC’s biggest shortcoming, greatly improves controllability and with firing-shift control, ensures high power-factor for all load conditions. This reduces the reactive power demands on the transmission system, which results in more efficient power delivery

No description available.

This research addresses some of the difficulties faced when operating voltage controlled inverters with synchronous generators in microgrids. First, an overview of microgrid value propositions is provided, and the problems faced when attempting to use microgrids to provide improved power quality are discussed. Design considerations for different types of microgrids are provided to enable microgrids to deliver the desired functionality without adding unnecessary cost. The main body of this research investigates the poor transient load sharing encountered between voltage controlled inverters and synchronous generators in islanded operation. Poor transient load sharing results in high peak inverter rating requirements and high cost. The tradeoff between power quality and power sharing is highlighted, and methods to improve transient load sharing are proposed. The use of current limiting to protect inverters during faults and overloads is also investigated. Stability problems are identified when using simple inverter current limiting methods when operating in parallel with synchronous generators. Virtual impedance current limiting is proposed to improve transient stability during current limiting. The methods proposed in this thesis for mitigating inverter overloads and faults will allow for more reliable and cost effective application of inverter based distributed energy resources with synchronous generators in microgrids.

In this thesis, the neutral point potential drift/fluctuation of the three-level neutral point clamped inverter is analyzed and a novel control algorithm, the two-parameter PWM method is proposed to confine the neutral point potential variation to a very small range. The two-parameter PWM method provides superior neutral point potential control performance even with small DC bus capacitors. The method is based on PWM pulse pattern modification and requires no additional hardware. Detailed analytical models of the neutral point current and potential as a function of the modulation parameters are established and the neutral point potential behavior is thoroughly investigated. Based on the study, the deficiency of the known methods is illustrated and the two-parameter PWM method is developed and its superior performance demonstrated. The performance of the two-parameter PWM method is verified by means of computer simulations utilizing both the per-PWM-cycle average model and the detailed model of the inverter. The results are supported by laboratory experiments involving both an R-L load and an induction motor drive.

In this thesis, a practical vector controlled elevator drive is presented. Indirect vector control of induction machine is investigated in theory and then implemented. Control technique is compared with scalar control and induction machine is compared with dc motor. The operation of the system depends on induction machine parameters, so how to accurately and automatically obtaining of the parameters is also presented. Finally, the elevator system is introduced, the application of this control system to the elevator system is described and a basic elevator control system is simulated.

Made available in DSpace on 2016-12-12T20:27:39Z (GMT). No. of bitstreams: 1 Luiz Ricardo Lima.pdf: 7933900 bytes, checksum: 225fa96a5d447127d12b2a23f0483893 (MD5) Previous issue date: 2011-08-12 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This work presents a study about the NPC (Neutral Point Clamped) three-level inverter with a modified Undeland snubber and using a Buck-Boost converter to regenerate the energy processed by the snubber. Initially, qualitative and quantitative analysis of this inverter with the presence of the snubber are presented and a project methodology is proposed. The same analysis and project are presented for the Buck-Boost converter and it is shown that this converter can operate under ZVS (Zero Voltage Switching). Next, mathematical models of all circuitry necessary for the realization of the digital control of the inverter are presented and a controller is projected. Using data of the projected NPC inverter, Buck-Boost converter and digital controller, simulation results are presented. These simulations were done using software s Orcad Pspice and Simulink. Finally, implementation details and experimental results of a 1.5 kW, 800 V input voltage, 127 V output voltage and 200 kHz switching frequency prototype are presented. / Este trabalho apresenta um estudo do inversor NPC (Neutral Point Clamped) a três níveis com snubber de Undeland modificado, utilizando um conversor Buck-Boost para regeneração da energia processada pelo snubber. Inicialmente são feitas analises qualitativa e quantitativa desse inversor com a presença do snubber e é apresentada uma metodologia de projeto. As mesmas analises e projeto são feitos para o conversor Buck-Boost e é mostrado como ele pode operar com comutação ZVS (Zero Voltage Switching). A seguir são mostrados os modelos matemáticos de todos os circuitos necessários para se realizar o controle digital do inversor e é apresentado um projeto de controlador digital. Utilizando os dados de projeto do inversor NPC, do conversor Buck-Boost e do controle são apresentados os resultados de simulações feitas nos programas Orcad Pspice e Simulink. Por ultimo, são apresentados detalhes de implementação e resultados experimentais de um protótipo de 1,5 kW, 800 V de tensão de barramento, 127 V de tensão de saída e 200 kHz de freqüência de comutação.

O emprego de ferramentas de automação de projetos de circuitos integrados permitiu que projetos complexos atingissem time-to-market e custos de produção factíveis. Neste contexto, o processo de síntese lógica é uma etapa fundamental no fluxo de projeto. O passo independente de tecnologia (parte do processo de síntese lógica, que é realizada sem considerar características físicas) é tradicionalmente realizado sobre equações. O desenvolvimento de novos algoritmos de otimização multi-nível recentemente migrou para o emprego de And-Inverter Graphs (AIGs). O número de nodos e a altura de um grafo apresentam melhor correlação com os resultados em área e atraso de um circuito, se comparados com as características de outras formas de representação. Neste trabalho, um algoritmo de síntese lógica independente de tecnologia, que funciona sobre uma estrutura de AIGs, é proposto. Uma nova abordagem para a construção de AIGs, baseada no novo paradigma de síntese chamado de composição funcional, é apresentado. Esta abordagem consiste em construir o AIG final através da associação de AIGs mais simples, em uma abordagem bottom-up. Durante a construção do grafo, o método controla as características dos grafos intermediários e finais, a partir da aplicação de uma função de custo, como forma de avaliação da qualidade desses AIGs. O objetivo é a minimização do número de nodos e da altura do AIG final. Este algoritmo de síntese lógica multi-objetivo apresenta características interessantes e vantagens quando comparado com abordagens tradicionais. Além disso, este trabalho apresenta a síntese de funções com múltiplas saídas em AIGs, o que melhora a característica de compartilhamento de estruturas, melhorando o circuito resultante. Resultados mostraram a melhora em torno de 5% em número de nodos, quando comparados com os resultados obtidos com a ferramenta ABC. / The use of design automation tools has allowed complex projects to reach feasible time-to-market and cost parameters. In this context, logic synthesis is a critical procedure in the design flow. The technology independent step (part of the logic synthesis which is performed regardless any physical property) is traditionally performed over equations. The development of new multi-level optimization algorithms has recently shifted towards the use of And-Inverter-Graphs (AIGs). The number of nodes and the graphs depth in AIGs present better correlation with resulting circuit area and delay than any characteristic of other representations. In this work, a technology independent synthesis algorithm that works on top of an AIG data structure is proposed. A novel approach for AIG construction, based on a new synthesis paradigm called functional composition, is introduced. This approach consists in building the final AIG by associating simpler AIGs, in a bottom-up approach. The method controls, during the graphs construction, the characteristics of final and intermediate graphs by applying a cost function as a way to evaluate the quality of those AIGs. The goal is to minimize the number of nodes and the depth of the final AIG. This multi-objective synthesis algorithm has presented interesting features and advantages when compared to traditional approaches. Moreover, this work presents a method for AIGs construction for multiple output functions, which enhances structural sharing, improving the resulting circuit. Results have shown an improvement of around 5% in number of nodes when compared to ABC tool.

O emprego de ferramentas de automação de projetos de circuitos integrados permitiu que projetos complexos atingissem time-to-market e custos de produção factíveis. Neste contexto, o processo de síntese lógica é uma etapa fundamental no fluxo de projeto. O passo independente de tecnologia (parte do processo de síntese lógica, que é realizada sem considerar características físicas) é tradicionalmente realizado sobre equações. O desenvolvimento de novos algoritmos de otimização multi-nível recentemente migrou para o emprego de And-Inverter Graphs (AIGs). O número de nodos e a altura de um grafo apresentam melhor correlação com os resultados em área e atraso de um circuito, se comparados com as características de outras formas de representação. Neste trabalho, um algoritmo de síntese lógica independente de tecnologia, que funciona sobre uma estrutura de AIGs, é proposto. Uma nova abordagem para a construção de AIGs, baseada no novo paradigma de síntese chamado de composição funcional, é apresentado. Esta abordagem consiste em construir o AIG final através da associação de AIGs mais simples, em uma abordagem bottom-up. Durante a construção do grafo, o método controla as características dos grafos intermediários e finais, a partir da aplicação de uma função de custo, como forma de avaliação da qualidade desses AIGs. O objetivo é a minimização do número de nodos e da altura do AIG final. Este algoritmo de síntese lógica multi-objetivo apresenta características interessantes e vantagens quando comparado com abordagens tradicionais. Além disso, este trabalho apresenta a síntese de funções com múltiplas saídas em AIGs, o que melhora a característica de compartilhamento de estruturas, melhorando o circuito resultante. Resultados mostraram a melhora em torno de 5% em número de nodos, quando comparados com os resultados obtidos com a ferramenta ABC. / The use of design automation tools has allowed complex projects to reach feasible time-to-market and cost parameters. In this context, logic synthesis is a critical procedure in the design flow. The technology independent step (part of the logic synthesis which is performed regardless any physical property) is traditionally performed over equations. The development of new multi-level optimization algorithms has recently shifted towards the use of And-Inverter-Graphs (AIGs). The number of nodes and the graphs depth in AIGs present better correlation with resulting circuit area and delay than any characteristic of other representations. In this work, a technology independent synthesis algorithm that works on top of an AIG data structure is proposed. A novel approach for AIG construction, based on a new synthesis paradigm called functional composition, is introduced. This approach consists in building the final AIG by associating simpler AIGs, in a bottom-up approach. The method controls, during the graphs construction, the characteristics of final and intermediate graphs by applying a cost function as a way to evaluate the quality of those AIGs. The goal is to minimize the number of nodes and the depth of the final AIG. This multi-objective synthesis algorithm has presented interesting features and advantages when compared to traditional approaches. Moreover, this work presents a method for AIGs construction for multiple output functions, which enhances structural sharing, improving the resulting circuit. Results have shown an improvement of around 5% in number of nodes when compared to ABC tool.