Η παρούσα διπλωματική εργασία πραγματεύεται τη μελέτη ενός συστήματος διασύνδεσης μιας ανεμογεννήτριας ονομαστικής ισχύος 1kW με το δίκτυο χαμηλής τάσης. Επιπλέον, πραγματεύεται τη σχεδίαση, κατασκευή και έλεγχο ενός τριφασικού αντιστροφέα που αποτελεί την τελευταία βαθμίδα πριν τη σύνδεση με το δίκτυο χαμηλής τάσης. Η εργασία αυτή εκπονήθηκε στο Εργαστήριο Ηλεκτρομηχανικής Μετατροπής Ενέργειας του Τμήματος Ηλεκτρολόγων Μηχανικών και Τεχνολογίας Υπολογιστών της Πολυτεχνικής Σχολής του Πανεπιστημίου Πατρών. Σκοπός είναι η διασύνδεση της ανεμογεννήτριας με το δίκτυο χαμηλής τάσης μέσω δύο βαθμίδων: ενός μετατροπέα ανύψωσης τάσης και ενός τριφασικού αντιστροφέα. Ο μετατροπέας ανύψωσης τάσης αποτελεί αντικείμενο μελέτης της διπλωματικής εργασίας του συνάδελφου Ιωάννη Γκαρτζώνη, ενώ στην παρούσα διπλωματική εργασία μελετάται και σχεδιάζεται ο τριφασικός αντιστροφέας. Αμφότερες οι διατάξεις περιλαμβάνουν ελέγχους κλειστού βρόχου, μέσω των οποίων απομαστεύεται η μέγιστη ισχύς από την ανεμογεννήτρια (έλεγχος μετατροπέα ανύψωσης) και διατηρείται σταθερή η τάση μεταξύ των δύο βαθμίδων, παρέχοντας ενεργό ισχύ στο δίκτυο υπό μοναδιαίο συντελεστή ισχύος (έλεγχος τριφασικού αντιστροφέα). Αρχικά παρουσιάζονται τα πλεονεκτήματα και μειονεκτήματα της χρήσης ανεμογεννητριών για την παραγωγή ηλεκτρικής ενέργειας και αναλύεται ο τρόπος με τον οποίο η αιολική ενέργεια μετατρέπεται σε ηλεκτρική. Επιπλέον, γίνεται μια σύντομη αναφορά στους τύπους των ανεμογεννητριών, καθώς και στους τρόπους λειτουργίας τους ως προς τη διασύνδεση με το δίκτυο. Στη συνέχεια γίνεται θεωρητική ανάλυση για κάθε βαθμίδα του συνολικού συστήματος. Ιδιαίτερη έμφαση δίνεται στη λειτουργία του τριφασικού αντιστροφέα και στην τεχνική παλμοδότησής του που ονομάζεται Ημιτονοειδής Διαμόρφωση του Εύρους των Παλμών (Sinusoidal Pulse Width Modulation - SPWM). Επίσης, εξάγονται σχέσεις βάσει των οποίων είναι δυνατό να παραμετροποιηθεί ο τριφασικός μετασχηματιστής με μεγάλη επαγωγή μαγνήτισης που έπεται του τριφασικού αντιστροφέα. Το επόμενο βήμα αποτελεί η προσομοίωση στο λογισμικό προσομοίωσης κυκλωμάτων Simulink του Matlab τόσο του τριφασικού αντιστροφέα σε ανοιχτό και σε κλειστό βρόχο, όσο και ολόκληρου του συστήματος διασύνδεσης. Ο κλειστός βρόχος αποτελεί ένα νέο και άμεσο έλεγχο της ισχύος που παρέχεται στο δίκτυο. Επιπρόσθετα, περιγράφεται ο σχεδιασμός και η κατασκευή όλων των κυκλωμάτων που απαιτούνται για τον τριφασικό αντιστροφέα, το φίλτρο και το μετασχηματιστή. Τέλος πραγματοποιούνται πειραματικές δοκιμές για να διαπιστωθεί η ορθή λειτουργία των βαθμίδων που κατασκευάστηκαν, να εντοπιστούν και δικαιολογηθούν τυχόν διαφορές μεταξύ της θεωρητικής ανάλυσης και των μετρήσεων στην πραγματική διάταξη, καθώς και για να εκτιμηθεί η απόδοση του συστήματος. / The present diploma thesis deals with the interconnection of 1kW wind generator to the low voltage grid. A three phase inverter is the last stage of the interconnection system. The design, construction and control of the three phase inverter is studied. This work was developed in the Laboratory of Electromechanical Conversion Energy at the Department of Electrical Engineering and Computer Technology of Polytechnic School in the University of Patras, Greece. The purpose of this thesis is the connection of the wind generator with the low voltage grid through two stages: a boost converter and a three phase inverter. Both stages are closed loop controlled and in this way the maximum power of the wind generator is supplied (control of the boost converter) and the voltage between the two stages remains constant, providing active power to the grid with unity power factor (control of the three phase inverter). Initially, the advantages and disadvantages of the use of wind generator are presented and the way that the wind energy is converted to mechanical energy and finally to electrical energy is analyzed. Moreover, it is given a short reference in the types of the wind generators used for connection to the grid. In addition, every stage of the whole system is analyzed. Especially, the function of the three phase inverter and the Sinusoidal Pulse Width Modulation-sPWM are studied. The three phase transformer, that follows the three phase inverter stage, is parameterized through equations that are described in this work. The next step in this thesis is the simulation with Simulink of Matlab. The three phase inverter is simulated in open and closed loop as well as the whole connection system of the wind generator to the low voltage grid. The closed loop control is a new and direct control of active and reactive power that are supplied to the grid. Furthermore, it is described the design and construction of all the circuits for the three phase inverter, the filter and the transformer. Finally, experiments are conducted in order to confirm the proper function of the stages that are constructed, to find differences between theory and reality and to estimate the efficiency factor of the system.

Orientador: Guido Costa Souza de Araújo / Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-19T00:08:02Z (GMT). No. of bitstreams: 1 Yang_YunJu_M.pdf: 3101962 bytes, checksum: 3711cbf9c4db60e5d2938d566db0d87c (MD5) Previous issue date: 2011 / Resumo: A indústria de semicondutores sempre enfrentou fortes demandas em resolver problema de dissipação de calor e reduzir o consumo de energia em dispositivos. Esta tendência tem sido intensificada nos últimos anos com o movimento de sustentabilidade ambiental. A concepção correta de um sistema eletrônico de baixo consumo de energia é um problema de vários níveis de complexidade e exige estratégias sistemáticas na sua construção. Fora disso, a adoção de qualquer técnica de redução de energia sempre está vinculada com objetivos especiais e provoca alguns impactos no projeto. Apesar dos projetistas conheçam bem os impactos de forma qualitativa, as detalhes quantitativas ainda são incógnitas ou apenas mantidas dentro do 'know-how' das empresas. Neste trabalho, de acordo com resultados experimentais baseado num plataforma de SoC1 industrial, tentamos quantificar os impactos derivados do uso de técnicas de redução de consumo de energia. Nos concentramos em relacionar o fator de redução de energia de cada técnica aos impactos em termo de área, desempenho, esforço de implementação e verificação. Na ausência desse tipo de dados, que relacionam o esforço de engenharia com as metas de consumo de energia, incertezas e atrasos serão frequentes no cronograma de projeto. Esperamos que este tipo de orientações possam ajudar/guiar os arquitetos de projeto em selecionar as técnicas adequadas para reduzir o consumo de energia dentro do alcance de orçamento e cronograma de projeto / Abstract: The semiconductor industry has always faced strong demands to solve the problem of heat dissipation and reduce the power consumption in electronic devices. This trend has been increased in recent years with the action of environmental sustainability. The correct conception of an electronic system for low power consumption is an issue with multiple levels of complexities and requires systematic approaches in its construction. However, the adoption of any technique for reducing the power consumption is always linked with some specific goals and causes some impacts on the project. Although the designers know well that these impacts can affect the design in a quality aspect, the quantitative details are still unkown or just be kept inside the company's know-how. In this work, according to the experimental results based on an industrial SoC2 platform, we try to quantify the impacts of the use of low power techniques. We will relate the power reduction factor of each technique to the impact in terms of area, performance, implementation and verification effort. In the absence of such data, which relates the engineering effort to the goals of power consumption, uncertainties and delays are frequent. We hope that such guidelines can help/guide the project architects in selecting the appropriate techniques to reduce the power consumption within the limit of budget and project schedule / Mestrado / Ciência da Computação / Mestre em Ciência da Computação

L’émergence des circuits complexes numériques, ou System-On-Chip (SOC), pose notamment la problématique de la consommation énergétique. Parmi les blocs fonctionnels significatifs à ce titre, apparaissent les mémoires et en particulier les mémoires statiques (SRAM). La maîtrise de la consommation énergétique d’une mémoire SRAM inclue la capacité à rendre la mémoire fonctionnelle sous très faible tension d’alimentation, avec un objectif agressif de 300 mV (inférieur à la tension de seuil des transistors standard CMOS). Dans ce contexte, les travaux de thèse ont concerné la proposition d’un point mémoire SRAM suffisamment performant sous très faible tension d’alimentation et pour les nœuds technologiques avancés (CMOS bulk 28nm et FDSOI 28nm). Une analyse comparative des architectures proposées dans l’état de l’art a permis d’élaborer deux points mémoire à 10 transistors avec de très faibles impacts de courant de fuite. Outre une segmentation des ports de lecture, les propositions reposent sur l’utilisation de périphéries adaptées synchrones avec notamment une solution nouvelle de réplication, un amplificateur de lecture de données en mode tension et l’utilisation d’une polarisation dynamique arrière du caisson SOI (Body Bias). Des validations expérimentales s’appuient sur des circuits en technologies avancées. Enfin, une mémoire complète de 32kb (1024x32) a été soumise à fabrication en 28 FDSOI. Ce circuit embarque une solution de test (BIST) capable de fonctionner sous 300mV d’alimentation. Après une introduction générale, le 2ème chapitre du manuscrit décrit l’état de l’art. Le chapitre 3 présente les nouveaux points mémoire. Le 4ème chapitre décrit l’amplificateur de lecture avec la solution de réplication. Le chapitre 5 présente l’architecture d’une mémoire ultra basse tension ainsi que le circuit de test embarqué. Les travaux ont donné lieu au dépôt de 4 propositions de brevet, deux conférences internationales, un article de journal international est accepté et un autre vient d’être soumis. / Emergence of large Systems-On-Chip introduces the challenge of power management. Of the various embedded blocks, static random access memories (SRAM) constitute the angrier contributors to power consumption. Scaling down the power supply is one way to act positively on power consumption. One aggressive target is to enable the operation of SRAMs at Ultra-Low-Voltage, i.e. as low as 300 mV (lower than the threshold voltage of standard CMOS transistors). The present work concerned the proposal of SRAM bitcells able to operate at ULV and for advanced technology nodes (either CMOS bulk 28 nm or FDSOI 28 nm). The benchmarking of published architectures as state-of-the-art has led to propose two flavors of 10-transitor bitcells, solving the limitations due to leakage current and parasitic power consumption. Segmented read-ports have been used along with the required synchronous peripheral circuitry including original replica assistance, a dedicated unbalanced sense amplifier for ULV operation and dynamic forward back-biasing of SOI boxes. Experimental test chips are provided in previously mentioned technologies. A complete memory cut of 32 kbits (1024x32) has been designed with an embedded BIST block, able to operate at ULV. After a general introduction, the manuscript proposes the state-of-the-art in chapter two. The new 10T bitcells are presented in chapter 3. The sense amplifier along with the replica assistance is the core of chapter 4. The memory cut in FDSOI 28 nm is detailed in chapter 5. Results of the PhD have been disseminated with 4 patent proposals, 2 papers in international conferences, a first paper accepted in an international journal and a second but only submitted paper in an international journal.

The diploma thesis deals with the issue of the reconstruction of outdoor cables of low voltage distribution network in exchange for the cable line. It analyzes the important factors which are necessary for the preparation of the project documentation for the issue of the territorial consent. The thesis is divided into 4 main chapters. After the first chapter there is introduced chapter 2, which shows the differences between cable and outdoor cables with their advantages and disadvantages. Chapter 3 deals with the guiding principles for low-voltage cable design and the types of equipment needed for the proper operation of a particular distribution network while respecting the requirements of valid PNEs and ČSNs. Chapter 4 explains the chronology of the process leading to the formulation of a basic technical proposal, which is further addressed in Chapter 5, which deals with the complete formulation of the project documentation for the issue of territorial consent.

The dissertation describes several types of low and high voltage distribution networks including their implementation in specified location with regards to the reliability and quality of electric power supply. The distributions networks are classified according to ways of cable routing, distribution line voltage levels as well as according to types of network interconnections. The high and low voltage distribution networks are further categorized based on used cable types, where, more attention is paid to insulated lines used in the Czech Republic, low voltage lines called „AES“ and „PAS“ high voltage lines used more and more during the distribution network reconstruction. Attention is also given to the description of used methodology for the calculation of network performance stability. An individual part of the dissertation is devoted to a low voltage distribution network proposal in the village of Kovalovice. Based on performed analysis of distribution network conditions, several reconstruction versions were proposed with the help of „KASI“ software, the description of which is also included. The proposed versions are further analysed for both, technical and economical aspects and is selected most suitable version of the distribution network.

This diploma thesis is concerned with reconstruction of distribution network in Hruba Vrbka. The diploma thesis is divided in two parts. For better understanding to this issue, the first theoretical part is shortly dedicated to the history of electrical power system, to the several types of distribution network of low voltage and high voltage and their utilization in the area, considering the reliability and the quality of delivery of the electric energy. In this thesis there is mentioned division of distribution grids according to placing of cable lines, according to voltage and according to type of grid connection. Next part of this work is dedicated to the description of overhead lines and cable lines and their characteristics. For the proper concept of the grid we should know some characteristics of the electric line’s proposal: mechanical strength, warming, voltage drop, efficiency, degree of safety and provision of delivery. In the end of the theoretical part there are described methods for calculation of grid’s steady state as a linear task and also non-linear task, elimination of the balancing node, the iterative method, the reduction of external power take-off nodes and the solution of the steady state of the network through the direct current model. The second part of the diploma thesis is concerned with the calculation of the steady state in the village Hruba Vrbka. In this part is also described the KASI program which was used for the calculation of the grid’s steady state. Firstly low voltage grid’s balance in Hruba Vrbka was found out and evaluated and then there were proposed some solutions of the reconstruction for the grid improving. The suggested options of the reconstruction are considered from technical and economical point of view and the best solution is chosen. For this solution there is suggested the protection through program SICHR 9. In the end of this diploma thesis there is checked the load of the high voltage line.

The theme of this thesis is the design and verification of the auxiliary winding to supply the voltage regulator of the synchronous generator. The synchronous generator for which the auxiliary winding proposed is three-phase, low voltage with double layer random wound stator winding. The generator excitation is brushless with auxiliary rotating exciter. The auxiliary winding is designed for placement in the stator teeth, along with the main winding. The sizing of the auxiliary winding is derived from the power requirements the voltage regulator. Draft winding is validated analytical calculation and finite element method (FEM). The auxiliary winding has been implemented in the production of the generator. The Features of the auxiliary winding have been verified by measuring the by electrical testing room and the test results are evaluated.

Aim of the master's thesis is at first to explain appropriate light sources and lighting systems; secondly present suitable light sources selection for lighting a small space and design of an off-grid system. The last part consists of an overview about alternative energy transformations to light energy. The first of these three major themes focuses on the analysis of light sources suitable for use in applications with accumulation together with data on energy efficiency and the utilization efficiency associated with them, concentrating on their consumption and possible energy saving lighting within small applications. It ends with a description and calculations of electricity energy indicators for different types of rooms. The second and main part of the thesis is focusing on suitable light sources selection for off-grid systems and impacts on humans and the environment associated with it. An object representing a small application has been created in RELUX® software with suitable light sources installed in it. For this scene, appropriate parts of off-grid systems were selected, which could be used to power the proposed lighting. The last theme consists of a brief about alternative sources, most of which are still in development or existing only at a theoretical level. All of these alternative sources are having a possible application in the future.

Disertační práce se zabývá zaváděním nových struktur moderních aktivních prvků pracujících v napěťovém, proudovém a smíšeném režimu. Funkčnost a chování těchto prvků byly ověřeny prostřednictvím SPICE simulací. V této práci je zahrnuta řada simulací, které dokazují přesnost a dobré vlastnosti těchto prvků, přičemž velký důraz byl kladen na to, aby tyto prvky byly schopny pracovat při nízkém napájecím napětí, jelikož poptávka po přenosných elektronických zařízeních a implantabilních zdravotnických přístrojích stále roste. Tyto přístroje jsou napájeny bateriemi a k tomu, aby byla prodloužena jejich životnost, trend navrhování analogových obvodů směřuje k stále většímu snižování spotřeby a napájecího napětí. Hlavním přínosem této práce je návrh nových CMOS struktur: CCII (Current Conveyor Second Generation) na základě BD (Bulk Driven), FG (Floating Gate) a QFG (Quasi Floating Gate); DVCC (Differential Voltage Current Conveyor) na základě FG, transkonduktor na základě nové techniky BD_QFG (Bulk Driven_Quasi Floating Gate), CCCDBA (Current Controlled Current Differencing Buffered Amplifier) na základě GD (Gate Driven), VDBA (Voltage Differencing Buffered Amplifier) na základě GD a DBeTA (Differential_Input Buffered and External Transconductance Amplifier) na základě BD. Dále je uvedeno několik zajímavých aplikací užívajících výše jmenované prvky. Získané výsledky simulací odpovídají teoretickým předpokladům.

Disertační práce je zaměřena na výzkum nejběžnějších metod, které se využívají při návrhu analogových obvodů s využití nízkonapěťových (LV) a nízkopříkonových (LP) struktur. Tyto LV LP obvody mohou být vytvořeny díky vyspělým technologiím nebo také využitím pokročilých technik návrhu. Disertační práce se zabývá právě pokročilými technikami návrhu, především pak nekonvenčními. Mezi tyto techniky patří využití prvků s řízeným substrátem (bulk-driven - BD), s plovoucím hradlem (floating-gate - FG), s kvazi plovoucím hradlem (quasi-floating-gate - QFG), s řízeným substrátem s plovoucím hradlem (bulk-driven floating-gate - BD-FG) a s řízeným substrátem s kvazi plovoucím hradlem (quasi-floating-gate - BD-QFG). Práce je také orientována na možné způsoby implementace známých a moderních aktivních prvků pracujících v napěťovém, proudovém nebo mix-módu. Mezi tyto prvky lze začlenit zesilovače typu OTA (operational transconductance amplifier), CCII (second generation current conveyor), FB-CCII (fully-differential second generation current conveyor), FB-DDA (fully-balanced differential difference amplifier), VDTA (voltage differencing transconductance amplifier), CC-CDBA (current-controlled current differencing buffered amplifier) a CFOA (current feedback operational amplifier). Za účelem potvrzení funkčnosti a chování výše zmíněných struktur a prvků byly vytvořeny příklady aplikací, které simulují usměrňovací a induktanční vlastnosti diody, dále pak filtry dolní propusti, pásmové propusti a také univerzální filtry. Všechny aktivní prvky a příklady aplikací byly ověřeny pomocí PSpice simulací s využitím parametrů technologie 0,18 m TSMC CMOS. Pro ilustraci přesného a účinného chování struktur je v disertační práci zahrnuto velké množství simulačních výsledků.