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Improved Model for Excess Base Current in Irradiated Lateral PNP Bipolar Junction TransistorsJanuary 2017 (has links)
abstract: A modeling platform for predicting total ionizing dose (TID) and dose rate response of commercial commercial-off-the-shelf (COTS) linear bipolar circuits and technologies is introduced. Tasks associated with the modeling platform involve the development of model to predict the excess current response in a bipolar transistor given inputs of interface (NIT) and oxide defects (NOT) which are caused by ionizing radiation exposure. Existing models that attempt to predict this excess base current response are derived and discussed in detail. An improved model is proposed which modifies the existing model and incorporates the impact of charged interface trap defects on radiation-induced excess base current. The improved accuracy of the new model in predicting excess base current response in lateral PNP (LPNP) is then verified with Technology Computer Aided Design (TCAD) simulations. Finally, experimental data and compared with the improved and existing model calculations. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2017
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An accurate, trimless, high PSRR, low-voltage, CMOS bandgap reference ICGupta, Vishal 05 July 2007 (has links)
Bandgap reference circuits are used in a host of analog, digital, and mixed-signal systems to establish an accurate voltage standard for the entire IC. The accuracy of the bandgap reference voltage under steady-state (dc) and transient (ac) conditions is critical to obtain high system performance. In this work, the impact of process, power-supply, load, and temperature variations and package stresses on the dc and ac accuracy of bandgap reference circuits has been analyzed. Based on this analysis, the a bandgap reference that
1. has high dc accuracy despite process and temperature variations and package stresses, without resorting to expensive trimming or noisy switching schemes,
2. has high dc and ac accuracy despite power-supply variations, without using large off-chip capacitors that increase bill-of-material costs,
3. has high dc and ac accuracy despite load variations, without resorting to error-inducing buffers,
4. is capable of producing a sub-bandgap reference voltage with a low power-supply, to enable it to operate in modern, battery-operated portable applications,
5. utilizes a standard CMOS process, to lower manufacturing costs, and
6. is integrated, to consume less board space
has been proposed.
The functionality of critical components of the system has been verified through prototypes after which the performance of the complete system has been evaluated by integrating all the individual components on an IC.
The proposed CMOS bandgap reference can withstand 5mA of load variations while generating a reference voltage of 890mV that is accurate with respect to temperature to the first order. It exhibits a trimless, dc 3-sigma accuracy performance of 0.84% over a temperature range of -40°C to 125°C and has a worst case ac power-supply ripple rejection (PSRR) performance of 30dB up to 50MHz using 60pF of on-chip capacitance. All the proposed techniques lead to the development of a CMOS bandgap reference that meets the low-cost, high-accuracy demands of state-of-the-art System-on-Chip environments.
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