As the application of the consuming electronic products being used extensively, more and more functions can be worked on the same chip. Different function blocks may need different supply voltage. Considering of power consumption, circuit operated at low voltage and low current can achieve power reduction. Due to the energy crisis nowadays, plenty of products begin to focus on the green power. The main advantage of green power is saving power, which will not affect the efficiency. In addition, while the CMOS technology process evolves all the time, the stability of the operation voltage needs to be reduced by the advancement. Thus, the power management in a 3D graphic chip application is going to be introduced in this thesis. Utilizing the linear regulator to reduce the DC to 1.2, 1.1, 1.0, 0.9 and 0.8 V from 3.3V, and support a stable voltage for core circuits and I/O circuits. With the emphasis on the circuit efficiency is affected by power management, the level shifter to embed normal useful digital logic is also investigated. When using in the logic gates, it can reduce power consumption simultaneously. Therefore, it is important to adopt power IC in the future.

This project explores the rapidly expanding area of AC direct drive for LED lighting. AC LED driving does not use typical DC-DC converter-based driving but uses semiconductor switches and a linear regulator to activate a number of LEDs proportional to the input voltage at any given time. This allows bulky, expensive magnetics to be eliminated from the system. The goal of this project was to design a scaled-down physical AC LED direct drive system to validate the conclusions of methods for improving efficiency from a previous investigation that found minimizing voltage across the linear regulating MOSFET led to higher efficiency at the cost of increased input current THD. This project found that this conclusion is physically realizable, with a final efficiency of 94.46% and an input current THD of 58.9%. This result was achieved by taking the previous investigation’s final design as a starting point and replacing ideal switches and control signals with discrete components. The final version uses a set of comparators and sense resistors to determine when a given LED stack should be on for a simple, analog control solution. Once the system was simulated this way, the assembled version was used to measure efficiency, power factor, current THD, flicker index, and DC supply power. Additional plots of the stack voltages and control signals were collected to verify proper operation and compare to simulation. The final measurements aligned with trends from simulation and result in a simple AC direct drive solution that requires no specialty ICs.

This work contains topology and circuit design of a linear voltage regulator with respect to suppression of disturbances coming from supplied circuit into the input of the regulator. The converter is designed for integration in automotive sensor applications.

DC-DC converters can be separated into two main groups: switching converters and linear regulators. Linear regulators such as Low Dropout Regulators (LDOs) are straightforward to implement and have a very stable output with low voltage ripple. However, the efficiency of an LDO can fluctuate greatly, as the power dissipation is a function of the device’s input and output. On the other hand, a switching regulator uses a switch to regulate energy levels. These types of regulators are more versatile when a larger change of voltage is needed, as efficiency is relatively stable across larger steps of voltages. However, switching regulators tend to have a larger output voltage ripple, which can be an issue for sensitive systems. An approach to utilize both in cascaded configuration while providing a negative output voltage will be presented in this paper. The proposed two-stage conversion system consists of a switching pre-regulator that can track the negative output voltage of the second stage (LDO) such that the difference between input and output voltages is always kept small under varying output voltage while maintaining the high overall conversion efficiency. Computer simulation and hardware results demonstrate that the proposed system can track the negative output voltage well. Additionally, the results show that the proposed system can provide and maintain good overall efficiency, load regulation, and output voltage ripple across a wide range of outputs.

This thesis presents the design, simulation, and hardware implementation of a proposed method for improving efficiency of voltage regulator. Typically, voltage regulator used for noise-sensitive and low-power applications involves the use of a linear regulator due to its high power-supply rejection ratio properties. However, the efficiency of a linear regulator depends heavily on the difference between its input voltage and output voltage. A larger voltage difference across the linear regulator results in higher losses. Therefore, reducing the voltage difference is the key in increasing regulator’s efficiency. In this thesis, a pre switching regulator stage with positive voltage tracking cascaded to a linear regulator is proposed to provide an input voltage to a linear regulator that is slightly above the output of the linear regulator. The tracking capability is needed to provide the flexibility in having different positive output voltage levels while maintaining high overall regulator’s efficiency. Results from simulation and hardware implementation of the proposed system showed efficiency improvement of up to 23% in cases where an adjustable output voltage is necessary. Load regulation performance of the proposed method was also overall better compared to the case without the output voltage tracking method.

Power management components can be found in a host of different applications ranging from portable hand held gadgets to modern avionics to advanced medical instrumentations, among many other applications. Low-dropout (LDO) linear regulators are particularly popular owing to their: ease of use, low cost, high accuracy, low noise, and high bandwidth. With all its glory, however, it tends to underperform switched-mode power supplies (SMPS) when with comes to power conversion efficiency, although the later generates a lot of ripple at its output. With the growing need to improve system efficiency (hence longer battery life) without degrading system performance, many high end (noise sensitive) applications such as data converters, RF transceivers, precision signal conditioning, among others, use high efficiency SMPS with LDO regulators as post-regulators for rejecting the ripple generated by SMPS. This attribute of LDO regulators is known as power supply rejection (PSR). With the trend towards increasing switching frequency for SMPS, to minimize PC board real estate, it is becoming ever more difficult for LDO regulators to suppress the associate high frequency ripple since at such high frequencies, different parasitic components of the LDO regulator start to deteriorate its PSR performance. There have been a handful of different techniques suggested in the literature that can be used to achieve good PSR performance at higher frequencies. However, each of these techniques suffers from a number of drawbacks ranging from reduced efficiency to increased cost to increased solution size, and with the growing demand for higher efficiency and smaller power supplies, these techniques have their clear limitations. The objective of this research project is to develop a novel current-mode LDO regulator that can achieve good high frequency PSR performance without suffering from the afore mentioned drawbacks. The proposed architecture was fabricated using a proprietary 1.5 um Bipolar process technology, and the measurement results show a PSR improvement of 20dB (at high frequencies) over conventional regulators. Moreover, the proposed LDO regulator requires a small 15nF output capacitor for stability, which is far smaller than some of the currently used techniques.

Ce travail concerne l’étude, le dimensionnement et la réalisation d’un convertisseur continu-continu, associé à une source de type pile à combustible. Pour l’application envisagée, ce convertisseur a un rapport de transformation élevé voisin de 12. De plus l’ondulation de courant est limitée à 1% du courant moyen maximal. La mise en cascade de deux convertisseurs a été retenue pour obtenir un rapport de transformation élevé. Le premier étage est un Boost entrelacé associé à un filtre d’entrée de type L-C, qui permettent de réduire fortement l’ondulation du courant de source. Le second étage est un Boost à trois niveaux qui permet de diminuer les contraintes en tension sur les interrupteurs, et de réduire ainsi les pertes du convertisseur. La commande du convertisseur est ensuite définie en se basant sur l’utilisation d’un régulateur non linéaire. La gestion globale du système est effectuée par la régulation de la tension intermédiaire et de la puissance transitée à la charge en utilisant les principes des commandes « plates ». Enfin un banc de tests à puissance réduite (3 kW) a été réalisé, afin de valider le fonctionnement du convertisseur et les régulations proposées / This work deals with the study, design and building of a DC-DC converter, which is associated with a fuel cell source. According to the application, this converter should have a high voltage ratio which is about 12, and it is able to limit the ripple current of source below 1% of the maximum average current. A cascaded structure composed by two converters has been chosen and allows obtaining a high voltage ratio. The first stage is an interleaved Boost associated with a L-C input filter, to reduce ripple of the current delivered by the source. The second stage is a three-level Boost which reduces the voltage stress of the switches, thereby reducing losses of the converter. The control of the converter is defined basing on the use of a non-linear regulator. Thanks to use the flatness control, the global control is realized through the regulation of the intermediate voltage and of the power transited to the load. Finally, a small power test converter (3 kW) has been realized, in order to validate the converter operation and the proposed control

Quelles sont les particules élémentaires et comment l'univers proviennent sont les principales forces motrices de la physique des hautes énergies. Afin de démontrer le modèle standard et découvrez la nouvelle physique, plusieurs détecteurs sont construits pour les expériences en physique des hautes énergies. Capteurs à pixels CMOS offrent un compromis attirant entre la vitesse de lecture, le budget matériel, la tolérance au rayonnement, la consommation d'énergie et la granularité, par rapport aux capteurs à pixels hybrides et des dispositifs à transfert de charge. Ainsi, les CPS sont un bon choix pour détecter les particules chargées dans les détecteurs de vertex et des télescopes de faisceau. La distribution de puissance devient un enjeu important dans les détecteurs à venir, puisque une quantité considérable de capteurs seront installés. Malheureusement, le «Independent Powering» échoue, comme l'approche traditionnelle. Afin de résoudre les problèmes de distribution de puissance et de fournir des tensions silencieuses, cette thèse se concentre sur la conception de la gestion de l'alimentation à faible bruit, à basse consommation d'énergie, de petite taille et sur-puce pleinement pour les CPS. Les CPS sont d'abord introduits en tirer les exigences de conception de la gestion de l'alimentation. La distribution de puissance dédiées à les CPS est ensuite proposé, dans laquelle la gestion de l'alimentation est utilisée comme seconde étape de conversion de puissance. Deux régulateurs sur-puce pleinement sont proposés pour générer la tension d'alimentation analogique et de la tension d'alimentation de référence requis par l'opération d'échantillonnage double corrélé, respectivement. Deux prototypes ont vérifié ces régulateurs. Ils peuvent répondre aux exigences des CPS. En outre, les techniques de gestion de l'alimentation et de la conception tolérance au rayonnement sont également présentés dans cette thèse. / What are the elementary particles and how did the universe originate are the main driving forces in the high energy physics. In order to further demonstrate the standard model and discover new physics, several detectors are built for the high energy physics experiments. CMOS pixel sensors (CPS) can achieve an attractive tradeoff among many performance parameters, such as readout speed, granularity, material budget, power dissipation, radiation tolerance and integrating readout circuitry on the same substrate, compared with the hybrid pixel sensors and charge coupled devices. Thus, the CPS is a good candidate for tracking the charged particles in vertex detectors and beam telescopes.The power distribution becomes an important issue in the future detectors, since a considerable amount of sensors will be installed. Unfortunately, the independent powering has been proved to fail. In order to solve the power distribution challenges and to provide noiseless voltages, this thesis focuses on the design of a low noise, limited area, low power consumption and full on-chip power management in CPS chips. The CPS are firstly introduced drawing the design requirements of the power management. The power distribution dedicated to CPS chips is then proposed, in which the power management is utilized as the second power conversion stage. Two full on-chip regulators are proposed to generate the analog power supply voltage and the reference voltage required by correlated double sampling operation, respectively. Two prototypes have verified these regulators. They can meet the requirements of CPS. Moreover, the power management techniques and the radiation tolerance design are also presented in this thesis.

What are the elementary particles and how did the universe originate are the main driving forces in the high energy physics. In order to further demonstrate the standard model and discover new physics, several detectors are built for the high energy physics experiments. CMOS pixel sensors (CPS) can achieve an attractive tradeoff among many performance parameters, such as readout speed, granularity, material budget, power dissipation, radiation tolerance and integrating readout circuitry on the same substrate, compared with the hybrid pixel sensors and charge coupled devices. Thus, the CPS is a good candidate for tracking the charged particles in vertex detectors and beam telescopes.The power distribution becomes an important issue in the future detectors, since a considerable amount of sensors will be installed. Unfortunately, the independent powering has been proved to fail. In order to solve the power distribution challenges and to provide noiseless voltages, this thesis focuses on the design of a low noise, limited area, low power consumption and full on-chip power management in CPS chips. The CPS are firstly introduced drawing the design requirements of the power management. The power distribution dedicated to CPS chips is then proposed, in which the power management is utilized as the second power conversion stage. Two full on-chip regulators are proposed to generate the analog power supply voltage and the reference voltage required by correlated double sampling operation, respectively. Two prototypes have verified these regulators. They can meet the requirements of CPS. Moreover, the power management techniques and the radiation tolerance design are also presented in this thesis.

The subject of this thesis is a design of a precision dual channel laboratory power supply with output voltage range from 0 to 30 V and adjustable current limit up to 1 A. The proposed solution is based on linear regulators and input voltage switching system to minimize power dissipation. Galvanically isolated channels of the power supply share the same microcontroller that processes the user inputs. Microcontroller code allows the calibration of the device or it’s communication with computer. The cover of the device is designed with good cooling performance and 3D printing manufacturing method in mind. The properties of the designed laboratory power supply are verified by the final test measurements.