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LOVERD--a logic design verification and diagnosis system via test generationZhou, Jing, 1959- January 1989 (has links)
The development of cost-effective circuits is primarily a matter of economy. To achieve it, design errors and circuit flaws must be eliminated during the design process. To this end, considerable effort must be put into all phases of the design cycle. Effective CAD tools are essential for the production of high-performance digital systems. This thesis describes a CAD tool called LOVERD, which consists of ATPG, fault simulation, design verification and diagnosis. It uses test patterns, developed to detect single stuck-at faults in the gate-level implementation, to compare the results of the functional level description and its gate-level implementation. Whenever an error is detected, the logic diagnosis tool can be used to provide useful information to designers. It is shown that certain types of design errors in combinational logic circuits can be detected and allocated by LOVERD efficiently.
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Test vector generation and compaction for easily testable PLAsDraier, Benny. January 1988 (has links)
No description available.
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Peptidal processor enhanced with programmable translation and integrated dynamic acceleration logic /Yourst, Matt T. January 2005 (has links)
Thesis (M.S.)--State University of New York at Binghamton, Department of Computer Science, Thomas J. Watson School of Engineering and Applied Science, 2005. / "This dissertation is a compound document (contains both a paper copy and a CD as part of the dissertation)"--ProQuest abstract document view. Includes bibliographical references.
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Design and optimization of MOS current-mode logic circuits using mathematical programming /Khabiri, Shahnam, January 1900 (has links)
Thesis (M. App. Sc.)--Carleton University, 2004. / Includes bibliographical references (p. 77-78). Also available in electronic format on the Internet.
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From mathematical constructivity to computer science Alan Turing, John von Neumann, and the origins of computer science in mathematical logic /Aspray, William F., January 1900 (has links)
Thesis (Ph. D.)--University of Wisconsin--Madison, 1980. / Typescript. Vita. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaves 409-443).
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Circuit design rules for mixed static and dynamics CMOS logic circuits.Ramirez Ortiz, Rolando, Carleton University. Dissertation. Engineering, Electronics. January 1999 (has links)
Thesis (Ph. D.)--Carleton University, 1999. / Also available in electronic format on the Internet.
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Efficient and accurate gate sizing with piecewise convex delay models /Tennakoon, Hiran Kasturiratne. January 2005 (has links)
Thesis (Ph. D.)--University of Washington, 2005. / Vita. Includes bibliographical references (leaves 59-60).
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An Improved Mixture of Experts Approach for Model Partitioning in VLSI-Design Using Genetic AlgorithmsHering, Klaus, Haupt, Reiner, Villmann, Thomas 11 July 2019 (has links)
The partitioning of complex processor models on the gate and register-transfer level
for parallel functional simulation based on the clock-cycle algorithm is considered. We
introduce a hierarchical partitioning scheme combining various partitioning algorithms
in the frame of a competing strategy. Melting together the di®erent partitioning results
within one level using superpositions we crossover to a mixture of experts one. This
approach is improved applying genetic algorithms. We present two new partitioning
algorithms (experts), the Backward-Cone-Concentration algorithm (n-BCC) and the
Minimum-Overlap Cone-Cluster algorithm (MOCC), both of them taking cones as
fundamental units for building partitions.
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Test vector generation and compaction for easily testable PLAsDraier, Benny. January 1988 (has links)
No description available.
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Teaching Fundamentals of Digital Logic Design and VLSI Design Using Computational TextilesInampudi, Sivateja 08 1900 (has links)
This thesis presents teaching fundamentals of digital logic design and VLSI design for freshmen and even for high school students using e-textiles. This easily grabs attention of students as it is creative and interesting. Using e-textiles to project these concepts would be easily understood by students at young age. This involves stitching electronic circuits on a fabric using basic components like LEDs, push buttons and so on. The functioning of these circuits is programmed in Lilypad Arduino. By using this method, students get exposed to basic electronic concepts at early stage which eventually develops interest towards engineering field.
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