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Modelovanje, simulacija i merenje snage gubitaka u feritnim jezgrima u frekvencijskom opsegu do 1 GHz / Modeling, simulation and measurement of ferrite core loss in frequency range up to 1GHzMilutinov Miodrag 23 February 2017 (has links)
<p>U radu je predložena modifikovana vatmetarska metoda za merenje snage gubitaka u toroidnim feritnim jezgrima koja je prilagođena osciloskopima male ulazne impedanse. Metoda je verifikovana na komercijalnim uzorcima od Mn-Zn i Ni-Zn feritnih materijala. Metoda je upotrebljena za merenje kompleksne permeabilnosti i gustine snage gubitaka dodatno obrađenih komercijalnih Mn-Zn feritnih prahova. Utvrđeno je da se dodatnim tehnološkim procesima (mlevenjem i prosejavanjem) početnog komercijanog praha mogu napraviti feritna jezgra manje gustine snage gubitaka i veće permeabilnosti.</p> / <p>The thesis proposes a modified Watt-meter method for measuring core loss of ferrite cores, which is adjusted to oscilloscopes with the small input impedance. The method is verified on comercial Mn-Zn and Ni-Zn ring cores. The method is used to measure the influence of starting powder sieving and milling on the core loss density and permeability of Mn-Zn ferrite. The experimental results and calculations show the significance of the additional milling and sieving process on magnetic properties of Mn-Zn ferrite in the frequency range from 0.1MHz to 10MHz. These processes increase the relative permeability about 3 times and decrease the core loss 4 times by milling of the starting powder.</p>
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The Use of Scorecards to Improve Documentation of Obstetrical Blood LossSteinberg, Marilyn Cejka 01 January 2018 (has links)
Obstetric hemorrhage is one of the most common causes of maternal morbidity and mortality. The measurement of quantitative blood loss (QBL) at delivery prevents clinicians from failing to recognize hemorrhage in healthy obstetric patients who initially compensate for excessive blood loss. The purpose of this project was to improve the compliance of labor and delivery nurses in a community hospital with consistent QBL measurement. Key theories that formed the basis for the project were Lewin's theory of planned change and homeostasis. The project question addressed was: Is the use of weekly scorecards to provide feedback to nurses with both blinded individual data and aggregate unit data associated with an increase in the percent of patients with blood loss at delivery documented as a QBL measurement over a 12-week period of time? A blinded scorecard of the percent of deliveries attended by each nurse that had QBL documented and an aggregate run chart of the percent of all deliveries with QBL documented were posted in the unit weekly. The postings included discussions of means to enhance facilitators of and decrease barriers to QBL measurement. Over 12 weeks, the percent of deliveries with QBL documented increased from 22.7% to 80.0%. This result is consistent with previous reports that clear and objective feedback from scorecards is associated with improvement in performance. Scorecard feedback may be explored to determine if it is associated with improvement of other nursing practices. This project has implications for positive social change as it may contribute to a reduction in preventable maternal deaths. Decreasing maternal morbidity and mortality supports the health of women in a population and influences the health of the next generation.
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Path loss evaluation for mobile-to-mobile wireless channelZhu, Shaozhen (Sharon), Ghazaany, Tahereh S., Jones, Steven M.R., Abd-Alhameed, Raed, Noras, James M., Van Buren, T., Merrell, A. 06 1900 (has links)
No / Narrowband path loss measurements are reported for the vehicle-to-vehicle channel between a transmitting antenna 50 cm above the ground and a car-roof-mounted receiver array. Calibration procedures and measurement results are reported for typical urban, suburban and rural-motorway environments and compared with existing mobile channel models to give insight into the large-scale fading behavior in the vehicle-to-vehicle channel.
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Very High Frequency Integrated POL for CPUsHou, Dongbin 10 May 2017 (has links)
Point-of-load (POL) converters are used extensively in IT products. Every piece of the integrated circuit (IC) is powered by a point-of-load (POL) converter, where the proximity of the power supply to the load is very critical in terms of transient performance and efficiency. A compact POL converter with high power density is desired because of current trends toward reducing the size and increasing functionalities of all forms of IT products and portable electronics. To improve the power density, a 3D integrated POL module has been successfully demonstrated at the Center for Power Electronic Systems (CPES) at Virginia Tech. While some challenges still need to be addressed, this research begins by improving the 3D integrated POL module with a reduced DCR for higher efficiency, the vertical module design for a smaller footprint occupation, and the hybrid core structure for non-linear inductance control.
Moreover, as an important category of the POL converter, the voltage regulator (VR) serves an important role in powering processors in today's electronics. The multi-core processors are widely used in almost all kinds of CPUs, ranging from the big servers in data centers to the small smartphones in almost everyone's pocket. When powering multiple processor cores, the energy consumption can be reduced dramatically if the supply voltage can be modulated rapidly based on the power demand of each core by dynamic voltage and frequency scaling (DVFS). However, traditional discrete voltage regulators (VRs) are not able to realize the full potential of DVFS since they are not able to modulate the supply voltage fast enough due to their relatively low switching frequency and the high parasitic interconnect impedance between the VRs and the processors. With these discrete VRs, DVFS has only been applied at a coarse timescale, which can scale voltage levels only in tens of microseconds (which is normally called a coarse-grained DVFS). In order to get the full benefit of DVFS, a concept of an integrated voltage regulator (IVR) is proposed to allow fine-grained DVFS to scale voltage levels in less than a microsecond. Significant interest from both academia and industry has been drawn to IVR research.
Recently, Intel has implemented two generations of very high frequency IVR. The first generation is implemented in Haswell processors, where air core inductors are integrated in the processor's packaging substrate and placed very closely to the processor die. The air core inductors have very limited ability in confining the high frequency magnetic flux noise generated by the very high switching frequency of 140MHz. In the second generation IVR in Broadwell processors, the inductors are moved away from the processor substrate to the 3DL PCB modules in the motherboard level under the die.
Besides computers, small portable electronics such as smartphones are another application that can be greatly helped by IVRs. The smartphone market size is now larger than 400 billion US dollars, and its power consumption is becoming higher and higher as the functionality of smartphones continuously advances. Today's multi-phase VR for smartphone processors is built with a power management integrated circuit (PMIC) with discrete inductors. Today's smartphone VRs operate at 2-8MHz, but the discrete inductor is still bulky, and the VR is not close enough to the processor to support fine-grained DVFS. If the IVR solution can be extended to the smartphone platform, not only can the battery life be greatly improved, but the total power consumption of the smartphone (and associated charging time and charging safety issues) can also be significantly reduced. Intel's IVR may be a viable solution for computing applications, but the air core inductor with un-confined high-frequency magnetic flux would cause very severe problems for smartphones, which have even less of a space budget. This work proposes a three-dimensional (3D) integrated voltage regulator (IVR) structure for smartphone platforms. The proposed 3D IVR will operate with a frequency of tens of MHz. Instead of using an air core, a high-frequency magnetic core without an air gap is applied to confine the very high frequency flux. The inductor is designed with an ultra-low profile and a small footprint to fit the stringent space requirement of smartphones.
A major challenge in the development of the very high frequency IVR inductor is to accurately characterize and compare magnetic materials in the tens of MHz frequency range. Despite the many existing works in this area, the reported measured properties of the magnetics are still very limited and indirect. In regards to permeability, although its value at different frequencies is often reported, its saturation property in real DC-biased working conditions still lacks investigation. In terms of loss property, the previous works usually show the equivalent resistance value only, which is usually measured with small-signal excitation from an impedance/network analyzer and is not able to represent the real magnetic core loss under large-signal excitation in working conditions. The lack of magnetic properties in real working conditions in previous works is due to the significant challenges in the magnetic characterization technique at very high frequencies, and it is a major obstacle to accurately designing and testing the IVR inductors. In this research, an advanced core loss measurement method is proposed for very high frequency (tens of MHz) magnetic characterization for the IVR inductor design. The issues of and solutions for the permeability and loss measurement are demonstrated. The LTCC and NEC flake materials are characterized and compared up to 40MHz for IVR application.
Based on the characterized material properties, both single-phase and multi-phase integrated inductor are designed, fabricated and experimentally tested in 20MHz buck converters, featuring a simple single-via winding structure, small size, ultra-low profile, ultra-low DCR, high current-handling ability, air-gap-free magnetics, multi-phase integration within one magnetic core, and lateral non-uniform flux distribution. It is found that the magnetic core operates at unusually high core loss density, while it is thermally manageable. The PCB copper can effectively dissipate inductor heat with 3D integration. In addition, new GaN device drivers and magnetic materials are evaluated and demonstrated with the ability to increase the IVR frequency to 30MHz and realize a higher density with a smaller loss.
In summary, this research starts with improving the 3D integrated POL module, and then explores the use of the 3D integration technique along with the very high frequency IVR concept to power the smartphone processor. The challenges in a very high frequency magnetic characterization are addressed with a novel core loss measurement method capable of 40MHz loss characterization. The very high frequency multi-phase inductor integrated within one magnetic component is designed and demonstrated for the first time. A 20MHz IVR platform is built and the feasibility of the concept is experimentally verified. Finally, new GaN device drivers and magnetic materials are evaluated and demonstrated with the ability to increase the IVR frequency to 30MHz and realize higher density with smaller loss. / Ph. D.
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Alternative structures for integrated electromagnetic passivesLiu, Wenduo 08 May 2006 (has links)
The demand for high power density keeps driving the development of electromagnetic integration technologies in the field of power electronics. Based on planar homogeneous integrated structures, the mechanism of the electromagnetic integration of passives has been investigated with distributed-parameter models. High order modeling of integrated passives has been developed to investigate the electromagnetic performance. The design algorithm combining electromagnetic design and loss models has been developed to optimize and evaluate the spiral winding structure. High power density of 480 W/in3 has been obtained on the prototype.
Due to the structural limitation, the currently applied planar spiral winding structure does not sufficiently utilize the space, and the structure is mechanically vulnerable. The improvement on structures is necessary for further application of integrated passives. The goal of this research is to investigate and evaluate alternative structures for high-power-density integrated passives. The research covers electromagnetic modeling, constructional study, design algorithm, loss modeling, thermal management and implementation technology
The symmetric single layer structure and the stacked structure are proposed to overcome the disadvantages of the currently applied planar spiral winding structure. Because of the potential of high power density and low power loss, the stacked structure is selected for further research. The structural characteristics and the processing technologies are addressed.
By taking an integrated LLCT module as the study case, the general design algorithm is developed to find out a set of feasible designs. The obtained design maps are used to evaluate the constraints from spatial, materials and processing technologies for the stacked structure.
Based on the assumption of one-dimensional magnetic filed on the cross-section and linear current distribution along the longitudinal direction of the stacked structure, the electromagnetic field distribution is analyzed and the loss modeling is made. The experimental method is proposed to measure the loss and to verify the calculation.
The power loss in the module leads to thermal issues, which limit the processed power of power electronics modules and thus limit the power density. To further improve the power handling ability of the module, the thermal management is made based on loss estimation. The heat extraction technology is developed to improve the heat removal ability and further improve the power density of integrated passives.
The experimental results verify the power density improvement from the proposed stacked structure and the applied heat extraction technology. The power density of 1147 W/in3 (70 W/cm3) is achieved in the implemented LLCT module with the efficiency of 97.8% at output power of 1008W. / Ph. D.
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