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Družicový přijímač s integrovaným anténním tunerem / Satellite Receiver with Integrated Antenna TunerMatoušek, Martin January 2018 (has links)
This work is focused on proposal of receiver with Integrated Antenna Tuner operating at 28 MHz. The design was primarily focused on simplicity and low power consumption. The receiver is adapted for SSB modulation. This work was realized for the transmission of audio signals. SSB modulation is far more efficient in terms of the radio spectrum used. First part of this thesis describes about the Antenna Tuner and block diagram of a receiver. Next parts are focused on proposal of individual blocks of the receiver, especially its most important parts. Finally, the overall evaluations of the design characteristics of SSB receivers with Integrated Antenna Tuner are discussed.
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Anténa a LNA pro vícepásmový přijímač GNSS / Antenna a LNA for multiband GNSS receiverOndráš, Michal January 2019 (has links)
This project describesa microwave antenna for GNSS and low noise amplifier. Mikrostrip antenna is a modern type of antenna. This mikrostrip antenna is Dual – band antenna with circual polarization. The thesis describes how to make anantenna, what a circular polarization is, whata patch antenna is and what GNSS is. Low noise amplifier amplifies the antenna output signal.
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Návrh nízkošumové Band Gap reference v BCD procesu / Design of low noise Band Gap reference in BCD processKadaňka, Petr January 2013 (has links)
This diploma thesis focuses on noise analysis of different integrated circuits used for generating temperature stable reference voltage. All noise contributions are studied separately and there is shown a way of their minimization. Circuit using external capacitor with pre-charging system is chosen as the best solution. Output noise of all analyzed circuits is compared and characteristics of final band-gap reference are summarized at the end of the work.
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Předzesilovač pro MEMS mikrofon / Pre-Amplifier for MEMS MicrophoneRyšavý, Jindřich January 2016 (has links)
Thesis discusses the possibility of using MEMS microphones in measuring systems. Describes the characteristics of MEMS components and shows possible realization of analog to digital signal convertor when a microphone with analog output is used. Design of the amplifier is made with respect to low noise and low power consumption. Also is shown the possibility of using antialliasing filter as microphone frequency response correction at the same time.
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Nízkošumové zesilovače pro pásmo 1-3 GHz / Low Noise Amplifiers for frequency range 1-3 GHzKlegová, Hana January 2017 (has links)
This masters thesis deals with low noise amplifier design for frequency range 1 GHz - 3 GHz. There is a short theoretical introduction in the first part of the thesis. There are described parameters and properties of transistors and general two-ports. Description of the noise characteristics two-ports follows. The next capture contains design of two-stage amplifiers. One of them is with a microstrip filter between stages and the second one is with combline filter on input of the amplifier. The amplifiers and the microstrip filter were designed in program ANSOFT Designer. The design of combline filter was realised in program CST Microwave Studio. Both amplifiers ware made and their properties ware compared with simulations.
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A Fast Switchable and Band-Tunable 5-7.5GHz LNA in 45nm CMOS SOI Technology for Multi-Standard Wake-up RadiosMa, Rui, Kreißig, Martin, Ellinger, Frank 20 August 2019 (has links)
This work presents design and full implementation of a fast switchable and band-tunable 5 - 7.5 GHz low noise amplifier (LNA) in a 45nm CMOS SOI technology. The target application are wake-up receivers that employ aggressive duty cycling. Based on a cascode topology, the LNA utilizes a transformer for its 50 input matching as well as a balun with a capacitor bank to realize 8 digitally selectable bands. According to measurement results, the fabricated LNA exhibits a voltage gain of 18 - 21 dB while drawing a current of merely 2.2mA from a 1V supply. At all the 8 bands from 5 to 7.5 GHz, the input reflection coefficient lies below -8 dB, and the noise figure ranges from 7.8 to 6.2 dB. The LNA is able to settle in less than 9.5 ns
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Développement d’un circuit de lecture pour un calorimètre électromagnétique ultra-granulaire / Design of a read-out chip for a high granularity electromagnetic calorimeterCizel, Jean-Baptiste 09 December 2016 (has links)
Le travail réalisé lors de cette thèse s’inscrit dans le projet de création d’un calorimètre électromagnétique pour le futur International Linear Collider (ILC) au sein de la collaboration CALICE. Le calorimètre est dit ultra-granulaire du fait du grand nombre de pixels de détection : environ 82 millions dans le calorimètre final complet. C’est ce nombre élevé de détecteurs à lire qui a conduit au développement de circuits intégrés dédiés à cette tâche, l’usage d’électronique classique n’étant pas possible dans ce cas du fait de contraintes dimensionnelles. Les travaux démarrent par l’étude de la puce SKIROC2, développée par le laboratoire Omega, qui est l’état de l’art de l’ASIC de lecture pour ce projet. Les performances sur carte de test et dans l’environnement du détecteur ont été mesurées, ce qui a permis de tirer certaines conclusions sur les forces et les faiblesses de SKIROC2. Après cette étude, le travail a été le développement d’un nouvel ASIC de lecture se basant sur SKIROC2. L’objectif étant de préserver les forces de SKIROC2 tout en tentant d’en corriger les faiblesses. Le nouvel ASIC a été conçu dans une technologie tout juste disponible au moment de la conception. Il a donc tout fallu redessiner en repartant de zéro. Il s’agit en cela de building blocks plus que d’un véritable ASIC de lecture. Trois structures de préamplificateurs de charge ont été testées, l’architecture générale et le fonctionnement d’un canal de lecture étant largement inspirés de SKIROC2. / This work takes place in the design project of the electromagnetic calorimeter for the future International Linear Collider (ILC) within the CALICE collaboration. The final calorimeter will be made of 82 million of PIN diodes; this is where the term “high granularity” comes from. The need for a read-out ASIC is a consequence of this high number of detectors, knowing that the dimensions of the electromagnetic calorimeter are a big constraint: the standard electronics is not an option. This work starts from an existing ASIC called SKIROC2. This state-of-the-art read-out chip has been designed by the Omega laboratory, a member of the CALICE collaboration. The performances on testboard and in the detector environment have been measured. It allowed to conclude on the advantages and drawbacks of using SKIROC2 in the calorimeter. After that the focus has been made on the design of a new read-out chip based on SKIROC2. The main goal was to preserve the good performances of SKIROC2 while trying to correct the encountered issues. This new ASIC has been developped in a newly released technology available during the design phase. Therefore the design has been started from scratch. The final chip is composed of building blocks rather than a ready-to-use read-out chip. Three charge preamplifier designs have been tested, the general architecture of a read-out channel being largely inspired by SKIROC2.
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Construction of a Calcium Matter-Wave InterferometerErickson, Christopher Joseph 28 November 2007 (has links) (PDF)
I describe the construction of a calcium matter-wave interferometer. The interferometer is based on a Ramsey-Borde scheme, and uses a thermal beam of atoms excited by an optical-frequency transition in calcium. In our experiment four pi/2 pulses of light are delivered to the atoms, which split and recombine the wave functions of the atoms. Our experimental design minimizes first-order Doppler shifts, and allows for the cancellation of systematic errors including phase shifts due to rotation and acceleration. I describe the individual components of the interferometer and its assembly. The requirements for the electronics used in the experiment as well as their design and performance are described in great detail. I also give an overview of the techniques used to passively stabilize the laser and optical components. Finally, I report on the current status of the experiment as well as detail future work to be done on the apparatus.
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A Design Basis for Composite Cascode Stages Operating in the Subthreshold/Weak Inversion RegionsWaddel, Taylor Matt 28 January 2012 (has links) (PDF)
Composite cascode stages have been used in operational amplifier designs to achieve ultra-high gain at very low power. The flexibility and simplicity of the stage makes it an appealing choice for low power op-amp designs. Op-amp design using the composite cascode stage is often made more difficult through the lack of a design process. A design process to aid in the selection of the MOSFET dimensions is provided in this thesis. This process includes a table-based method for selection of the widths and lengths of the MOSFETs used in the composite cascode stage. Equations are also derived for the gain, bandwidth, and noise of the composite cascode stage with each of the devices operating in the various regions of inversion.
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RF CMOS Tunable Gilbert Mixer with Wide Tuning Frequency and Controllable Bandwidth: Design Sythesis and VerificationHu, Xin 31 May 2017 (has links)
No description available.
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