Abstract The focus of this thesis is Ultra Wideband (UWB) Impulse Radio (UWB-IR) transmitters and non-coherent receivers. The aim of the thesis is to investigate, analyze and design UWB-IR transmitter and receiver structures both from a theoretical and circuit design viewpoint. An UWB-IR transmitter structure is proposed and is the subject of a detailed investigation. The transmitter generates a Gaussian monocycle and can be modified to generate a family of Gaussian waveforms. The Gaussian monocycle is easy to generate while providing good bit-error-rate (BER) performance. The Gaussian monocycle has a wide -10 dB bandwidth and a zero-DC component which does not decrease antenna efficiency. The transmitter design includes a delay locked loop (DLL) based frequency synthesis approach. The advantage of using a frequency synthesis approach based on a DLL is based on the fact that a DLL generates less noise than a phase locked loop (PLL) and is inherently stable. The generated pulse has a width of less than 350 ps and a -10 dB bandwidth of 4.7 GHz. The power consumption of the designed UWBIR transmitter is 20 mW at a voltage supply of 3.3 V. Compared with other integrated UWB-IR transmitters, the transmitter presented in this thesis has the lowest pulse width for comparable integrated processes, one of the lower power consumptions and a low die area. The BER performance of several UWB-IR non-coherent receiver structures is presented. The energy detection (ED) receiver offers the same BER performance as the transmitted reference scheme with binary pulse amplitude modulation (BPAM) but has a lower implementation complexity since it does not require an analogue delay line in its structure. Circuit performance of several blocks of the ED receiver is presented. The radio frequency (RF) front-end and analogue baseband sections of the receiver have been designed as an integrated circuit (IC) in a 0.35 μm bipolar complementary metal oxide semiconductor (BiCMOS) process. The RF front-end section includes a low noise amplifier (LNA), a variable gain amplifier (VGA) and a Gilbert cell. The LNA has a noise figure (NF) of less than 3 dB, a gain of 18 dB in the interest bandwidth and less than 20 mW of power consumption. The NF of the LNA can be reduced even further at the expense of a higher power consumption or by using input pads with lower capacitance values. The noise figure can be also lowered by using a process which provides transistors with higher transit frequency (fT). Trading-off power consumption for noise is still a key design issue in the design of integrated UWB-IR receivers. The analogue baseband section includes a bank of integrators and a 4-bit analogue to digital converter (ADC). The ADC is running at a sampling rate equal to the symbol rate and takes only 2 mW of power at 3.3 V supply. The power consumption of the designed integrated front-end and analogue baseband receiver sections is 117 mW at a power supply of 3.3 V. The digital baseband of the receiver have been implemented on a field programmable gate array (FPGA) technology. The power consumption of the baseband is 450 mW with a power supply of 1.2 V and a maximum supply of 3.3 V for input-output pins. The total power consumption of the designed transceiver is 587 mW. When compared with other UWB receiver architectures, the energy detection receiver has the lowest power consumption due to the low power consumption of the LNA, simple synchronization architecture and low sampling rate of the ADC.

This Master's Thesis deals with a design of L-band receiver front-end. In the concrete the receiver is designed for receiving signals of frequency band 1,3 GHz. All particular blocks from low noise amplifier to intermediate frequency amplifier and frequency doubler in LO input are described, designed and simulated in program Ansoft. The part of this Master's Thesis is aimed to construct a working front-end receiver and to measure its basic parameters.

This master's thesis is engage in suggestion of low noise 70 cm band amplifier with filter and diode attenuator. At first the thesis describes the basic parameters of amplifier, for example gain, noise figure and dynamic extent. Later in detail describes individual parts, which are the device consist of. At every part of system is mentioned the diagram of connection and values of components, which are ascertained from calculation, simulation and recommendation of producer. The characteristic parameters of amplifier were measured after construction.

Over the past two decades, Micro-Electro-Mechanical System (MEMS) based accelerometers, benefiting from relatively simple structure, low-power consumption, high sensitivity, and easy integration, have been widely used in many industrial and consumer electronics applications. For the high precision accelerometers, a significant technical challenge is to design a low-noise readout circuit to guarantee the required high resolution of the entire integrated system. There are three main approaches for improvement of the noise and offset of the readout circuit, namely auto-zero (AZ) and correlated double sampling (CDS) for the switched- capacitor (SC) circuit and chopper stabilization (CHS) for the continuous-time circuit. This thesis investigates the merits and drawbacks of all three techniques for reading the capacitance of a low noise MEMS accelerometer developed in our group. After that, we compare the different effects of the three technologies on noise, offset, output range, linearity, dynamic range, and gain. Next, we present the design of the most suitable structure for our sensor to achieve low noise, low offset, and high precision within the working frequency. In this thesis, the design and post-layout simulation of the circuit is proposed, and the fabrication is currently in progress. The readout circuit has reached the noise floor of the sub-μg, which meets the strict requirements of low noise MEMS capacitance-to-voltage converter. A high-performance accelerometer system is regarded as the core of a low-noise, high-resolution geophone. We show that together with the MEMS accelerometer sensor, the readout circuit provides competitive overall system noise and guarantees the required resolution.

Magnetoelectric (ME) effect, a cross-coupling effect between magnetic and electric orders, has stimulated lots of investigations due to the potential for applications as multifunctional devices. In this thesis, I have investigated and optimized the ME effect in Metglas/piezo-fibers ME composites with a multi-push pull configuration. Moreover, I have also proposed several devices based on such composites. In this thesis, several methods for ME composites optimization have been investigated. (i)  the ME coefficients can be enhanced greatly by using single crystal fibers with high piezoelectric properties; (ii) the influence of volume ratio between Metglas and piezo-fibers on ME coefficients has been studied both experimentally and theoretically. Modulating the volume ratio can increase the ME coefficient greatly; and (iii) the annealing process can change the properties of Metglas, which can enhance the ME response as well. Moreover, one differential structure for ME composites has been proposed, which can reject the external vibration noise by a factor of 10 to 20 dB. This differential structure may allow for practical applications of such sensors in real-world environments. Based on optimized ME composites, two types of AC magnetic sensor have been developed. The objective is to develop one alternative type of magnetic sensor with low noise, low cost and room-temperature operation; that makes the sensor competitive with the commercially available magnetic sensor, such as Fluxgate, GMR, SQUID, etc. Conventional passive sensors have been fully investigated, including the design of sensor working at specific frequency range, sensitivity, noise density characterization, etc. Furthermore, the extremely low frequency (< 10-3 Hz) magnetic sensor has undergone a redesign of the charge amplifier circuit. Additionally, the noise model has been established to simulate the noise density for this device which can predict the noise floor precisely. Based on theoretical noise analysis, the noise floor can be eliminated greatly. Moreover, another active magnetic senor based on nonlinear ME voltage coefficient is also developed. Such sensor is not required for external DC bias that can help the sensor for sensor arrays application. Inspired by the bio-behaviors in nature, the geomagnetic sensor is designed for sensing geomagnetic fields; it is also potentially used for positioning systems based on the geomagnetic field. In this section, some works for DC sensor optimization have been performed, including the different piezo-fibers, driving frequency and magnetic flux concentration. Meanwhile, the lock-in circuit is designed for the magnetic sensor to replace of the commercial instruments. Finally, the man-portable multi-axial geomagnetic sensor has been developed which has the highest resolution of 10 nT for DC magnetic field. Based on the geomagnetic sensor, some demonstrations have been finished, such as orientation monitor, magnetic field mapping, and geomagnetic sensing. Other devices have been also developed besides the magnetic sensor: (i) magnetic energy harvesters are developed under the resonant frequency condition. Especially, one 60 Hz magnetic harvester is designed which can harvester the magnetic energy source generated by instruments; and (ii) frequency multiplication tuned by geomagnetic field is investigated which potentially can be used for frequency multiplier or geomagnetic guidance devices. / Ph. D.

This thesis work is mainly focused on studying RF performance degradation of a low noise amplifier (LNA) circuit due to hot carrier effect (HCE) in both the weak and strong inversion regions. Since the figures of merit for the RF circuit characterization are gain, noise figure, input, and output matching, the LNA RF performance drift is evaluated in a Cadence SpectreRF simulator subject to these features. This thesis presents hot carrier induced degradation results of an LNA to show that the HCE phenomenon is one of the serious reliability issues in the aggressively scaled RF CMOS design, especially for long-term operation of these devices. The predicted degradation from simulation results can be used design reliable CMOS RF circuits.

MOS current mode logic (MCML) offers low noise digital circuits that reduce noise that can cripple analog components in mixed-signal integrated circuits, when compared to CMOS digital circuits. An MCML standard cell library was developed for the Cadence Virtuoso Integrated Circuit (IC) design software that gives IC designers the ability to design complex, low noise digital circuits for use in mixed-signal and noise sensitive systems at a high level of abstraction, allowing them to get superior products to market faster than competitors. The MCML standard cell library developed and presented here allows for fast development of mixed signal circuits by providing quiet digital building block gates that reduce the simultaneous switching noise (SSN) by an order of magnitude over conventional CMOS based designs [3]. This thesis project developed the following digital gates in MCML as a standard cell library for general-purpose low noise and very low noise applications: inverter, buffer, NAND, AND, NOR, OR, XOR, NXOR, 2:1 MUX, CMOS to MCML, MCML to CMOS, and double edge triggered flip-flop (DETFF).

<p> This thesis contributes to the computer-aided design (CAD) of spiral inductors and LC resonators with spiral inductors exploiting full-wave electromagnetic (EM) analysis.</p> <p> The spiral inductor is widely used in radio frequency integrated circuits (RF ICs), such as low noise amplifiers (LNA) and voltage controlled oscillators (VCO). The design of spiral inductors has a direct influence on the performance of these circuits. Recently proposed optimization methods for spiral inductors are usually based on circuit models, which are computationally efficient but inaccurate compared with full-wave electromagnetic (EM) simulations.</p> <p> For the first time, we develop an optimization technique for the design of spiral inductors and LC resonators exploiting both the computational efficiency of a (cheap) circuit model and the accuracy of a full-wave EM analysis, based on geometric programming (GP) and space mapping (SM). With the new technique, we can efficiently obtain EM-validated designs with considerable improvement over those obtained with traditional optimization methods.</p> / Thesis / Master of Applied Science (MASc)

Magnetic sensors are widely used in the field of mineral, navigational, automotive, medical, industrial, military, and consumer electronics. Many magnetic sensors have been developed that are generated by specific laws or phenomena: such as search-coil, fluxgate, Hall Effect, anisotropic magnetoresistance (AMR), giant magnetoresistance (GMR), magnetoelectric (ME), magnetodiode, magnetotransictor, fiber-optic, optical pump, superconducting quantum interference device (SQUID), etc. Each of these magnetic field sensors has their merits and application areas. For low power consumption (<10uW), quasi-static frequency (<10Hz) and high sensitivity (<nT) application, magnetoelectric laminate sensors offer the best potential capability and thus are the topic of my dissertation. Here, in this thesis, I have focused on designs and optimizations of magnetoelectric sensor units (i.e., sensors and circuit). To achieve my goals, I have developed some useful rules for ME sensor and detection circuit design. For ME sensor optimization, designs should consider both frequencies far away from resonance and at resonance. For the former one, both internal and external noise contribution must be considered, as one of them will limit practical applications. With regards to the internal noise sources, I have developed two design optimization methods, designated as ”'scale effect” and “ME array”. I showed that they have the ability to increase the magnetic field detection sensitivity, which was verified by experiments. With regard to external noise consideration, I have investigated how the fundamental extrinsic noise sources (temperature fluctuation, vibration, etc) affect ME laminate sensors. A concept of separating signal and noise modes into difference is put forward. Optimization with this concept in mind required us to redesign the internal structure of ME laminate sensors. At the resonant frequency, the ME voltage coefficient α_ME is the most important parameter. To enhance resonant gain in α_ME, I have developed a three phase laminate concept, which is based on increasing the effective mechanical factor Q while reducing the resonant frequency. A ME voltage coefficient of α_ME ~40V/cm.Oe has been achieved at resonance, which is about 2x higher than that of a conventional bending mode. Investigations of detection circuit optimization were also performed. Component selection strategies and a new charge topology were considered. Proper component values were required to optimize the charge detection scheme. It was also found, under some specific conditions to satisfy the circuit stability, that if the lowest required measurement frequency of the charge source was f1, then that it was not necessary to make the high corner frequency <i>f</i>_p of the charge amplifier lower than <i>f</i>₁: as doing so would decrease the system's signal-to-noise ratio (SNR). A high pass, high order filter placed behind the charge amplifier was found to increase the charge sensitivity, as it narrows the intrinsic noise bandwidth and decreases the output noise contribution, while only slightly affecting the signal's output amplitude. Prototype ME unit were also constructed, and their noise level simulated by Pspice. Experimental results showed that prototypes ME unit can reach their detection limit. In addition, a new magneto-electric coupling mechanism was also found, which had a giant ME effect. / Ph. D.

Gallium Nitride (GaN) technology is capable of very high power levels but suffers from high non-linearity. With the advent of 5G technologies, high linearity is in greater demand due to complex modulation schemes and crowded RF (Radio Frequency) spectrum. Because of the non-linearity issue, GaN power amplifiers have to be operated at back-off input power levels. Operating at back-off reduces the efficiency of the power amplifier along-with the output power. This research presents a technique to linearize GaN amplifiers. The linearity can be improved by splitting a large device into multiple smaller devices and biasing them individually. This leads to the cancellation of the IMD3 (Third-order Intermodulation Distortion) components at the output of the FETs and hence higher linearity performance. This technique has been demonstrated in Silicon technology but has not been previously implemented in GaN. This research work presents for the first time the implementation of this technique in GaN Technology. By the application of this technique, improvement in IMD3 of 4 dBc has been shown for a 0.8-1.0 GHz PA (Power Amplifier), and 9.5 dBm in OIP3 (Third-order Intercept Point) for an S-Band GaN LNA, with linearity FOM (IP3/DC power) reaching up to 20. Large-signal simulation and analysis have been done to demonstrate linearity improvement for two parallel and four parallel FETs. A simulation methodology has been discussed in detail using commercial CAD software. A power sampler element is used to compute the IMD3 currents coming out of various FETs due to various bias currents. Simulation results show by biasing one device in Class AB and others in deep Class AB, IMD3 components of parallel FETs can be made out of phase of each other, leading to cancellation and improvement in linearity. Improvement up to 20 dBc in IMD3 has been reported through large-signal simulation when four parallel FETs with optimum bias were used. This technique has also been demonstrated in simulation for an X-Band MMIC PA from 8-10 GHz in GaN technology. Improvements up to 25-30 dBc were shown using the technique of biasing one device with Class AB and other with deep class AB/class B. The proposed amplifier achieves broadband linearization over the entire frequency compared to state-of-the-art PA's. The linearization technique demonstrated is simple, straight forward, and low cost to implement. No additional circuitry is needed. This technique finds its application in high dynamic range RF amplifier circuits for communications and sensing applications. / Doctor of Philosophy / Power amplifiers (PAs) and Low Noise Amplifiers (LNAs) form the front end of the Radio Frequency (RF) transceiver systems. With the advent of complex modulation schemes, it is becoming imperative to improve their linearity. Through this dissertation, we propose a technique for improving the linearity of amplifier circuits used for communication systems. Meanwhile, Gallium Nitride (GaN) is becoming a technology of choice for high-power amplifier circuits due to its higher power handling capability and higher breakdown voltage compared with Gallium Arsenide (GaAs), Silicon Germanium (SiGe) and Complementary Metal-Oxide-Semiconductor (CMOS) technologies. A circuit design technique of using multiple parallel GaN FETs is presented. In this technique, the multiple parallel FETs have independently controllable gate voltages. Compared to a large single FET, using multiple FETs and biasing them individually helps to improve the linearity through the cancellation of nonlinear distortion components. Experimental results show the highest linearity improvement compared with the other state-of-the-art linearization schemes. The technique demonstrated is the first time implementation in GaN technology. The technique is a simple and cost-effective solution for improving the linearity of the amplifier circuits. Applications include base station amplifiers, mobile handsets, radars, satellite communication, etc.