In recent years, the fundamental researches on nanocrystals have been received increasing attentions for the novel applications, especially the nonvolatile memory technology. Adoption of nanocrystals technology could solve the serious limitation suffered by the conventional nonvolatile memory, flash, while scaling down. Once the thin tunneling oxide of flash device has been created a leaky path, all the stored charge in the floating gate will be lost after numerous counts of data reading and writing. Hence, the thinning of tunneling oxide will become one of important keys to the scaling limitation. Furthermore, if the tunneling oxide can not be thinned any more, both the operation voltage and speed of memory can not be improved. These drawbacks will restrict the development of nonvolatile memory. Replacement of floating gate structure with nanocrystals could effectively avoid the data losing due to the leaky path in the thin tunneling oxide. All stored charges can¡¦t be lost through the few leaky paths since the charges are stored in distributed nanocrystals. The charges stored nearby the leaky path will be lost, but others are still kept in the distributed and independent nanocrystals. The advantages of metal nanocrystals has have higher density of states around Fermi level, stronger coupling with conduction channel, wide range of available work functions and smaller energy perturbation due to carrier confinement. So metal nanocrystals can reduce operate voltage, and increase write/erase speed and endurance. In this thesis, we will study of cobalt and cobalt-silicide as the memory storage element. The nanocrystals were formed by high temperature oxidation or metal rapid thermal annealing with all kinds of conditions. And we analyze the effect of electron storage at metal nanocrystals by means of material and electrical analysis.

In a conventional nonvolatile memory, charge is stored in a polysilicon floating gate (FG) surrounded by dielectrics. The scaling limitation stems from the requirement of very thin tunnel oxide layer. For FG, once the tunnel oxide develops a leaky path under repeated write/erase operation, all the stored charge will be lost.Therefore, the thickness of the tunnel oxide can not be scaled down to about 7 nm. To alleviate the scaling limitation of the conventional FG device while preserving the fundamental operating principle of the memory, we have studied the distributed charge storage approach such as the nanocrystal nonvolatile memory. Each nanodot will typically store only a handful of electrons; collectively the charges stored in these dots control the channel conductivity of the memory device. Nanocrystal charge storage offers several advantages, the main one being the potential to use thinner tunnel oxide without sacrificing non-volatility. This is a quite attractive proposition since reducing the tunnel oxide thickness is a key to lowering operating voltages and/or increasing operating speeds. The improved scalability results not only from the distributed nature of the charge storage, which makes the storage more robust and fault-tolerant, but also from the beneficial effects of Coulomb blockade. A local leaky path will not cause a fatal loss of information for the nanocrystal non-volatile memory device. Also, the nanocrystal memory device can maintain good retention characteristics and lower the power consumption. In recent years, nonvolatile memory with nanocrystals cell have widely applied to overcome the issue of operation and reliability for conventional floating gate memory. The excellent electrical characteristics of memory device need good endurance, long retention time and small operation voltage. Among numerous memory devices with nanocrystals, the memory device with metal nanocrystals was widely researched. It will be a new candidate for flash memory. The advantages of metal nanocrystals has have higher density of states around Fermi level, stronger coupling with conduction channel, wide range of available work functions and smaller energy perturbation due to carrier confinement. So metal nanocrystals can reduce operate voltage, and increase write/erase speed and endurance. Most important of all, we can control the sizes of nanocrystals dot and manufacture at low temperature¡CThis advantage can apply to thin film transistor liquid crystal display; it fabricates driving IC and logical IC on panel for diverseness and adds memory beside switch TFT as image storage to reduce power consumption for portability. In this thesis, we will discuss metal nanocrystals as memory storage medium. And we can use high temperature oxidation, low temperature annealing with oxygen to form nanocrystals. Most importantly, we analyze the effect of electron storage at metal nanocrystals by means of material and electrical analysis.

As the complexity of SoC increases rapidly, embedded memory becomes one of the critical components in current SoC design. In this thesis, we develop a memory generator so that users can easily integrate proper embedded memory circuits into SoC chips. The generator is based on a low-power multi-voltage-source memory architecture that partitions the complete memory into two parts to avoid unnecessary operations. In addition, we also address the modification of the memory architectures in order to provide more efficient data accessing in multimedia applications such as DCT, JPEG-2000 and 3D graphics. The developed memory generator can produce all the necessary files required in the traditional cell-based design flow, including behavior model, Synopsys library, LEF file, Spice netlists and layouts, so that the designers can easily utilize the generated memory units in their ASIC designs.

In recent years, many researchers had proposed a new class of computer architecture, called processor-in-memory (PIM), to reduce the performance gap between the CPU and memory. In order to exploit the benefits of PIM, we designed a parallelizing system ¡V SAGE (Statement Analysis Grouping Evaluation) in our previous research. In this paper, we design a program decomposition mechanism for SAGE system. The mechanism partitions the statements in a program into several parts according to control flow relation. Then it analyzes data dependence relation by using Polaris system, and generates weighted partition dependence graphs which are scheduled by task scheduling mechanisms of SAGE system.

This study examined a measure of children's memory for information from a story about a hypothetical mother and child, the Story Task, as a potential tool to delineate subtypes of aggressive children based on the pattern of information processing revealed through their Story Task performance. The Story Task scores of 263 second and third grade aggressive children were subjected to a cluster analytic procedure. Although four apparently distinct subgroups emerged from the cluster analysis (negative recall, low recall, defensive processing, and positive projection), validation analyses of these clusters against external variables failed to reveal significant group differences. Potential exaplanations for the failure to find meaningful subgroups of aggressive children and general limitations of the study are discussed.

This thesis addresses the recurrent threshold crossing behavior of long-time correlated noise. The behavior of long-time correlated noise like f / 1 , 5 . 1 / 1 f , and 2 / 1 f can be associated with the behavior of many phenomena in nature, so it is of interest to study the behavior of this noise. Our method of modeling their recurring behavior relies on setting a particular threshold level for a particular level of noise and observing how frequently the noise crosses the threshold level. We also add a periodic drive to the noise which enables it to cross the threshold level easily when it is at peak, and vice versa. This technique provides a model for the changing seasons that occur during every year. We also compare the recurrence behavior of threshold crossings from our computer simulations with theoretical results from the Rice formula. We have related the recurrence of these threshold crossings with the recurrence of natural disasters. Therefore we are providing a model to predict the recurrence of a natural disaster once that disaster has previously occurred. From our results, we conclude that once a natural disaster has occurred, there is a high probability of its recurrence in a short time, and this probability gradually decreases with time.

n-channel and p-channel amorphous-silicon thin-film transistors (a-Si:H TFTs) with copper electrodes prepared by a novel plasma etching process have been fabricated and studied. Their characteristics are similar to those of TFTs with molybdenum electrodes. The reliability was examined by extended high-temperature annealing and gate-bias stress. High-performance CMOS-type a-Si:H TFTs can be fabricated with this plasma etching method. Electrical characteristics of a-Si:H TFTs after Co-60 irradiation and at different experimental stages have been measured. The gamma-ray irradiation damaged bulk films and interfaces and caused the shift of the transfer characteristics to the positive voltage direction. The field effect mobility, on/off current ratio, and interface state density of the TFTs were deteriorated by the irradiation process. Thermal annealing almost restored the original state's characteristics. Floating gate n-channel a-Si:H TFT nonvolatile memory device with a thin a- Si:H layer embedded in the SiNx gate dielectric layer has been prepared and studied. The hysteresis of the TFT's transfer characteristics has been used to demonstrate its memory function. A steady threshold voltage change between the "0" and "1" states and a large charge retention time of > 3600 s with the "write" and "erase" gap of 0.5 V have been detected. Charge storage is related to properties of the embedded a-Si:H layer and its interfaces in the gate dielectric structure. Discharge efficiencies with various methods, i.e., thermal annealing, negative gate bias, and light exposure, separately, were investigated. The charge storage and discharge efficiency decrease with the increase of the drain voltage under a dynamic operation condition. Optimum operating temperatures are low temperature for storage and higher temperature for discharge. a-Si:H metal insulator semiconductor (MIS) capacitor with a thin a-Si:H film embedded in the silicon nitride gate dielectric stack has been characterized for memory functions. The hysteresis of the capacitor's current-voltage and capacitance-voltage curves showed strong charge trapping and detrapping phenomena. The 9 nm embedded a-Si:H layer had a charge storage capacity six times that of the capacitor without the embedded layer. The nonvolatile memory device has potential for low temperature circuit applications.

Current requirement of nonvolatile memory (NVM) are high density cell, low-power wastage, high speed operation, and good reliability for the scaling down device. In a conventional nonvolatile memory, once the tunnel oxide develops a leaky path under repeated write/erase operation, all the stored charge will be lost. Therefore, the tunnel oxide thickness is incapable to scale down in terms of charge retention and endurance characteristics. Therefore conventional floating gate (FG) nonvolatile memories (NVMs) present critical issues on device scalability beyond the sub-50nm node. The nonvolatile nanocrystal memories are one of promising candidates to substitute for the conventional floating gate (FG) memories, because the nanocrystal memories storage charge by separated node. So it is not major influence of charge lost from partial oxide layer. The thickness of tunnel oxide can be reduce also can maintain good retention, therefore it is key to lowering operating voltages and increasing operating speeds. Also reduce device to increasing the density of device. The advantages of metal nano-dot compared with other material counterparts include stronger coupling with the conduction channel, a wide range of available work functions, and higher density of states around the Fermi level. Because these advantages. It is possibility of metal nanocrystals nonvolatile memory fabricated in industry in practice. In this thesis, an ease and low temperature fabrication technique of Co-Si-N nanocrystals was demonstrated for the application of nonvolatile memory. The nonvolatile memory structure of Co-Si-N nanocrystals embedded in the SiOx layer was fabricated by sputtering a co-mix target (CoSi2) in an Ar/N2 environment at room temperature. It can be considered that the nitrogen plays a critical role during sputter process for the formation of nanocrystal. In addition, the high density (~1012 cm-2) nanocrystal can be simple and uniform to be fabricated in our study. We also proposed a formation of Co-Si-N nanocrystals by sputtering a co-mix target (CoSi2) in the Ar/NH3 environment at room temperature. It was also found that high density Ni-Si-N nanocrystals embedded in the silicon nitride (SiNx) and larger memory effect. A rapid thermal annealing (RTA) with process temperature at 700¢XC¡B800¢XC and short duration (60sec) was used to form nanocrystals. The charge storage layer of nanorystals embedded in SiNx shows larger memory window and better reliability over nanocrystals embedded in SiOx, due to different distributions of electronic field .

Thesis (Ph. D.)--University of Oregon, 2000. / Typescript. Includes vita and abstract. Includes bibliographical references (leaves 96-102). Also available for download via the World Wide Web; free to University of Oregon users.

Thesis (M.A.)--University of Alabama at Birmingham, 2009. / Title from PDF title page (viewed Jan. 21, 2010). Additional advisors: Robert Collins, Ann Hoff, Samantha Webb.