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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
141

A study of the performance and reliability characteristics of HfO₂ MOSFET's with polysilicon gate electrodes

Onishi, Katsunori 28 August 2008 (has links)
Not available / text
142

A study on the material and device characteristics of hafnium oxynitride MOSFETs with TaN gate electrodes

Kang, Changseok 28 August 2008 (has links)
Not available / text
143

Simulation study of deep sub-micron and nanoscale semiconductor transistors

Xia, Tongsheng 28 August 2008 (has links)
Not available / text
144

Scalable voltage reference for ultra deep submicron technologies

Cave, Michael David 28 August 2008 (has links)
Not available / text
145

Processing and reliability studies on hafnium oxide and hafnium silicate for the advanced gate dielectric application

Choi, Rino 28 August 2008 (has links)
Not available / text
146

Silicon-based vertical MOSFETs

Jayanarayanan, Sankaran 28 August 2008 (has links)
Not available / text
147

Electrical and material characteristics of hafnium-based multi-metal high-k gate dielectrics for future scaled CMOS technology: physics, reliability, and process development

Rhee, Se Jong 28 August 2008 (has links)
Not available / text
148

Metal-oxide-semiconductor devices based on epitaxial germanium-carbon layers grown directly on silicon substrates by ultra-high-vacuum chemical vapor deposition

Kelly, David Quest 28 August 2008 (has links)
Not available / text
149

Systematic evaluation of metal gate electrode effective work function and its influence on device performance in CMOS devices

Wen, Huang-Chun 28 August 2008 (has links)
Not available
150

A study on electrical and material characteristics of hafnium oxide with silicon interface passivation on III-V substrate for future scaled CMOS technology

Ok, Injo, 1974- 29 August 2008 (has links)
The continuous improvement in the semiconductor industry has been successfully achieved by the reducing dimensions of CMOS (complementary metal oxide semiconductor) technology. For the last four decades, the scaling down of physical thickness of SiO₂ gate dielectrics has improved the speed of output drive current by shrinking of transistor area in front-end-process of integrated circuits. A higher number of transistors on chip resulting in faster speed and lower cost can be allowable by the scaling down and these fruitful achievements have been mainly made by the thinning thickness of one key component - Gate Dielectric - at Si based MOSFET (metal-oxide-semiconductor field effect transistor) devices. So far, SiO₂ (silicon dioxide) gate dielectric having the excellent material and electrical properties such as good interface (i.e., Dit ~ 2x10¹⁰ eV⁻¹cm⁻²), low gate leakage current, higher dielectric breakdown immunity (≥10MV/cm) and excellent thermal stability at typical Si processing temperature has been popularly used as the leading gate oxide material. The next generation Si based MOSFETs will require more aggressive gate oxide scaling to meet the required specifications. Since high-k dielectrics provide the same capacitance with a thicker film, the leakage current reduction, therefore, less the standby power consumption is one of the huge advantages. Also, it is easier to fabricate during the process because the control of film thickness is still not in the critical range compared to the same leakage current characteristic of SiO₂ film. HfO₂ based gate dielectric is considered as the most promising candidate among materials being studied since it shows good characteristics with conventional Si technology and good device performance has been reported. However, it has still many problems like insufficient thermals stability on silicon such as low crystallization temperature, low k interfacial regrowth, charge trapping and so on. The integration of hafnium based high-k dielectric into CMOS technology is also limited by major issues such as degraded channel mobility and charge trapping. One approach to overcome these obstacles is using alternative substrate materials such as SiGe, GaAs, InGaAs, and InP to improve channel mobility. / text

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