The research reported in this thesis is focused on the creation of a CAE system to support Reverse Engineering. It is centred around the computational representation of products (Product Model) and manufacturing capabilities (Manufacturing Model). These models are essential for modem and future software systems aimed to assist the design process, enabling data sharing among the participants who use various computational tools. Reverse Engineering is employed as a particular context and motivation for exploring the application of the models. The research builds on the achievements of the recently finished Model Oriented Simultaneous Engineering System (MOSES) project, undertaken jointly by Leeds University and the Department of Manufacturing Engineering of Loughborough University. MOSES' work on information modelling was analysed and combined together with the original proposals of the author to elaborate a suitable support to Reverse Engineering, applicable to redesign in general. A process for Reverse Engineering is proposed and documented and a data model driven CAE system to support it is specified. The CAE system includes a Product Model, a Manufacturing Model and two software application environments. The Product Model of the system is based on the information requirements of the Reverse Engineering process and is suitable for representing multi-component products, from different perspectives through its life cycle. The applications assist the characteristic activities of Reverse Engineering. In particular, the system is used for exploring the application of Product and Manufacturing Models in supporting Design for Manufacture. The theoretical research is tested by the use of a case study which explores the Reverse Engineering of a component. This work is supported by a prototype software instance of the CAE system. The case study component is an axle which forms part of a product designed and manufactured by a collaborating company.

This dissertation addresses two important problems in reusing intellectual properties (IPs) in the form of reusable design or verification components. The first problem is associated with fast and effective integration of reusable design components into a System-on-chip (SoC), so faster design turn-around time can be achieved, leading to faster time-to-market. The second problem has the same goals of faster product design cycle, but emphasizes on verification model reuse, rather than design component reuse. It specifically addresses reuse of reusable verification IPs to enable a "write once, use many times" verification strategy. This dissertation is accordingly divided into part I and part II which are related but describe the two problems and our solutions to them. These two related but distinctive problems faced by system design companies have been tackled through a unique approach which hither-to-fore only have been used in the software engineering domain. This approach is called metamodeling, which allows creating customized meta-language to describe the syntax and semantics for a modeling domain. It provides a way to create, transform and analyze domain specific languages, which are themselves described by metamodels, and the transformation and processing of models in such languages are also described by metamodels. This makes machine based interpretation and translation from these models an easier and formal task. In part I, we consider the problem of rapid system-level model integration of existing reusable components such that (i) the required architecture of the SoC can be expressed formally, (ii) automatic selection of components from an IP library to match the need of the system being integrated can be done, (iii) integrability of the components is provable, or checkable automatically, and (iv) structural and behavioral type systems for each component can be utilized through inferencing and matching techniques to ensure their compatibility. Our solutions include a component composition language, algorithms for component selection, type matching and inferencing algorithms, temporal property based behavioral typing, and finally a software system on top of an existing metamodeling environment. In part II, we use the same metamodeling environment to create a framework for modeling generative verification IPs. Our main contributions relate to INTEL's microprocessor verification environment, and our solution spans various abstraction levels (System, architectural, and microarchitecture) to perform verification. We provide a unified language that can be used to model verification IPs at all abstraction levels, and verification collaterals such as testbenches, simulators, and coverage monitors can be generated from these models, thereby enhancing reuse in verification. / Ph. D.

Thèse numérisée par la Division de la gestion de documents et des archives de l'Université de Montréal.

Thèse numérisée par la Division de la gestion de documents et des archives de l'Université de Montréal