Delta-sigma modulators are currently a very popular technique for making high-resolution analog-to-digital and digital-to-analog converters. These oversampled data converters have several advantages over conventional Nyquist-rate converters, including an insensitivity to many analog component imperfections, a simpler antialiasing filter and reduced accuracy requirements in the sample and hold. Though the initial uses of delta-sigma modulators were in the audio field, the development of bandpass modulators opened up the application range to radar systems, digital communication systems and instruments which convert IF, or even RF, analog signals directly to digital form. This thesis presents a method used to analyze and synthesize continuous-time delta-sigma modulators for given specifications. A fourth-order prototype continuous-time bandpass delta-sigma modulator employing g[subscript m]-LC resonator structure is demonstrated on a PCB board and measurement results corroborate the theory. To allow the construction of very high performance delta-sigma modulators, this thesis presents an architecture for a multibit DAC constructed from unit elements which shapes element mismatches. Theoretical analysis and simulation shows that this architecture greatly increases the noise attenuation in the band-of-interest and facilitates the use of multibit quantization in delta-sigma modulators. The methods presented in this thesis will allow high-frequency wideband bandpass delta-sigma modulators to be constructed. / Graduation date: 1996

Thesis (Ph. D.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 106-110). Also available on the World Wide Web.

A dual-mode second-order Multirate Multibit Sigma Delta (MM-SD) modulator is implemented in a 90nm digital CMOS process for application in the baseband path of RF receivers. Low power consumption is achieved through a new integrator structure and a dedicated timing scheme along with aggressive capacitor scaling in the second stage of the modulator loop. Fabricated prototype achieves 68.6dB peak Signal-to-Noise and Distortion ratio (SNDR) in the 200 kHz GSM band and requires 1.1mA of total current from a 1.5V supply. This dual-mode design also achieves 42.8dB SNDR in the 1.94 MHz WCDMA band with only 1.9mA of total current consumption.

Continuous-time filters are critical components in the implementation of large bandwidth, high frequency, and high resolution continuous-time (CT) sigma-delta (ΣΔ) analog-to-digital converters (ADCs). The loop filter defines the noise-transfer function (NTF) and hence the quantization noise-shaping behavior of the ΣΔ modulator, and becomes the most critical performance determining part in ΣΔ ADC. This thesis work presents the design considerations for the loop filter in low-pass CT ΣΔ ADC with 12-bits resolution in 25MHz bandwidth and low power consumption using 0.18μm CMOS technology. Continuous-time filters are more suitable than discrete-time filters due to relaxed amplifier bandwidth requirements for high frequency ΣΔ ADCs. A fifth-order low-pass filter with cut-off frequency of 25 MHz was designed to meet the dynamic range requirement of the ADC. An active RC topology was chosen for the implementation of the loop filter, which can provide high dynamic range required by the ΣΔ ADC. The design of a summing amplifier and a novel method for adjusting the group delay in the fast path provided by a secondary feedback DAC of the ΣΔ ADC are presented in detail. The ADC was fabricated using Jazz 0.18μm CMOS technology. The implementation issues of OTAs with high-linearity and low-noise performance suitable for the broadband ADC applications are also analyzed in this work. Important design equations pertaining to the linearity and noise performance of the Gm-C biquad filters are presented. A Gm-C biquad with 100MHz center frequency and quality factor 10 was designed as a prototype to confirm with the theoretical design equations. Transistor level circuit implementation of all the analog modules was completed in a standard 0.18μm CMOS process.

Multiple-quantum-well (M.Q.W.) and quantum-confined-stark-effect (Q.C.S.E.) have been widely used in designing and fabricating electroabsorption modulators. In this paper, material InAlAs/InGaAlAs near 1500nm transition is used to be our target for designing and fabricating EAM due to its high band-offset ratio (electron to hole) and the strong exciton effect. A calculation model for quantum well absorption has been developed to design EAM active region. Asymmetrically inserting a thin-spiked potential barrier into wide Q.W. structure, the Q.W. can have high efficiency of Q.C.S.E. without lowing the electron-hole wave function overlap integral, causing high electroabsorption coefficient and optical modulation. Tuning material composition (~-0.4% tensile strain ) is also used for polarization independence characteristics. Traveling-wave EAM based on InAlAs / InGaAlAs material system is also fabricated and measured. Polarization independence 2~5 dB operation, low voltage swing of 1V for 15 dB extinction ratio, high-speed electrical-to-optical response with ¡V3dB bandwidth of >20GHz at 50£[ termination have been achieved showing high potential in broad band fiber optical communication.

Semiconductor optical amplifiers (SOA) and electroabsorption modulators (EAM) have been become vital elements to obtain high-output-power and high-speed optical signal in the optical fiber communications. In this paper, we propose a novel type cascaded integrated SOAs and EAMs, which are monolithically integrated in the same chip without any regrowth. In the active region, high electron bandgap offset material, InGaAsP/InAlGaAs, is used in order to get high optical gain and also high modulation. Using cascaded SOAs and EAMs, high impedance of microwave stripe lines are the bridges connecting the small EAM elements, bring up higher impedance and thus enhancing the microwave transmission. The optical waveguide is made by selectively undercut etching InGaAsP/InAlGaAs material in order to reduce the optical scattering loss and also the microwave loss due to the low parasitic capacitance. The processing is described by the following steps: (1) ion implantation to get electrical isolation; (2) wet etching to form the optical waveguide ridge; (3) e-gun evaporation to get n- and p- metalization ; (4) spinning PMGI as planarization; (5)Final thick metalizations as for microwave transmission line. The final integrated cascaded SOAs and EAMs has been successfully fabricated and measured. In comparison with single EAM, higher than 10GHz of ¡V3dB electrical transmission has been found, indicating the cascaded integration structure has better impedance matching and also higher electrical transmission. The measured optical gain is higher than 5dB with 11dB/V modulation efficiency at excitation wavelength of 1568nm.

<p>An important component in many communication system is the digital to analog converter. The component is needed in order to convert real world analog quantities to digital quantities which are easier to process. As the market for hand held devices with wireless communication with the outer world has increased new approaches for sharing the frequency spectrum are needed. Therefore it would be interesting to look at the possibility to design an analog to digital converter that, in runtime, can change the frequency band converted, and hence the used standard. This thesis study one of the possibilities to design such an ADC, as a Σ∆ modulator, and more precise the structure called Cascade of resonators with distributed feedback and input (CRFB). The order of the modulator in this study is two.</p>

With the progress of microfabrication and nanofabrication technologies, there has been a reawakened interest in the possibility of controlling the propagation of light in various materials periodically structured at a scale comparable to, or slightly smaller than the wavelength. We can now engineer materials with periodic structures to implement a great variety of optical phenomena. These include well known effects, such as dispersing a variety of wavelength to form a spectrum and diffracting light and controlling its propagation directions, to new ones such as prohibiting the propagation of light in certain directions at certain wavelengths and localizing light with defects in some artificially synthesized dielectric materials. Advances in this field have had tremendous impact on modern optical and photonic technologies. This doctoral research was aimed at investigating some of the physics and applications of periodic structures for building blocks of the optical communication and interconnection system. Particular research emphasis was placed on the exploitation of innovative periodic structure-based optical and photonic devices featuring better functionality, higher performance, more compact size, and easier fabrication. Research topics extended from one-dimensional periodic-structure-based true-time delay module, to two-dimensional periodic-structure-based silicon photonic-crystal electro-optic modulators. This research was specifically targeted to seek novel and effective solutions to some long-standing technical problems, such as slow switching speed, large device size, and high power consumption of silicon optical modulators, among others. For each subtopic, research challenges were presented and followed by the proposed solutions with extensive theoretical analysis. The proposals were then verified by experimental implementations. Experimental results were carefully interpreted and the future improvements were also discussed. / text

As high precision data acquisition systems continue to improve their performance and power efficiency to migrate into portable devices, increasing demands are placed on the performance and power efficiency of the analog-to-digital conversion modulator. On the other hand, analog-to-digital modulator performance is largely limited by several major noise sources including thermal noise, flicker noise, quantization noise leakage and internal analog and digital coupling noise. Large power consumption and die area are normally required to suppress the above noise energies, which are the major challenges to achieve power efficiency and cost targets for modern day high precision converter design. The main goal of this work is to study various approaches and then propose and validate the most suitable topology to achieve the desired performance and power efficiency specifications, up to 100 kHz bandwidth with 16-21 bits of resolution. This work will first study various analog-to-digital conversion architectures ranging from Nyquist converters such as flash, pipeline, to the delta sigma architecture. Advantages and limitations of each approach will be compared to develop the criteria for the optimal modulator architecture. Second, this work will study analog sub-circuit blocks such as opamp, comparator and reference voltage generator, to compare the advantages and limitations of various design approaches to develop the criteria for the optimal analog sub circuit design. Third, this work will study noise contributions from various sources such as thermal noise, flicker noise and coupling noise, to explore alternative power and die area efficient approaches to suppress the noise. Finally, a new topology will be proposed to meet all above criteria and adopt the new noise suppression concepts, and will be demonstrated to be the optimal approach. The main difference between this work from previous ones is that current work places emphasis on the integration of the modulator architecture design and analog sub-circuit block research efforts. A high performance stereo analog-to-digital modulator is designed based on the new approach and manufactured in silicon. The chip is measured in the lab and the measurement results reported in the dissertation. / text

There is a need to rethink the design of analog/mixed-signal circuits to be viable in state-of-the-art nanometer-scale CMOS processes due to the hostile environment they create for analog circuits. Reduced supply voltages and smaller capacitances are beneficial to circuit speed and digital circuit power efficiency; however, these changes along with smaller dimensions and close coupling of fast-switching digital circuits have made high-accuracy voltage domain analog processing increasingly difficult. In this work, techniques to improve analog-to-digital converters (ADC) for nanometer-scale processes are explored. First, I propose a mostly-digital time-based oversampling delta-sigma (∆Σ) ADC architecture. This system uses time, rather than voltage, as the analog variable for its quantizer, where the noise shaping process is realized by modulating the width of a variable-width digital "pulse." The merits of this architecture render it not only viable to scaling, but also enable improved circuit performance with ever-increasing time resolution of scaled CMOS processes. This is in contrast to traditional voltage-based analog circuit design, whose performance generally decreases with scaling due to increasingly higher voltage uncertainty due to supply voltage reduction and short-channel effects. In conjunction with Dr. Woo Young Jung while he was a Ph.D. student at The University of Texas at Austin, two prototype implementations of the proposed architecture were designed and fabricated in TSMC 180 nm CMOS and IBM 45 nm Silicon-On-Insulator (SOI) processes. The prototype ADCs demonstrate that the architecture can achieve bandwidths of 5-20 MHz and ∼50 dB SNR with very small area. The first generation ADC core occupies an area of only 0.0275 mm² , while the second generation ADC core occupies 0.0192 mm² . The two prototypes can be categorized as some of the smallestarea modulators in the literature. Second, I analyze the measured results of the prototype ADC chips, and determine the source for the harmonic distortion. I then demonstrate a digital calibration algorithm that sufficiently mitigates the distortion. This calibration approach falls in the general philosophy of digitally-assisted analog systems. In this philosophy, digital calibration and post-correction are favored over traditional analog solutions, in which there is a high cost to the analog solution either in complexity, power, or area. / text