In order to construct the integrated circuit with high efficiency, the size of the semiconductor devices becomes smaller and smaller. The surface of the chip is unable to offer enough area for devices interconnecting, that the Ultra Large Scale Integration (ULSI) has to adopt the construction of multilayer metal conductor line, and to decrease it¡¦s connects. However, the RC delay time becomes a main issue to limiting semiconductor speed when the electron signal was transferred between two metal connects. In order to solve the problem of RC delay, and to lower resistivity, copper (1.7 £g£[-cm) is applied instead of Aluminum (2.7 £g£[-cm) at present. In additation, to lower the capacitance, the low-k material has taken place SiO for reducing the electric capacity. In this work, the capacitance and current of MIM(Metal-Insulator-Metal) of interconnecting circuit were investigated under bending stress. SiOC of OSG (Organic silicate glass) layer has applied to a MIM structure. In order to apply the strain in devices, the device was bended to a fixed curvature for compressed and tensile stress. By bending the device, the capacitance and leakage current I-V & C-V were analyzed and compared with the unstressed SAMPLE of I-V and C-V at high temperature, too. The result reveals both of Schottky and Poole-Frenkel conduction mechanism existing in device under a high electric field of 1800 V/cm1/2, which indicates the theoretical treatment is unappropriate for the interpretation of the leakage current mechanism.