The high penetration of renewable energy and the emerging concept of micro-grid system raises challenges to the high power conversion techniques. Multilevel converter plays the key role in such applications and is studied in detail in the dissertation. The topologies and modulation techniques for multilevel converter are categorized at first by a thorough literature survey. The pros and cons for various multilevel topologies and modulation techniques are discussed. The 3-level neutral point clamped (NPC) topology is selected to build a 200kVA, 20 kHz power conversion system. The modularized phase leg building block of the converter is carefully designed to achieve low loss and stress for high frequency and high power operation. The switching characteristics for all the commutation loops of 3-level phase leg are evaluated by double pulse tests. The switching performance is optimized for loss and stress tradeoff. A detailed loss model is built for system loss distribution and loss breakdown calculation. Loss and stress for the phase leg and 3-phase system are quantified at all power factors. The space vector modulation (SVM) for 3-level NPC converter is investigated to achieve loss reduction, neutral voltage balance and noise reduction. The loss model and simulation model provides a quantitative analysis for loss and neutral voltage ripple tradeoff. An improved SVM method is proposed to reduce NP imbalance and switching loss simultaneously. This method also ensures an evenly distributed device loss in each phase leg and gives a constant system efficiency under different power factors. Based on the improved modulation strategy, a new modulation scheme is then proposed with largely reduced conduction loss and switching stress. Moreover, the device loss and stress distribution on a phase leg is more even. This scheme also features on the simplified implementation. The improved switching characteristics for the proposed method are verified by double pulse tests. Also the system loss breakdown and the phase leg loss distribution analysis shows the loss reduction and redistribution result. The harmonic filter for the grid interface converter is designed with LCL topology. A detailed inductor current ripple analysis derives the maximum inductor current ripple and the ripple distribution in a line cycle. The inverter side inductor is designed with the optimum loss and size trade-off. The grid side inductor is designed based on grid code attenuation requirement. Different damping circuits for LCL filter are evaluated in detail. The filter design is verified by both simulation and hardware experiment. The average model for the 3-level NPC converter and its equivalent circuit is derived with the consideration of damping circuit in both ABC and d-q frame. The modeling and control loop design is verified by transfer function measurement on real hardware. The control loops design is also tested and verified on real hardware. The interleaved DC/DC chopper is introduced at last. The different interleaving methods and their current ripple are analyzed in detail with the coupled and non-coupled inductor. An integrated coupled inductor based on 3-dimentional core structure is proposed to achieve high power density and provide both CM and DM impedance for the inductor current and output current. / Ph. D.

For decades, the Silicon-based semiconductors have been the solution for power electronics applications. However, these semiconductors have approached their limits of operation in blocking voltage, working temperature and switching frequency. Due to material superiority, the relatively-new wide-bandgap semiconductors such as Silicon-Carbide (SiC) MOSFETs enable higher voltages, switching frequencies and operating temperatures when compared to Silicon technology, resulting in improved converter specifications. The current study tries to investigate the impact of emerging medium-voltage SiC MOSFETs on industrial motor drive application, where over a quarter of the total electricity in the world is being consumed. Firstly, non-commercial SiC MOSFETs at 3.3 kV and 400 A rating are characterized to enable converter design and simulation based on them. In order to feature the best performance out of the devices under test, an intelligent high-performance gate driver is designed embedding required functionalities and protections. Secondly, total of three converters are targeted for industrial motor drive application at medium-voltage and high-power range. For this purpose the cascaded H-bridge, the modular multilevel converter and the 5-L active neutral point clamped converters are designed at 4.16-, 6.9- and 13.8 kV voltage ratings and 3- and 5 MVA power ratings. Selection of different voltage and power levels is done to elucidate variation of different parameters within the converters versus operating point. Later, comparisons are done between the surveyed topologies designed at different operating points based on Si IGBTs and SiC MOSFETs. The comparison includes different aspects such as efficiency, power density, semiconductor utilization, energy stored in converter structure, fault containment, low-speed operation capability and parts count (for a measure of reliability). Having the comparisons done based on simulation data, an H-bridge cell is implemented using 3.3 kV 400 A SiC MOSFETs to evaluate validity of the conducted simulations. Finally, a novel method is proposed for series-connecting individual SiC MOSFETs to reach higher voltage devices. Considering the fact that currently the SiC MOSFETs are not commercially available at voltages higher above 1.7 kV, this will enable implementation of converters using medium-voltage SiC MOSFETs that are achieved by stacking commercially-available 1.7 kV MOSFETs. The proposed method is specifically developed for SiC MOSFETs with high dv/dt rates, while majority of the existing solutions could only work merely with slow Si-based semiconductors. / Ph. D.

In the past two decades the core aircraft technology is going through a drastic change. The traditional technologies that is almost half a century old, is going through a complete revamp. In the new “More Electric Aircraft” technology many mechanical, pneumatic and hydraulic systems are being replaced by electrical and power electronic systems. Airbus-A380, Boeing B-787 are the pioneers in the family of these new breed of aircrafts. As the aircraft technology is moving towards “More Electric”, more and more electric motors and motor controllers are being used in new aircrafts. Number of electric motor drive systems has increased by about ten times in more electric aircrafts compared to traditional aircrafts. Weight of any electric component that goes into aircraft needs to be low to reduce the overall weight of aircraft so as to improve the fuel efficiency of the aircraft. Hence there is an increased need to reduce weight of motors and motor controllers in commercial aircraft. High speed ironless axial flux permanent magnet brushless dc motors are becoming popular in the new more-electric aircrafts because of their ability to meet the demand of light weight, high power density, high efficiency and high reliability. However, these motors come with very low inductance, which poses a big challenge to the motor controllers in controlling the ripple current in motor windings. Multilevel inverters can solve this problem. Three-level inverters are proposed in this thesis for driving axial flux BLDC motors in aircraft. Majority of the motors in new more electric aircrafts are in the power range of 2kW to 20kW, while a few motor applications being in the range of 100kW to 150kW. Motor controllers in these applications run from 270Vdc or 540Vdc bus which is the standard in new more electric aircraft architecture. Multilevel Inverter is popular in the industry for high power and high voltage applications, where high-voltage power switching devices like IGBT, GTO are popularly used. However multilevel inverters have not been tried in the low power range which is appropriate for aircraft applications. A detail analysis of practical feasibility of constructing three-level inverter in lower power and voltage level is presented in this thesis. Analysis is presented that verify the advantages of driving low voltage and low power (300Vdc to 600Vdc and less than 100kW) motors with multilevel inverters. Practical considerations for design of MOSFET based three-level inverter are investigated and topological modifications are suggested. The effect of clamping diodes in the diode clamped multilevel inverters play an important role in determining its efficiency. SiC diodes are proposed to be used as clamping diodes. Further, it is realised that power loss introduced by reverse recovery of MOSFET body diode prohibits use of MOSFET in hard switched inverter legs. Hence, a technique of avoiding the reverse recovery losses of MOSFET body diode in three-level NPC inverter is conceived. The use of proposed multilevel inverter topology enables operation at high switching frequency without sacrificing efficiency. High switching frequency of operation reduces the output filter requirement, which in turn helps reducing size of the inverter. In this research work elaborate trade-off analysis is done to quantify the suitability of multilevel inverters in the low power applications. For successful operation of three-level NPC inverter in aircraft electrical system, it is important for the DC bus structure in aircraft electric primary distribution system to be compatible to drive NPC inverters. Hence a detail study of AC to DC power conversion system as applied to commercial aircraft electrical system is done. Multi-pulse rectifiers using autotransformers are used in aircrafts. Investigation is done to improve these rectifiers for future aircrafts, such that they can support new technologies of future generation motor controllers. A new 24-pulse isolated transformer rectifier topology is proposed. From two 15º displaced 6-phase systems feeding two 12-pulse rectifiers that are series connected, a 24-pulse rectifier topology is obtained. Though, windings of each 12-pulse rectifiers are isolated from primary, the 6-phase generation is done without any isolation of the transformer windings. The new 24-pulse transformer topology has lower VA rating compared to standard 12-pulse rectifiers. Though the new 24-pulse transformer-rectifier solution is robust and simple, it adds to the weight of the overall system, as compared to the present architecture as the proposed topology uses isolated transformer. Non-isolated autotransformer cannot provide split voltage at the dc-link that creates a stable mid-point voltage as required by the three-level NPC inverter. Hence, a new front-end AC-DC power conversion system with switched capacitor is conceived that can support motor controllers driven by three-level inverters. Laboratory experimental results are presented to validate the new proposed topology. In this proposed topology, the inverter dc-link voltage is double the input dc-link voltage. An intense research work is performed to understand the operation of Trapezoidal Back EMF BLDC motor driven by three-Level NPC inverter. Operation of BLDC motor from three-Level inverter is primarily advantageous for low inductance motors, like ironless axial flux motors. For low inductance BLDC motor, very high switching frequency is required to limit the magnitude of ripple current in motor winding. Three-level inverters help limiting the magnitude of motor ripple current without increasing the switching frequency to very high value. Further, it is analysed that dc link mid-point current in three-level NPC inverter for driving trapezoidal BLDC motor has a zero average current with fundamental frequency same as switching frequency. Because of this, trapezoidal BLDC motors can easily be operated from three-level NPC inverter without any special attention given to mid-point voltage unbalance. One non-ideal condition arrives in practical implementation of the inverter that leads to non-zero average mid point current. Unequal gate drive dead time delays from one leg to other leg of inverter introduce dc-link mid-point voltage unbalance. For the motoring mode operation of trapezoidal BLDC motor drive, simple gate drive logic is researched that eliminates need of the gate drive dead-time, and hence solves the mid-point voltage unbalance issue. Simple closed loop control scheme for mid-point voltage balancing also is also proposed. This control scheme may be used in applications where very precise control of speed and torque ripple is warranted. All the investigations reported in this thesis are simulated extensively on MATHCAD and MATLAB platform using SIMULINK toolbox. A laboratory experimental set-up of three-Level inverter driving axial flux BLDC motor is built. The three-level inverter, operating from 300Vdc bus is built using 500V MOSFETs and 600V SiC diodes. All the control schemes are implemented digitally on digital signal processor TMS320F2812 DSP platform and GAL22V10B platforms. Experimental results are collected to validate the theoretical propositions made in the present research work. At the end, in chapter 5, some future works are proposed. A new external voltage balance circuit is proposed where the inverter dc-link voltage is same as the input dc-link voltage. This topology is based on the resonant converter principle and uses a lighter resonant inductor than prior arts available in literature. Detail simulation and experimentation of this topology may be carried out to validate the industrial benefits of this circuit. It is also thought that current source inverters may work as an alternative to voltage source inverters for driving BLDC motors. Current source inverters eliminate use of bulky DC-link capacitors. Long term reliability of current source inverters is higher than voltage source inverters due to the absence of possibility of shoot-through. Further, in voltage source inverters, the voltage at the motor terminal is limited by the source voltage (dc-link voltage). This issue is eliminated in current source inverters. An interface circuit is conceived to reduce the size of dc-link inductors in current source inverters, pending detail analysis and experimental verification. The interface circuit bases its fundamentals on the principles of operation of multilevel inverters for BLDC motors that is presented in this thesis.

Die vorliegende Arbeit befasst sich mit einem detaillierten Vergleich von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für den Einsatz in Mittelspannungsanwendungen. Im Rahmen dieser Untersuchungen wird die 3-Level Neutral Point Clamped Spannungswechselrichter Schaltungstopologie (3L-NPC VSC) sowohl mit Multilevel Flying Capacitor (FLC) als auch mit Multilevel Stacked Multicell (SMC) Schaltungstopologien verglichen, wobei unter Verwendung von aktuell verfügbaren IGBT-Modulen Stromrichterausgangsspannungen von 2.3 kV, 4.16 kV und 6.6 kV betrachtet werden. Neben der grundlegenden Funktionsweise wird die Auslegung der aktiven Leistungshalbleiter und der passiven Energiespeicher (Zwischenkreiskondensatoren, Flying Capacitors) für die untersuchten Stromrichtertopologien dargestellt. Unter Berücksichtigung verschiedener Modulationsverfahren und Schaltfrequenzen werden Kennwerte für den Oberschwingungsgehalt in der Ausgangsspannung und dem Ausgangsstrom vergleichend evaluiert. Die installierte Schalterleistungen, die Halbleiterausnutzungsfaktoren, die Stromrichterverlustleistungen sowie die Verlustleistungsverteilungen werden für die betrachteten Stromrichtertopologien detailliert gegenübergestellt und bewertet. / The thesis deals with a detailed comparison of voltage source converter topologies with a central dc-link energy storage device for medium voltage applications. The Three-Level Neutral Point Clamped Voltage Source Converter (3L-NPC VSC) is compared with multilevel Flying Capacitor (FLC) and Stacked Multicell (SMC) Voltage Source Converters (VSC) for output voltages of 2.3 kV, 4.16 kV and 6.6 kV by using state-of-the-art 6.5 kV, 3.3 kV, 4.5 kV and 1.7kV IGBTs. The fundamental functionality of the investigated converter topologies as well as the design of the power semiconductors and of the energy storage devices (Flying Capacitors and Dc-Link capacitors) is described. The installed switch power, converter losses, the semiconductor loss distribution, modulation strategies and the harmonic spectra are compared in detail.

The main focus of this thesis is on the power electronic converter system challenges associated with the grid integration of variable-renewable-energy (VRE) sources like wave, marine current, tidal, wind, solar etc. Wave energy conversion with grid integration is used as the key reference, considering its high energy potential to support the future clean energy requirements and due the availability of a test facility at Uppsala University. The emphasis is on the DC-link power conditioning and grid coupling of direct driven wave energy converters (DDWECs). The DDWEC reflects the random nature of its input energy to its output voltage wave shape. Thereby, it demands for intelligent power conversion techniques to facilitate the grid connection. One option is to improve and adapt an already existing, simple and reliable multilevel power converter technology, using smart control strategies. The proposed WECs to grid interconnection system consists of uncontrolled three-phase rectifiers, three-level boost converter(TLBC) or three-level buck-boost converter (TLBBC) and a three-level neutral point clamped (TLNPC) inverter. A new method for pulse delay control for the active balancing of DC-link capacitor voltages by using TLBC/TLBBC is presented. Duty-ratio and pulse delay control methods are combined for obtaining better voltage regulation at the DC-link and for achieving higher controllability range. The classic voltage balancing problem of the NPC inverter input, is solved efficiently using the above technique. A synchronous current compensator is used for the NPC inverter based grid coupling. Various results from both simulation and hardware testing show that the required power conditioning and power flow control can be obtained from the proposed multilevel multistage converter system. The entire control strategies are implemented in Xilinx Virtex 5 FPGA, inside National Instruments’ CompactRIO system using LabVIEW. A contour based dead-time harmonic analysis method for TLNPC and the possibilities of having various interconnection strategies of WEC-rectifier units to complement the power converter efforts for stabilizing the DC-link, are also presented. An advanced future AC2AC direct power converter system based on Modular multilevel converter (MMC) structure developed at Siemens AG is presented briefly to demonstrate the future trends in this area.

Die vorliegende Arbeit befasst sich mit einem detaillierten Vergleich von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für den Einsatz in Mittelspannungsanwendungen. Im Rahmen dieser Untersuchungen wird die 3-Level Neutral Point Clamped Spannungswechselrichter Schaltungstopologie (3L-NPC VSC) sowohl mit Multilevel Flying Capacitor (FLC) als auch mit Multilevel Stacked Multicell (SMC) Schaltungstopologien verglichen, wobei unter Verwendung von aktuell verfügbaren IGBT-Modulen Stromrichterausgangsspannungen von 2.3 kV, 4.16 kV und 6.6 kV betrachtet werden. Neben der grundlegenden Funktionsweise wird die Auslegung der aktiven Leistungshalbleiter und der passiven Energiespeicher (Zwischenkreiskondensatoren, Flying Capacitors) für die untersuchten Stromrichtertopologien dargestellt. Unter Berücksichtigung verschiedener Modulationsverfahren und Schaltfrequenzen werden Kennwerte für den Oberschwingungsgehalt in der Ausgangsspannung und dem Ausgangsstrom vergleichend evaluiert. Die installierte Schalterleistungen, die Halbleiterausnutzungsfaktoren, die Stromrichterverlustleistungen sowie die Verlustleistungsverteilungen werden für die betrachteten Stromrichtertopologien detailliert gegenübergestellt und bewertet.:Inhaltsverzeichnis Liste der Variablen i Liste der Abkürzungen v 1 Einleitung 1 2 Überblick von Mittelspannungsstromrichtertopologien und Leistungshalbleitern 3 2.1 Mittelspannungsumrichtertopologien 3 2.2 Leistungshalbleiter 8 3 Aufbau und Funktion von Mittelspannungsstromrichtertopologien 10 3.1 Neutral Point Clamped Stromrichter (NPC) 10 3.1.1 3-Level Neutral Point Clamped Stromrichter (3L-NPC) 10 3.1.2 Mehrstufige NPC-Umrichter 21 3.2 Flying Capacitor Stromrichter (FLC) 23 3.2.1 3-Level Flying Capacitor Stromrichter (3L-FLC) 23 3.2.2 4-Level Flying Capacitor-Stromrichter (4L-FLC) 33 3.2.3 Mehrstufige Flying Capacitor-Stromrichter (NL-FLC) 39 3.3 Stacked Multicell Stromrichter (SMC) 43 3.3.1 5L-Stacked Multicell Stromrichter (5L-SMC) 43 3.3.2 N-Level Stacked Multicell Umrichter (NL-SMC) 51 4 Modellierung und Auslegung der Stromrichter 59 4.1 Verlustmodell 59 4.1.1 Sperrschichttemperaturen 64 4.2 Auslegung der Leistungshalbleiter 65 4.2.1 Stromauslegung 67 4.2.2 Worst-Case Arbeitspunkte 69 4.3 Auslegung der Zwischenkreiskondensatoren 75 4.3.1 Spannungszwischenkreis 76 4.3.2 Lastseitige Strombelastung und resultierende Spannungswelligkeit im Spannungszwischenkreis 77 4.3.3 Abhängigkeit der Strombelastung und der Spannungswelligkeit im Spannungszwischenkreis vom Frequenzverhältnis mf 95 4.3.4 Netzseitige Zwischenkreiseinspeisung 97 4.3.4.1 Zwischenkreiseinspeisung mit idealisiertem Transformatormodell 98 4.3.4.2 Zwischenkreiseinspeisung mit erweitertem Transformatormodell 101 4.3.5 Simulation des Gesamtsystems 104 4.4 Auslegung der Flying Capacitors 107 4.4.1 Strombelastung der Flying Capacitors 109 4.4.2 Spannungswelligkeit über den Flying Capacitors 113 4.4.3 Abhängigkeit der Spannungswelligkeit der Flying Capacitors vom Frequenzverhältnis mf 124 4.4.4 Auswirkung der Spannungswelligkeit der Flying Capacitors auf die Ausgangsspannungen 126 5 Vergleich der Stromrichtertopologien 129 5.1 Daten für den Stromrichtervergleich 129 5.2 Basis des Vergleiches 132 5.3 Vergleich für einen 2,3 kV Mittelspannungsstromrichter 134 5.3.1 Vergleich bei verschiedenen Schaltfrequenzen 134 5.3.2 Vergleich bei maximaler Trägerfrequenz 142 5.4 Vergleich für einen 4,16 kV Mittelspannungsstromrichter 146 5.4.1 Vergleich bei verschiedenen Schaltfrequenzen 146 5.4.2 Vergleich bei maximaler Trägerfrequenz 153 5.5 Vergleich für einen 6,6 kV Mittelspannungsstromrichter 156 5.5.1 Vergleich bei verschiedenen Schaltfrequenzen 156 5.5.2 Vergleich bei maximaler Trägerfrequenz 162 5.6 Vergleich von 2,3 kV, 4,16 kV und 6,6 kV Mittelspannungsstromrichtern 165 5.6.1 Vergleich bei identischer installierter Schalterleistung SS 165 5.6.2 Vergleich bei einer identischen Ausgangsleistung 167 6 Zusammenfassung und Bewertung 171 Anhang 175 A. Halbleiterverlustmodell 175 Referenzen 177 / The thesis deals with a detailed comparison of voltage source converter topologies with a central dc-link energy storage device for medium voltage applications. The Three-Level Neutral Point Clamped Voltage Source Converter (3L-NPC VSC) is compared with multilevel Flying Capacitor (FLC) and Stacked Multicell (SMC) Voltage Source Converters (VSC) for output voltages of 2.3 kV, 4.16 kV and 6.6 kV by using state-of-the-art 6.5 kV, 3.3 kV, 4.5 kV and 1.7kV IGBTs. The fundamental functionality of the investigated converter topologies as well as the design of the power semiconductors and of the energy storage devices (Flying Capacitors and Dc-Link capacitors) is described. The installed switch power, converter losses, the semiconductor loss distribution, modulation strategies and the harmonic spectra are compared in detail.:Inhaltsverzeichnis Liste der Variablen i Liste der Abkürzungen v 1 Einleitung 1 2 Überblick von Mittelspannungsstromrichtertopologien und Leistungshalbleitern 3 2.1 Mittelspannungsumrichtertopologien 3 2.2 Leistungshalbleiter 8 3 Aufbau und Funktion von Mittelspannungsstromrichtertopologien 10 3.1 Neutral Point Clamped Stromrichter (NPC) 10 3.1.1 3-Level Neutral Point Clamped Stromrichter (3L-NPC) 10 3.1.2 Mehrstufige NPC-Umrichter 21 3.2 Flying Capacitor Stromrichter (FLC) 23 3.2.1 3-Level Flying Capacitor Stromrichter (3L-FLC) 23 3.2.2 4-Level Flying Capacitor-Stromrichter (4L-FLC) 33 3.2.3 Mehrstufige Flying Capacitor-Stromrichter (NL-FLC) 39 3.3 Stacked Multicell Stromrichter (SMC) 43 3.3.1 5L-Stacked Multicell Stromrichter (5L-SMC) 43 3.3.2 N-Level Stacked Multicell Umrichter (NL-SMC) 51 4 Modellierung und Auslegung der Stromrichter 59 4.1 Verlustmodell 59 4.1.1 Sperrschichttemperaturen 64 4.2 Auslegung der Leistungshalbleiter 65 4.2.1 Stromauslegung 67 4.2.2 Worst-Case Arbeitspunkte 69 4.3 Auslegung der Zwischenkreiskondensatoren 75 4.3.1 Spannungszwischenkreis 76 4.3.2 Lastseitige Strombelastung und resultierende Spannungswelligkeit im Spannungszwischenkreis 77 4.3.3 Abhängigkeit der Strombelastung und der Spannungswelligkeit im Spannungszwischenkreis vom Frequenzverhältnis mf 95 4.3.4 Netzseitige Zwischenkreiseinspeisung 97 4.3.4.1 Zwischenkreiseinspeisung mit idealisiertem Transformatormodell 98 4.3.4.2 Zwischenkreiseinspeisung mit erweitertem Transformatormodell 101 4.3.5 Simulation des Gesamtsystems 104 4.4 Auslegung der Flying Capacitors 107 4.4.1 Strombelastung der Flying Capacitors 109 4.4.2 Spannungswelligkeit über den Flying Capacitors 113 4.4.3 Abhängigkeit der Spannungswelligkeit der Flying Capacitors vom Frequenzverhältnis mf 124 4.4.4 Auswirkung der Spannungswelligkeit der Flying Capacitors auf die Ausgangsspannungen 126 5 Vergleich der Stromrichtertopologien 129 5.1 Daten für den Stromrichtervergleich 129 5.2 Basis des Vergleiches 132 5.3 Vergleich für einen 2,3 kV Mittelspannungsstromrichter 134 5.3.1 Vergleich bei verschiedenen Schaltfrequenzen 134 5.3.2 Vergleich bei maximaler Trägerfrequenz 142 5.4 Vergleich für einen 4,16 kV Mittelspannungsstromrichter 146 5.4.1 Vergleich bei verschiedenen Schaltfrequenzen 146 5.4.2 Vergleich bei maximaler Trägerfrequenz 153 5.5 Vergleich für einen 6,6 kV Mittelspannungsstromrichter 156 5.5.1 Vergleich bei verschiedenen Schaltfrequenzen 156 5.5.2 Vergleich bei maximaler Trägerfrequenz 162 5.6 Vergleich von 2,3 kV, 4,16 kV und 6,6 kV Mittelspannungsstromrichtern 165 5.6.1 Vergleich bei identischer installierter Schalterleistung SS 165 5.6.2 Vergleich bei einer identischen Ausgangsleistung 167 6 Zusammenfassung und Bewertung 171 Anhang 175 A. Halbleiterverlustmodell 175 Referenzen 177

Cette thèse vise à élaborer de nouvelles stratégies de commande basées sur la commande prédictive pour le système de génération d’énergie éolienne. La topologie des systèmes de production éolienne basées sur le Générateur Asynchrone à Double Alimentation (GADA) qui convient à des plateformes de génération dans la gamme de puissance de 1.5 à 6 MW est abordée. Du point de vue technologique, le convertisseur à trois niveaux et clampé par le neutre (3L-NPC) est considéré comme une bonne solution pour une puissance élevée en raison de ses avantages: capacité à réduire la distorsion harmonique de la tension de sortie et du courant, et augmentation de la capacité du convertisseur grâce à une tension réduite appliquée à chaque semi-conducteur de puissance. Une description détaillée de la commande prédictive à ensemble de commande fini (FCS-MPC) avec un horizon de prédiction de deux pas est présentée pour deux boucles de régulation: celle liée au convertisseur connecté au réseau et celle du convertisseur connecté au GADA. Le principe de la commande repose sur l’utilisation d’un modèle de prédiction permettant de prédire le comportement du système pour chaque état de commutation du convertisseur. La minimisation d’une fonction de coût appropriée prédéfinie permet d’obtenir la commutation optimale à appliquer au convertisseur. La thèse étudie premièrement les problèmes liées à la compensation du temps de calcul de la commande et au choix et aux pondérations de la fonction de coût. Ensuite, le problème de stabilité de la commande FCS-MPC est abordé en considérant une fonction de Lyapunov dans la minimisation de la fonction de coût. Finalement, une étude sur la compensation des effets des temps morts du convertisseur est présentée. / This thesis aims to elaborate new control strategies based on Model Predictive control for wind energy generation system. We addressed the topology of doubly fed induction generator (DFIG) based wind generation systems which is suitable for generation platform power in the range in 1.5-6 MW. Furthermore, from the technological point of view, the three-level neutral-point clamped (3L-NPC) inverter configuration is considered a good solution for high power due to its advantages: capability to reduce the harmonic distortion of the output voltage and current, and increase the capacity of the converter thanks to a decreased voltage applied to each power semiconductor.In this thesis, we presented a detailed description of finite control set model predictive control (FCS-MPC) with two step horizon for two control schemes: grid and DFIG connected 3L-NPC inverter. The principle of the proposed control scheme is to use system model to predict the behaviour of the system for every switching states of the inverter. Then, the optimal switching state that minimizes an appropriate predefined cost function is selected and applied directly to the inverter.The study of issues such as delay compensation, computational burden and selection of weighting factor are also addressed in this thesis. In addition, the stability problem of FCS-MPC is solved by considering the control Lyapunov function in the design procedure. The latter study is focused on the compensation of dead-time effect of power converter.