This thesis presents the design of a step-up DC-DC converter with on-chip coupled inductors. Circuit theory of DC-DC converters in general is presented, after which a mathematical model of a step up converter is developed. A circuit implementation optimized from results of the mathematical model follows. For a completely integrated step-up converter, the inductor size is reduced by increasing the frequency of operation and using a circuit topology that employs coupled inductors. Spiral inductors are also studied to achieve maximum quality factor and inductance. A fast PWM control system is used to regulate the high-frequency converter. The fabrication was done in standard TSMC 0.18-$\mu$m digital CMOS process for four circuits, including one with a conventional topology and the others with a coupled inductor topology with varying inductor geometries. Measurement results from a fabricated prototype have been presented, demonstrating the functionality of the four circuits with coupled inductors on the fabricated chip and the improvement of the coupled solution over the conventional design. It is demonstrated that the circuits with coupled inductors have a significant improvement in performance based on conversion ratio and efficiency. Finally, the design process is evaluated and recommendations are made for future work. Furthermore, a new self-oscillating and robust control system is proposed that enables simpler and more efficient regulation for high-frequency converters such as one developed for this thesis.

abstract: A workload-aware low-power neuromorphic controller for dynamic power and thermal management in VLSI systems is presented. The neuromorphic controller predicts future workload and temperature values based on the past values and CPU performance counters and preemptively regulates supply voltage and frequency. System-level measurements from stateof-the-art commercial microprocessors are used to get workload, temperature and CPU performance counter values. The controller is designed and simulated using circuit-design and synthesis tools. At device-level, on-chip planar inductors suffer from low inductance occupying large chip area. On-chip inductors with integrated magnetic materials are designed, simulated and fabricated to explore performance-efficiency trade offs and explore potential applications such as resonant clocking and on-chip voltage regulation. A system level study is conducted to evaluate the effect of on-chip voltage regulator employing magnetic inductors as the output filter. It is concluded that neuromorphic power controller is beneficial for fine-grained per-core power management in conjunction with on-chip voltage regulators utilizing scaled magnetic inductors. / Dissertation/Thesis / Ph.D. Electrical Engineering 2011

abstract: Inductors are fundamental components that do not scale well. Their physical limitations to scalability along with their inherent losses make them the main obstacle in achieving monolithic system-on-chip platform (SoCP). For past decades researchers focused on integrating magnetic materials into on-chip inductors in the quest of achieving high inductance density and quality factor (QF). The state of the art on-chip inductor is made of an enclosed magnetic thin-film around the current carrying wire for maximum flux amplification. Though the integration of magnetic materials results in enhanced inductor characteristics, this approach has its own challenges and limitations especially in power applications. The current-induced magnetic field (HDC) drives the magnetic film into its saturation state. At saturation, inductance and QF drop to that of air-core inductors, eliminating the benefits of integrating magnetic materials. Increasing the current carrying capability without substantially sacrificing benefits brought on by the magnetic material is an open challenge in power applications. Researchers continue to address this challenge along with the continuous improvement in inductance and QF for RF and power applications. In this work on-chip inductors incorporating magnetic Co-4%Zr-4%Ta -8%B thin films were fabricated and their characteristics were examined under the influence of an externally applied DC magnetic field. It is well established that spins in magnetic materials tend to align themselves in the same direction as the applied field. The resistance of the inductor resulting from the ferromagnetic film can be changed by manipulating the orientation of magnetization. A reduction in resistance should lead to decreases in losses and an enhancement in the QF. The effect of externally applied DC magnetic field along the easy and hard axes was thoroughly investigated. Depending on the strength and orientation of the externally applied field significant improvements in QF response were gained at the expense of a relative reduction in inductance. Characteristics of magnetic-based inductors degrade with current-induced stress. It was found that applying an externally low DC magnetic field across the on-chip inductor prevents the degradation in inductance and QF responses. Examining the effect of DC magnetic field on current carrying capability under low temperature is suggested. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2014

The research conducted for this thesis seeks to understand issues associated with integrating a direct spread spectrum system (DSSS) transceiver on to a single chip. Various types of sequences, such as Kasami sequences and Gold sequences, are available for use in typical spread spectrum systems. For this thesis, complex spreading sequences (CSS) are used for improved cross-correlation and autocorrelation properties that can be achieved by using such a sequence. While CSS and DSSS are well represented in the existing body of knowledge, and discrete bulky hardware solutions exist – an effort to jointly integrate CSS and DSSS on-chip was identified to be lacking. For this thesis, spread spectrum architecture was implemented focussing on sub-systems that are specific to CSS. This will be the main contribution for this thesis, but the contribution is further appended by various RF design challenges: highspeed requirements make RF circuits sensitive to the effects of parasitics, including parasitic inductance, passive component modelling, as well as signal integrity issues. The integration is first considered more ideally, using mathematical sub-systems, and then later implemented practically using complementary metal-oxide semiconductor (CMOS) technology. The integration involves mixed-signal and radio frequency (RF) design techniques – and final integration involves several specialized analogue sub-systems, such as a class F power amplifier (PA), a low-noise amplifier (LNA), and LC voltage-controlled oscillators (VCOs). The research also considers various issues related to on-chip inductors, and also considers an active inductor implementation as an option for the VCO. With such an inductor a better quality factor is achievable. While some conventional sub-system design techniques are deployed, several modifications are made to adapt a given sub-system to the design requirements for this thesis. The contribution of the research lies in the circuit level modifications done at sub-system level aimed towards eventual integration. For multiple-access communication systems, where a number of independent users are required to share a common channel, the transceiver proposed in this thesis, can contribute towards improved data rate or bit error rate. The design is completed for fabrication in a standard 0.35-μm CMOS process with minimal external components. With an active chip area of about 5 mm2, the simulated transmitter consumes about 250 mW&the receiver consumes about 200 mW. AFRIKAANS : Die navorsing wat vir hierdie tesis onderneem is, beoog om kundigheid op te bou aangaande die kwessies wat met die integrasie van ‘n direkte spreispektrumstelsel (DSSS) sender-ontvanger op ‘n enkele skyfie verband hou. Verskeie tipes sekwensies, soos byvoorbeeld Kasami- en Gold-sekwensies, is vir gebruik in tipiese spreispektrumstelsels beskikbaar. Vir hierdie tesis is komplekse spreisekwensies (KSS) gebruik vir verbeterde kruis- en outokorrelasie-eienskappe wat bereik kan word deur so ‘n sekwensie te gebruik. Alhoewel DSSS en KSS reeds welbekend is, en diskrete hardeware oplossings reeds bestaan, is die vraag na gesamentlike geïntegreerde DSSS en KSS op een vlokkie geïdentifiseer. Vir hierdie tesis is spreispektrumargitektuur aangewend met die klem op KSS substelsels. Dit is dan ook die belangrikste bydrae van hierdie tesis, maar die bydrae gaan verder gepaard met verskeie RF-ontwerpuitdagings: hoëspoed-vereistes maak RF-stroombane sensitief vir die uitwerking van parasitiese komponente, met inbegrip van parasitiese induktansie, passiewe komponentmodellering en ook seinintegriteitskwessies. Die integrasie word eerstens meer idealisties oorweeg deur wiskundige substelsels te gebruik en dan later prakties te implementeer deur komplementêre metaaloksied-halfgeleiertegnologie (CMOS) te gebruik. Die integrasie behels gemengdesein- en radiofrekwensie(RF)-ontwerptegnieke – en finale integrasie behels verskeie gespesialiseerde analoë substelsels soos ‘n klas F-kragversterker (KV), ‘n laeruis-versterker (LRV), en LC-spanningbeheerde ossileerders (SBO’s). Die navorsing oorweeg ook verskeie kwessies in verband met op-skyfie induktors en oorweeg ook ‘n aktiewe induktorimplementering as ‘n opsie vir die SBO. Met sodanige induktor is ‘n beter kwaliteitsfaktor haalbaar. Hoewel enkele konvensionele substelsel-ontwerptegnieke aangewend word, word daar verskeie wysigings aangebring om ‘n gegewe substelsel by die ontwerpvereistes vir hierdie tesis aan te pas. Die bydrae van die navorsing is hoofsaaklik die stroombaanmodifikasies wat gedoen is op substelselvlak om integrasie te vergemaklik. Vir veelvoudige-toegang kommunikasiestelsels waar ‘n aantal onafhanklike gebruikers dieselfde seinkanaal moet deel, kan die sender-ontvanger voorgestel in hierdie tesis meewerk om die datatempo en fouttempo te verbeter. Die ontwerp is voltooi vir vervaardiging in ‘n standaard 0.35-μm CMOS-proses met minimale eksterne komponente. Met ‘n aktiewe skyfie-oppervlakte van ongeveer 5 mm2, verbruik die gesimuleerde sender ongeveer 250 mW en die ontvanger verbruik ongeveer 200 mW. / Thesis (PHD)--University of Pretoria, 2011. / Electrical, Electronic and Computer Engineering / unrestricted