Yang Yi. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. / Includes bibliographical references (leaves 51-55). / Abstracts in English and Chinese. / ACKNOWLEDGEMENTS --- p.II / ABSTRACT --- p.III / 摘要 --- p.IV / CONTENTS --- p.V / Chapter CHAPTER 1: --- INTRODUCTION --- p.1 / Chapter 1.1. --- Modulation Formats in Optical Communication SYSTEMS --- p.2 / Chapter 1.1.1 --- Optical ASK Format --- p.3 / Chapter 1.1.2 --- Optical FSK Format --- p.4 / Chapter 1.1.3 --- Optical PSK Format --- p.5 / Chapter 1.1.4 --- Optical Orthogonal Modulation --- p.7 / Chapter 1.2. --- All-Optical Packet Switching --- p.8 / Chapter 1.2.1 --- AOLS Using Subcarrier Labels --- p.9 / Chapter 1.2.2 --- Serial Labels --- p.10 / Chapter 1.2.3 --- Orthogonal Modulated Labels --- p.12 / Chapter 1.3. --- Optical Supervisory Control --- p.13 / Chapter 1.3.1 --- OXC Supervisory Schemes --- p.13 / Chapter 1.3.2 --- Optical A mplifier Supervisory Schemes --- p.14 / Chapter 1.3.3 --- Optical Supervisory Schemes for Transmission Networks --- p.15 / Chapter 1.4. --- Thesis Organization --- p.16 / Chapter CHAPTER 2: --- PREVIOUS STUDIES ON OPTICAL ORTHOGONAL MODULATION….… --- p.17 / Chapter 2.1. --- Orthogonal Modulation Used in STARNET --- p.17 / Chapter 2.2. --- AOLS in IP-over-WDM Networks Employing Orthogonal Modulation --- p.18 / Chapter 2.2.1 --- DPSK Labels on ASK Payload --- p.18 / Chapter 2.2.2 --- FSK Labels on ASK Payload --- p.20 / Chapter 2.2.3 --- Experimental Result of ASK/DPSK Label Swapping --- p.21 / Chapter 2.3. --- Quaternary Optical ASK-DPSK Modulation --- p.22 / Chapter 2.4. --- Conclusion --- p.23 / Chapter CHAPTER 3: --- OPTICAL DPSK/ASK ORTHOGONAL MODULATION SCHEME --- p.24 / Chapter 3.1. --- motivation --- p.24 / Chapter 3.2. --- Proposed Optical DPSK/ASK Orthogonal Modulation Scheme --- p.25 / Chapter 3.3. --- DPSK/ASK orthogonal modulation modules --- p.26 / Chapter 3.4. --- Numerical Simulations --- p.27 / Chapter 3.4.1 --- Mathematical Model of DPSK/ASK Signal --- p.28 / Chapter 3.4.2 --- Simulation Model --- p.31 / Chapter 3.4.3 --- Simulation Results --- p.32 / Chapter 3.5. --- Experimental Demonstration --- p.34 / Chapter 3.5.1 --- Experimental Setup --- p.34 / Chapter 3.5.2 --- Experimental Results --- p.36 / Chapter 3.6. --- transmission experiment --- p.38 / Chapter 3.7. --- Supervisory Information Dissemination Using DPSK/ASK Orthogonal Modulation --- p.41 / Chapter 3.8. --- Label Swapping Experiment and Results --- p.42 / Chapter 3.8.1 --- Experiment Setup --- p.42 / Chapter 3.8.2 --- Experiment Results --- p.45 / Chapter CHAPTER 4: --- CONCLUSION --- p.48 / Chapter 4.1. --- Thesis Summary --- p.48 / Chapter 4.2. --- Future Work --- p.49 / LIST OF PUBLICATIONS --- p.50 / REFERENCES --- p.51

Deng Yun. / Thesis submitted in: July 2003. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. / Includes bibliographical references (leaves 54-56). / Abstracts in English and Chinese. / Acknowledgments --- p.ii / 摘要 --- p.iii / Abstract --- p.v / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Optical Switching --- p.1 / Chapter 1.1.1 --- Optical Circuit Switching --- p.2 / Chapter 1.1.2 --- Optical Packet Switching --- p.3 / Chapter 1.1.3 --- Optical Burst Switching --- p.4 / Chapter 1.2 --- Design of Optical Burst Switching Node --- p.8 / Chapter 1.2.1 --- Burst Switched Network Architecture --- p.8 / Chapter 1.2.2 --- Design of Optical Burst Switching Node --- p.10 / Chapter 1.2.3 --- Scalable Architecture With Multi-plane Fabric --- p.12 / Chapter 1.3 --- Organization --- p.13 / Chapter Chapter 2 --- Proposed OBS Node and Blocking probability due to Output Contention --- p.14 / Chapter 2.1 --- OBS Node Architecture --- p.14 / Chapter 2.2 --- Burst Traffic Model --- p.16 / Chapter 2.3 --- Blocking Probability due to Output Contention --- p.17 / Chapter 2.4 --- Poisson Approximation of Burst Traffic --- p.19 / Chapter 2.5 --- Simulation Results --- p.21 / Chapter Chapter 3 --- Deflection Routed Switch Based on Shuffle-exchange network and Burst Loss Rate due to Insufficient Number of Stages --- p.22 / Chapter 3.1 --- Architecture of Shuffle-exchange Network --- p.22 / Chapter 3.2 --- The traffic loading entering into the second stage --- p.23 / Chapter 3.3 --- The Deflection Probability in a 2x2 Switching Module of SN --- p.26 / Chapter 3.4 --- Analysis of Burst Loss Rate due to Insufficient Number of Stages in SN --- p.27 / Chapter 3.5 --- Total Burst Loss Probability --- p.30 / Chapter 3.6 --- Multi-plane Architecture --- p.32 / Chapter 3.6.1 --- Relationship between k and loading of SN --- p.33 / Chapter 3.6.2 --- Relationship between k and n: Log2(Number of input-output ports) --- p.36 / Chapter 3.6.3 --- The result of appropriate number of planes k --- p.38 / Chapter Chapter 4 --- Switch Based on Dual Shuffle-exchange network and Comparison with Shuffle-exchange network --- p.40 / Chapter 4.1 --- Architecture of Dual Shuffle-exchange Network --- p.40 / Chapter 4.2 --- The deflection Probability in a 4x4 Switching Module of DSN --- p.41 / Chapter 4.3 --- Burst Loss Rate due to Insufficient Number of Stages of DSN --- p.43 / Chapter 4.4 --- Comparison of SN and DSN --- p.45 / Chapter 4.4.1 --- Comparison with different n --- p.47 / Chapter 4.4.2 --- Comparison with different loading --- p.48 / Chapter 4.4.3 --- The result of comparison --- p.49 / Chapter Chapter 5 --- Conclusions --- p.50 / Chapter 5.1 --- The Burst Loss Probability of Proposed OBS Based on SN --- p.51 / Chapter 5.2 --- The multi-plane Fabric with appropriate number of planes k --- p.51 / Chapter 5.3 --- Performance of OBS Design Based on DSN and Comparison of SN and DSN --- p.52 / Bibliography --- p.54

Wong Kar Yiu. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. / Includes bibliographical references (leaves 109-111). / Abstracts in English and Chinese. / Abstract --- p.ii / Acknowledgement --- p.iv / Table of Contents --- p.v / List of Figure --- p.vii / Chapter Chapter 1. --- Introduction --- p.9 / Chapter 1.1 --- Introduction --- p.9 / Chapter 1.2 --- Background --- p.11 / Chapter 1.3 --- Ant Colony Optimization (ACO) --- p.15 / Chapter 1.4 --- Main contribution --- p.16 / Chapter 1.5 --- Thesis organization --- p.18 / Chapter Chapter 2. --- Related Work --- p.19 / Chapter 2.1 --- Multicast routing in general --- p.19 / Chapter 2.2 --- Multicast routing techniques --- p.22 / Chapter 2.3 --- Best-effort multicast routing --- p.25 / Chapter 2.4 --- Quality-of-Service (QoS) multicast routing --- p.30 / Chapter 2.5 --- Adaptive multicast routing --- p.34 / Chapter Chapter 3. --- Load-Sensitive Multicast Routing Protocol (LSMRP) --- p.37 / Chapter 3.1 --- Overview --- p.37 / Chapter 3.2 --- Problem Formulation --- p.37 / Chapter 3.3 --- Types of ant in LSMRP --- p.39 / Chapter 3.3.1 --- Forward Ants --- p.39 / Chapter 3.3.2 --- Random Ants --- p.41 / Chapter 3.3.3 --- Backward Ants --- p.42 / Chapter 3.3.4 --- Multicast Ants --- p.44 / Chapter 3.3.5 --- Multicast Backward Ants --- p.44 / Chapter 3.4 --- Global Algorithm --- p.47 / Chapter 3.4.1 --- Pheromone trails stage --- p.50 / Chapter 3.4.2 --- Multicast tree stage --- p.53 / Chapter 3.4.3 --- Routing table --- p.56 / Chapter 3.4.4 --- Messages Exchange and Mechanisms --- p.57 / Chapter 3.4.5 --- mapping --- p.58 / Chapter 3.4.6 --- Members join --- p.59 / Chapter 3.4.7 --- Members update --- p.59 / Chapter 3.4.8 --- Members leave --- p.61 / Chapter Chapter 4. --- Analysis of LSMRP --- p.63 / Chapter 4.1 --- Analysis of pheromone trail values --- p.63 / Chapter Chapter 5. --- Evaluation and Experimental Results --- p.80 / Chapter 5.1 --- System model --- p.80 / Chapter 5.2 --- Result --- p.84 / Chapter 5.2.1 --- Packets received --- p.84 / Chapter 5.2.2 --- Throughput --- p.86 / Chapter 5.2.3 --- Packet Loss --- p.98 / Chapter Chapter 6. --- Conclusion --- p.107 / Chapter 6.1 --- Future work/ open question --- p.107 / References --- p.109

Deng Ning. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. / Includes bibliographical references (leaves 62-65). / Abstracts in English and Chinese. / ABSTRACT --- p.iii / 摘要 --- p.v / Chapter 1 --- BACKGROUND AND INTRODUCTION --- p.1 / Chapter 1.1 --- Optical Frequency-Shift Keying (FSK) --- p.1 / Chapter 1.1.1 --- Basic concepts and research hotspots of optical FSK --- p.1 / Chapter 1.1.2 --- Optical FSK Transmitter and Receiver --- p.3 / Chapter 1.2 --- Wavelength Division Multiplexing Optical Passive Networks --- p.8 / Chapter 1.3 --- Optical Label Switching (OLS) Networks --- p.10 / Chapter 1.4 --- Thesis Contribution and Organization --- p.11 / Chapter 2 --- DATA RE-MODULATION ON DOWNSTREAM OPTICAL FSK SIGNALS IN WDM-PONS --- p.12 / Chapter 2.1 --- overview of related works --- p.12 / Chapter 2.2 --- PON ARCHITIiCTURE USING DOWNSTREAM OPTICAL FSK SIGNALS --- p.13 / Chapter 2.3 --- CLS PON DEMONSTRATION USING THREE DIFFERENT OPTICAL FSK TRANSMITTERS --- p.14 / Chapter 2.3.1 --- With an optical FSK transmitter based on direct modulation in a DFB laser --- p.14 / Chapter 2.3.2 --- With an optical FSK transmitter based on complementary intensity modulation --- p.17 / Chapter 2.3.3 --- With our proposed optical FSK transmitter based on phase modulation --- p.21 / Chapter 2.4 --- System Performance by Using Phase Modulation Based FSK Transmitter…… --- p.26 / Chapter 2.4.1 --- Wavelength detune of light sources --- p.27 / Chapter 2.4.2 --- Detune of the DI frequency response --- p.29 / Chapter 2.4.3 --- Dispersion tolerance --- p.30 / Chapter 2.5 --- Summary --- p.32 / Chapter 3 --- INTENSITY-MODULATED LABELLING ON OPTICAL FSK OR DPSK PAYLOADS IN OLS NETWORKS --- p.34 / Chapter 3.1 --- Existing Labelling Schemes and Their Features --- p.34 / Chapter 3.1.1 --- Bit serial labelling --- p.35 / Chapter 3.1.2 --- Subcarrier multiplexed (SCM) labelling --- p.36 / Chapter 3.1.3 --- Orthogonally modulated labelling --- p.37 / Chapter 3.2 --- The Proposed 00K Labelling Scheme and OLS System Architecture --- p.38 / Chapter 3.3 --- All-Optical Label Swapping and Other Critical Issues --- p.39 / Chapter 3.4 --- System demonstration --- p.40 / Chapter 3.5 --- Summary --- p.45 / Chapter 4 --- PERFORMANCE CHARACTERIZATION OF THE ASK/FSK AND ASK/DPSK ORTHOGONAL SIGNALS --- p.46 / Chapter 4.1 --- Introduction and Formulation --- p.46 / Chapter 4.2 --- Theoretical Analysis --- p.48 / Chapter 4.2.1 --- Optical ASK performance in orthogonal signals --- p.48 / Chapter 4.2.2 --- Optical FSK performance in ASK/FSK signals --- p.49 / Chapter 4.2.3 --- Optical DPSK performance in ASK/DPSK signals --- p.51 / Chapter 4.3 --- Analytical and Experimental Results --- p.55 / Chapter 4.4 --- Conclusion --- p.57 / Chapter 5 --- SUMMARY --- p.58 / Chapter 5.1 --- Thesis Summary --- p.58 / Chapter 5.2 --- Future Work --- p.59 / LIST OF PUBLICATIONS --- p.61 / REFERENCES --- p.62

by Yee Ka Chi. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1997. / Includes bibliographical references (leaves 101-[106]). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Background --- p.1 / Chapter 1.1.1 --- Large Scale Switch Interconnections --- p.2 / Chapter 1.1.2 --- Multichannel Switching and Resequencing --- p.6 / Chapter 1.1.3 --- Scheduling --- p.7 / Chapter 2 --- Hierarchical Banyan Switch Interconnection --- p.12 / Chapter 2.1 --- Introduction --- p.12 / Chapter 2.2 --- Switch Architecture --- p.13 / Chapter 2.3 --- Switch Operation --- p.19 / Chapter 2.3.1 --- Call Setup --- p.19 / Chapter 2.3.2 --- Cell Routing --- p.21 / Chapter 2.3.3 --- Fault Tolerance --- p.27 / Chapter 2.4 --- Call Blocking Analysis --- p.28 / Chapter 2.4.1 --- Dilated Banyan --- p.29 / Chapter 2.4.2 --- Dilated Benes Network --- p.30 / Chapter 2.4.3 --- HBSI --- p.30 / Chapter 2.5 --- Results and Discussions --- p.31 / Chapter 2.6 --- Summary --- p.37 / Chapter 3 --- Multichannel Switching and Resequencing --- p.40 / Chapter 3.1 --- Introduction --- p.40 / Chapter 3.2 --- Channel Assignment --- p.41 / Chapter 3.2.1 --- VC-Based Channel Allocation Mechanism --- p.41 / Chapter 3.2.2 --- Port-Based Channel Allocation Mechanism --- p.45 / Chapter 3.2.3 --- Trunk-Based Channel Allocation Mechanism --- p.46 / Chapter 3.3 --- Resequencer --- p.50 / Chapter 3.3.1 --- Resequencing Algorithm --- p.50 / Chapter 3.4 --- Results and Discussion --- p.55 / Chapter 3.5 --- Summary --- p.60 / Chapter 4 --- Scheduling --- p.62 / Chapter 4.1 --- Introduction --- p.62 / Chapter 4.2 --- Virtual Clock Scheduling (VCS) --- p.62 / Chapter 4.3 --- Gated Virtual Clock Scheduling (GVCS) --- p.70 / Chapter 4.4 --- Time-Priority Model --- p.75 / Chapter 4.5 --- Programmable Rate-based Scheduler (PRS) --- p.80 / Chapter 4.6 --- Integration with Resequencer --- p.83 / Chapter 4.7 --- Results and Discussions --- p.86 / Chapter 4.8 --- Summary --- p.96 / Chapter 5 --- Conclusion --- p.99 / Bibliography --- p.101

Master of Engineering by Research / Service-level-agreement (SLA) monitoring measures network Quality-of-Service (QoS) parameters to evaluate whether the service performance complies with the SLAs. It is becoming increasingly important for both Internet service providers (ISPs) and their customers. However, the rapid expansion of the Internet makes SLA monitoring a challenging task. As an efficient method to reduce both complexity and overheads for QoS measurements, sampling techniques have been used in SLA monitoring systems. In this thesis, I conduct a comprehensive study of sampling methods for network QoS measurements. I develop an efficient sampling strategy, which makes the measurements less intrusive and more efficient, and I design a network performance monitoring software, which monitors such QoS parameters as packet delay, packet loss and jitter for SLA monitoring and verification. The thesis starts with a discussion on the characteristics of QoS metrics related to the design of the monitoring system and the challenges in monitoring these metrics. Major measurement methodologies for monitoring these metrics are introduced. Existing monitoring systems can be broadly classified into two categories: active and passive measurements. The advantages and disadvantages of both methodologies are discussed and an active measurement methodology is chosen to realise the monitoring system. Secondly, the thesis describes the most common sampling techniques, such as systematic sampling, Poisson sampling and stratified random sampling. Theoretical analysis is performed on the fundamental limits of sampling accuracy. Theoretical analysis is also conducted on the performance of the sampling techniques, which is validated using simulation with real traffic. Both theoretical analysis and simulation results show that the stratified random sampling with optimum allocation achieves the best performance, compared with the other sampling methods. However, stratified sampling with optimum allocation requires extra statistics from the parent traffic traces, which cannot be obtained in real applications. In order to overcome this shortcoming, a novel adaptive stratified sampling strategy is proposed, based on stratified sampling with optimum allocation. A least-mean-square (LMS) linear prediction algorithm is employed to predict the required statistics from the past observations. Simulation results show that the proposed adaptive stratified sampling method closely approaches the performance of the stratified sampling with optimum allocation. Finally, a detailed introduction to the SLA monitoring software design is presented. Measurement results are displayed which calibrate systematic error in the measurements. Measurements between various remote sites have demonstrated impressively good QoS provided by Australian ISPs for premium services.

Due to the rapid growth of wireless technology, there has been a growing interest in the capabilities of ad hoc networks connecting mobile phones, PDAs and laptop computers. The distributed and self-configurable capabilities of ad hoc networks make them very attractive for some applications such as tactical communication for military, search and rescue mission, disaster recovery, conferences, lectures, etc. In this thesis, we describe several new time scheduling algorithms for multihop packet radio networks; MaxThrou, MinDelay, ECTS (Energy Conserving Transmission Scheduling) and LA-TSMA (Location-Aided Time-Spread Multiple-Access). The MaxThrou and MinDelay algorithms focus on maximizing the system throughput and minimizing the delay bound by using constant weight codes. In these algorithms, each mobile host is assigned a word from an appropriate constant weight code of length n, distance d and weight w. The host can send a message at the j[superscript th] slot provided the assigned code has a 1 in this j[superscript th] bit. The MaxThrou and MinDelay scheduling algorithms are better than the previously known algorithms in terms of the minimum throughput per node and/or the delay bound. Since most of mobile hosts are operated using the scarce battery, and the battery life is not expected to increase significantly in the near future, energy efficiency is a critical issue in ad hoc networks. The ECTS algorithm conserves the power using strategies that allow the network interface to use the low power sleep mode instead of the idle mode, and also eliminates data collisions by introducing Request-To-Send (RTS) and Clear-To-Send (CTS) control slots. Simulation study shows that the ECTS algorithm outperforms previously known protocols. Due to the increasing popularity of mobile networking systems, the scalability becomes a significant new challenge for ad hoc network protocols. To provide a scalable solution for mobile ad hoc networks, we introduce the LA-TSMA algorithm. Instead of assigning a globally unique TSV to each host as done in previous topology-transparent scheduling algorithms, the proposed algorithm assigns a locally unique TSV to each host. In LA-TSMA, a territory is divided into zones, and the mobile hosts located in different zones can be assigned the same TSV. / Graduation date: 2003

Network Processor Units (NPUs) are a compromise between software-based and hardwired packet processing solutions. While slower than hardwired solutions, NPUs have the flexibility of software-based solutions, allowing them to adapt faster to changes in network protocols. <br /><br /> Network processors have multiple processing engines so that multiple packets can be processed simultaneously within the NPU. In addition, each of these processing engines is multi-threaded, with special hardware support built in to alleviate some of the cost of concurrency. This hardware design allows the NPU to handle multiple packets concurrently, so that while one thread is waiting for a memory access to complete, another thread can be processing a different packet. By handling several packets simultaneously, an NPU can achieve similar processing power as traditional packet processing hardware, but with greater flexibility. <br /><br /> The flexibility of network processors is also one of the disadvantages associated with them. Programming a network processor requires an in-depth understanding of the hardware as well as a solid foundation in concurrent design and programming. This thesis explores the challenges of programming a network processor, the Intel IXP2400, using a single-threaded packet scheduling algorithm as a sample case. The algorithm used is a GPS approximation scheduler with constant time execution. The thesis examines the process of implementing the algorithm in a multi-threaded environment, and discusses the scalability and load-balancing aspects of such an algorithm. In addition, optimizations are made to the scheduler implementation to improve the potential concurrency. The synchronization primitives available on the network processor are also examined, as they play a significant part in minimizing the overhead required to synchronize memory accesses by the algorithm.

Network Processor Units (NPUs) are a compromise between software-based and hardwired packet processing solutions. While slower than hardwired solutions, NPUs have the flexibility of software-based solutions, allowing them to adapt faster to changes in network protocols. <br /><br /> Network processors have multiple processing engines so that multiple packets can be processed simultaneously within the NPU. In addition, each of these processing engines is multi-threaded, with special hardware support built in to alleviate some of the cost of concurrency. This hardware design allows the NPU to handle multiple packets concurrently, so that while one thread is waiting for a memory access to complete, another thread can be processing a different packet. By handling several packets simultaneously, an NPU can achieve similar processing power as traditional packet processing hardware, but with greater flexibility. <br /><br /> The flexibility of network processors is also one of the disadvantages associated with them. Programming a network processor requires an in-depth understanding of the hardware as well as a solid foundation in concurrent design and programming. This thesis explores the challenges of programming a network processor, the Intel IXP2400, using a single-threaded packet scheduling algorithm as a sample case. The algorithm used is a GPS approximation scheduler with constant time execution. The thesis examines the process of implementing the algorithm in a multi-threaded environment, and discusses the scalability and load-balancing aspects of such an algorithm. In addition, optimizations are made to the scheduler implementation to improve the potential concurrency. The synchronization primitives available on the network processor are also examined, as they play a significant part in minimizing the overhead required to synchronize memory accesses by the algorithm.

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