Este trabalho apresenta um estudo de controladores repetitivos e ressonantes-repetitivos aplicados a fontes ininterruptas de energia (UPSs, do termo em inglês, Uninterruptible Power Supplies). Primeiramente, o desempenho dos controladores repetitivos é analisado a partir das exigências e dos procedimentos de testes definidos pela norma IEC 62040-3. A partir destes resultados, são discutidas as principais causas para o erro de seguimento de um sinal de referência e é avaliado o impacto de metodologias de correção aplicadas na função de transferência do controlador repetitivo. No contexto dos controladores ressonantes-repetitivos duas topologias são analisadas: a primeira é composta por um controlador ressonante sintonizado na frequência fundamental do sinal a ser seguido em paralelo com um controlador repetitivo sintonizado na mesma frequência; a segunda topologia é composta pelo mesmo paralelo entre os controladores ressonante e repetitivo, mas um filtro complementar é adicionado em série com o controlador repetitivo visando alocar a operação de cada controlador em faixas de frequências distintas. Então uma variação do controlador ressonante-repetitivo com filtro é proposta, na qual o filtro é utilizado para corrigir a fase do laço do controlador repetitivo e consequentemente aumentar a magnitude nas frequências de interesse. A partir desta estrutura proposta, uma representação no espaço de estados do sistema em malha fechada é obtida e o projeto do controlador é realizado através da solução de um problema de otimização com restrições na forma de Desigualdades Matriciais Lineares (do inglês, Linear Matrix Inequalities - LMIs). Resultados de simulação utilizando Matlab/PSIM são apresentados para demostrar a melhoria de desempenho do sistema com o controlador proposto. / This work presents a study of repetitive and resonant-repetitive controllers applied to Uninterruptible Power Supplies (UPSs). First, the performance of repetitive controllers is analyzed in terms of requirements and test procedures defined in the IEC 62040-3 standard. From these results the main causes of the reference tracking error are discussed and the impact of correction methodologies applied to repetitive controller transfer function is evaluated. In the context of the resonant-repetitive controllers two topologies are analyzed: the first is composed of a resonant controller tuned to the fundamental frequency of the signal to be followed in parallel with a repetitive controller tuned to the same frequency; the second topology is composed of the same parallel connection between the resonant and the repetitive controllers but a complementary filter is added in series with the repetitive controller aiming to restrict each controller action to different frequency bands. Then a variation of the resonant-repetitive controller with a filter is proposed, in which the filter is used to correct the phase of the repetitive controller loop and consequently increase the magnitude at the frequencies of interest. From this proposed structure, a state space model representing the closed loop system is obtained and the controller design is carried out by the solution of an optimization problem based on LMI (Linear Matrix Inequality) constraints. Simulation results in Matlab/PSIM are presented to demonstrate the improvement on system performance with the proposed controller.

Este trabalho apresenta um estudo de controladores repetitivos e ressonantes-repetitivos aplicados a fontes ininterruptas de energia (UPSs, do termo em inglês, Uninterruptible Power Supplies). Primeiramente, o desempenho dos controladores repetitivos é analisado a partir das exigências e dos procedimentos de testes definidos pela norma IEC 62040-3. A partir destes resultados, são discutidas as principais causas para o erro de seguimento de um sinal de referência e é avaliado o impacto de metodologias de correção aplicadas na função de transferência do controlador repetitivo. No contexto dos controladores ressonantes-repetitivos duas topologias são analisadas: a primeira é composta por um controlador ressonante sintonizado na frequência fundamental do sinal a ser seguido em paralelo com um controlador repetitivo sintonizado na mesma frequência; a segunda topologia é composta pelo mesmo paralelo entre os controladores ressonante e repetitivo, mas um filtro complementar é adicionado em série com o controlador repetitivo visando alocar a operação de cada controlador em faixas de frequências distintas. Então uma variação do controlador ressonante-repetitivo com filtro é proposta, na qual o filtro é utilizado para corrigir a fase do laço do controlador repetitivo e consequentemente aumentar a magnitude nas frequências de interesse. A partir desta estrutura proposta, uma representação no espaço de estados do sistema em malha fechada é obtida e o projeto do controlador é realizado através da solução de um problema de otimização com restrições na forma de Desigualdades Matriciais Lineares (do inglês, Linear Matrix Inequalities - LMIs). Resultados de simulação utilizando Matlab/PSIM são apresentados para demostrar a melhoria de desempenho do sistema com o controlador proposto. / This work presents a study of repetitive and resonant-repetitive controllers applied to Uninterruptible Power Supplies (UPSs). First, the performance of repetitive controllers is analyzed in terms of requirements and test procedures defined in the IEC 62040-3 standard. From these results the main causes of the reference tracking error are discussed and the impact of correction methodologies applied to repetitive controller transfer function is evaluated. In the context of the resonant-repetitive controllers two topologies are analyzed: the first is composed of a resonant controller tuned to the fundamental frequency of the signal to be followed in parallel with a repetitive controller tuned to the same frequency; the second topology is composed of the same parallel connection between the resonant and the repetitive controllers but a complementary filter is added in series with the repetitive controller aiming to restrict each controller action to different frequency bands. Then a variation of the resonant-repetitive controller with a filter is proposed, in which the filter is used to correct the phase of the repetitive controller loop and consequently increase the magnitude at the frequencies of interest. From this proposed structure, a state space model representing the closed loop system is obtained and the controller design is carried out by the solution of an optimization problem based on LMI (Linear Matrix Inequality) constraints. Simulation results in Matlab/PSIM are presented to demonstrate the improvement on system performance with the proposed controller.

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With the increased interest in applying Power Factor Correction (PFC) to off-line AC-DC converters, the field of integrated, single-stage PFC converter development has attracted wide attention. Considering the tens of millions of low-to-medium power supplies manufactured each year for today's rechargeable equipment, the expected reduction in cost by utilizing advanced technologies is significant. To date, only a few single-stage topologies have made it to the market due to the inherit limitations in this structure. The high voltage and current stresses on the components led to reduced efficiency and an increased failure rate. In addition, the component prices tend to increase with increased electrical and thermal requirements, jeopardizing the overarching goal of price reduction. The absence of dedicated control circuitry for each stage complicates the power balance in these converters, often resulting in an oversized bus capacitance. These factors have impeded widespread acceptance of these new techniques by manufacturers, and as such single stage PFC has remained largely a drawing board concept. This dissertation will present an in-depth study of innovative solutions that address these problems directly, rather than proposing more topologies with the same type of issues. The direct energy transfer concept is analyzed and presented as a promising solution for the majority of the single-stage PFC converter limitations. Three topologies are presented and analyzed based on this innovative structure. To complete the picture, the dynamics of a variety of single-stage converters can be analyzed using a proposed switched transformer model.

Este trabalho apresenta um estudo da discretização de controladores ressonantes aplicados a fontes ininterruptas de energia (UPSs, do termo em inglês, Uninterruptible Power Suppllies). Primeiramente, diferentes métodos de discretização serão considerados na obtenção de um modelo em tempo discreto da UPS. Além disso, estes métodos serão comparados do ponto de vista frequencial para a definição da formulação do controlador ressonante a ser utilizado. Então, uma metodologia de projeto robusto do controlador ressonante em tempo discreto é proposta a partir de uma representação em espaço de estados do sistema em malha fechada e os parâmetros do controlador são obtidos através da solução de um problema de otimização convexa sujeito a restrições na forma de Desigualdades Matriciais Lineares (do inglês, Linear Matrix Inequalities - LMIs). A estratégia proposta foi validada por meio de resultados de simulação e experimentais obtidos com um inversor comercial de 3,5 kVA considerando os critérios estabelecidos na norma IEC 62040-3. Nestas condições, demonstrara-se um desempenho melhor do que os obtidos com a discretização do controlador projetado em tempo contínuo, sobretudo quando consideradas frequências de amostragem menores. / This work presents a study about discrete-time resonant controllers applied to uninterruptible power supplies (UPSs). First, different discretization methods are considered to obtain an equivalent UPS discrete-time model. Moreover, these methods are compared in the frequency domain in order to define the resonant controller structure to be employed. Then, a robust design methodology to the discrete-time resonant controller is proposed using a state-space representation of the closed-loop system and the controller parameters are obtained by solving a convex optimization problem subject to constraints in the form of Linear Matrix Inequalities (LMIs). The proposed strategy was validated by means of simulation and experimental results obtained with a 3.5 kVA commercial inverter taking into account the IEC 62040-3 norm requirements. In this conditions, a better performance was achieved than those obtained through discretization of a continuous-time controller, especially when considering smaller sampling frequencies.

Switched-Capacitor Converters (SCC) suffer from a fundamental power loss deficiency which make their use in some applications prohibitive. The power loss is due to the inherent energy dissipation when SCC operate between or outside their output target voltages. This drawback was alleviated in this work by developing two new classes of SCC providing binary and arbitrary resolution of closely spaced target voltages. Special attention is paid to SCC topologies of binary resolution. Namely, SCC systems that can be configured to have a no-load output to input voltage ratio that is equal to any binary fraction for a given number of bits. To this end, we define a new number system and develop rules to translate these numbers into SCC hardware that follows the algebraic behavior. According to this approach, the flying capacitors are automatically kept charged to binary weighted voltages and consequently the resolution of the target voltages follows a binary number representation and can be made higher by increasing the number of capacitors (bits). The ability to increase the number of target voltages reduces the spacing between them and, consequently, increases the efficiency when the input varies over a large voltage range. The thesis presents the underlining theory of the binary SCC and its extension to the general radix case. Although the major application is in step-down SCC, a simple method to utilize these SCC for step-up conversion is also described, as well as a method to reduce the output voltage ripple. In addition, the generic and unified model is strictly applied to derive the SCC equivalent resistor, which is a measure of the power loss. The theoretical predictions are verified by simulation and experimental results.

The objective of the proposed research is to investigate the design of Self-Aware Radio Frequency Circuits and Wireless Communication Systems that can adapt to environmental and process variations to always operate at minimum power levels possible, extending battery life. The explosive growth of portable battery operated devices has mandated design of low power circuits and systems to prolong battery life. These devices fabricated in modern nanoscale CMOS technologies suffer from severe process variation due to the reduced controllability of the fabrication process, causing yield loss. This calls for integrated low power and process tolerant design techniques, or design of systems that can adapt to its process and environment to maintain its performance while minimizing power consumption. Currently, most of the wireless circuits are designed to meet minimum quality-of-service requirements under worst-case wireless link conditions (interference, noise, multi-path effects), leading to high power consumption when the channel is better than worst-case. In this research, we develop a multi-dimensional adaptation approach for wireless transmitters and receivers that optimally trades-off power vs. performance across temporally changing operating conditions by concurrently tuning control parameters in the RF front end to lower power consumption. Tunable circuits (e.g. LNA) with built-in tuning knobs providing independent controllability of important specifications allow optimal adaptation. Process sensing using intelligent test and calibration facilitates yield improvement and the design of process tolerant environment adaptive systems. Low cost testing methodologies are developed for identification of the health of the wireless circuit/system. These are used in conjunction with tuning algorithms that tune a wireless system under process variation to meet performance specifications and recover yield loss. This testing and adaptation is performed once during the post manufacture test/tune phase to compensate for manufacturing variations. This can also be applied periodically during in field operation of a device to account for performance degradation due to ageing. Finally, process tolerant environment adaptive systems are designed.

Energy-efficient radio frequency (RF) power amplifiers (PAs) are critical and paramount to achieve longer battery life in state-of-the-art portable systems because they typically determine and dominate the power consumption of such devices. In this dissertation, a high-efficiency, linear RF PA with a dynamically adaptive supply and bias current control for code division multiple access (CDMA) and wideband CDMA (WCDMA) is conceived, simulated, and experimentally demonstrated with a discrete PCB-level design and in integrated circuit (IC) form. The PA efficiency is improved by dynamically adjusting both its supply voltage and bias current, there by minimizing its quiescent power dissipation. The PA supply voltage is derived from the battery by a noninverting, synchronous buck-boost switching regulator because of its flexible functionality and high efficiency. Adjusting the PA supply voltage and bias current by tracking the output power, instead of following the complete envelope in large baseband bandwidth wireless applications, is achieved by a converter with a lower switching frequency and consequently higher light-load efficiency, which translates to prolonged battery life. A discrete PCB-level prototype of the proposed system with 915 MHz center frequency, CDMA IS-95 signal having 27-dBm peak-output power resulted in more than four times improvement in the average efficiency compared to a fixed-supply class-AB PA while meeting the required performance specifications. In the IC solution fabricated in AMIs 0.5-micron CMOS process through MOSIS, a dual-mode, buck-boost converter with pulse-width modulation (PWM) control for high power and pulse-frequency modulation (PFM) for low power is designed and implemented to improve the PA efficiency during active and standby operation, respectively. The performance of the dynamically adaptive supply and bias control IC was validated by realizing a 25-dBm, 1.96 GHz center frequency, WCDMA PA over an input supply range of 1.4 4.2 V. The PA with dual-mode power supply and bias control IC showed an average-efficiency improvement of seven times compared to a fixed-supply class-AB PA, which translates to five times improvement in battery life assuming the PA is active for 2 % of the total time and in standby mode otherwise.

The proliferation of electronic equipment that is permanently connected to the grid causes significant parasitic losses. Yet, the design of power supplies for PCs, servers, multi-function printers, etc, is governed by the cost and component specifications at the peak operating point as well as the thermal management of the power supply itself. Most power supplies have lower efficiencies at light loads than at their rated loads. If the unit spends most of its time at the light load operating point, then the energy consumption will be much higher compared to a situation where the power supply is optimized for overall energy consumption with a specified load cycle. Considering that most electronic appliances are produced in high volume, the use of power supplies that permit easy custom design makes sense from the standpoint of energy efficiency. Over the past few years, multiple topological changes and design changes that aim to improve the efficiency of the power supplies have been proposed. However, their proliferation in low cost consumer electronics has been limited primarily by their high costs, additional area overhead and incompatibility with existing power supply converter topologies. As a part of this Master's thesis research work, a business case is first proposed to show that a market for low cost and high power rating electronic devices that exhibits high power efficiency exists. Then a novel yet simple, low cost device(SSSR) is proposed to improve the efficiency of existing power supplies without effecting major changes to their existing design. Our claims are backed up by simulation results and a working prototype. Finally, a ROI model is presented to showcase the effectiveness of the proposed solution in today's consumer market.

Switched mode power supplies (SMPS) are being extensively used in most power conversion processes. The analysis, design and modeling processes of hard-switched converters are mature, where the switching frequency was limited to a few 10's of kHz. The present direction of evolution m SMPS is towards higher efficiency and higher power density. These twin objectives demand high switching frequency and low overall losses. Soft switching results in practically zero switching losses and extends the switching frequency to 100's of kHz and beyond. This thesis presents novel variants of push-pull and half-bridge DC-DC converters with soft switching properties. The proposed topology uses two additional switches and two diodes. The additional switches introduce freewheeling intervals m the circuit and enable loss-less switching. Switch stress, control and small signal model are similar to hard-switched PWM converter. Synchronous rectifiers are used in the ZVS push-pull converter to achieve high efficiency. It is interesting to see that the drives for the synchronous rectifier device are practically the same as the additional switches. The contributions made in this thesis are 1) Idealized analysis and design methodology for the proposed converters. 2) Validation of the design through circuit simulation as well as prototypes - a 300kHz, 200W push-pull converter and a 300kHz, 640W half-bridge converter. 3) Closed loop control design for desired bandwidth and accuracy Verification of loop gain through network analyzer instrumental for the same The loop gain bandwidth achieved is about 30kHz for the push-pull converter and 20kHz for half-bridge converter. An appendix has been devoted to explain the use of network analyzer. Characterization of coil, transformer and capacitor are explained in detail. Measurement techniques for measuring the small signal parameters of power supply are also explained in the appendix.