Este trabalho apresenta um estudo da discretização de controladores ressonantes aplicados a fontes ininterruptas de energia (UPSs, do termo em inglês, Uninterruptible Power Suppllies). Primeiramente, diferentes métodos de discretização serão considerados na obtenção de um modelo em tempo discreto da UPS. Além disso, estes métodos serão comparados do ponto de vista frequencial para a definição da formulação do controlador ressonante a ser utilizado. Então, uma metodologia de projeto robusto do controlador ressonante em tempo discreto é proposta a partir de uma representação em espaço de estados do sistema em malha fechada e os parâmetros do controlador são obtidos através da solução de um problema de otimização convexa sujeito a restrições na forma de Desigualdades Matriciais Lineares (do inglês, Linear Matrix Inequalities - LMIs). A estratégia proposta foi validada por meio de resultados de simulação e experimentais obtidos com um inversor comercial de 3,5 kVA considerando os critérios estabelecidos na norma IEC 62040-3. Nestas condições, demonstrara-se um desempenho melhor do que os obtidos com a discretização do controlador projetado em tempo contínuo, sobretudo quando consideradas frequências de amostragem menores. / This work presents a study about discrete-time resonant controllers applied to uninterruptible power supplies (UPSs). First, different discretization methods are considered to obtain an equivalent UPS discrete-time model. Moreover, these methods are compared in the frequency domain in order to define the resonant controller structure to be employed. Then, a robust design methodology to the discrete-time resonant controller is proposed using a state-space representation of the closed-loop system and the controller parameters are obtained by solving a convex optimization problem subject to constraints in the form of Linear Matrix Inequalities (LMIs). The proposed strategy was validated by means of simulation and experimental results obtained with a 3.5 kVA commercial inverter taking into account the IEC 62040-3 norm requirements. In this conditions, a better performance was achieved than those obtained through discretization of a continuous-time controller, especially when considering smaller sampling frequencies.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This work presents as contributions a design procedure for controllers applied to single-phase uninterruptible power supplies and the certification of the closed-loop stability and performance using linear matrix inequalities. The design procedure takes into account the IEC62040-3 standard to select the components of an internal model principle based controller that guarantees tracking of sinusoidal reference and rejection of disturbances from typical nonlinear loads. It also takes into account the suitability of the controller for implementation in fixed point digital signal processors, including constraints on data representation and transport delay. A discrete linear quadratic regulator is used to ensure to the closed-loop system satisfactory transient responses and steady-state performance. The proposed design procedure is applied to a prototype of the output stage of an uninterruptible power supply, with simulation and experimental results that totally comply with the requirements of the IEC62040-3 standard. Finally, the performance of closed-loop system is certified by means of linear matrix inequalities that allow to determine the capacity of rejection of disturbances under time-varying or time invariant parametric uncertainties, providing new information on limits of performance for this class of systems. / Este trabalho apresenta como contribuições um procedimento de projeto para controladores aplicados a fontes ininterruptas de energia monofásicas e a certificação da estabilidade e do desempenho em malha fechada utilizando desigualdades matriciais lineares. O procedimento de projeto leva em conta a norma IEC62040-3 para a escolha das componentes de um controlador baseado no princípio do modelo interno, que garante rastreamento da referência senoidal e rejeição de distúrbios provenientes de cargas não lineares típicas. Também leva em conta a adequação do controlador à implementação em processadores digitais de ponto fixo, incluindo restrições na representação dos dados e de atraso de transporte. Um regulador linear quadrático discreto é utilizado para garantir ao sistema em malha fechada respostas transitórias e desempenho em regime permanente satisfatórios. O procedimento de projeto proposto é aplicado a um protótipo de estágio de saída de uma fonte ininterrupta de energia, com resultados de simulação e experimentais que atendem completamente às exigências da norma IEC62040-3. Finalmente, o desempenho do sistema em malha fechada é certificado por meio de desigualdades matriciais lineares que permitem determinar a capacidade de rejeição de distúrbios sob incertezas paramétricas variantes no tempo ou invariantes no tempo, fornecendo novas informações sobre limites de desempenho para essa classe de sistemas.

Este trabalho apresenta um estudo da discretização de controladores ressonantes aplicados a fontes ininterruptas de energia (UPSs, do termo em inglês, Uninterruptible Power Suppllies). Primeiramente, diferentes métodos de discretização serão considerados na obtenção de um modelo em tempo discreto da UPS. Além disso, estes métodos serão comparados do ponto de vista frequencial para a definição da formulação do controlador ressonante a ser utilizado. Então, uma metodologia de projeto robusto do controlador ressonante em tempo discreto é proposta a partir de uma representação em espaço de estados do sistema em malha fechada e os parâmetros do controlador são obtidos através da solução de um problema de otimização convexa sujeito a restrições na forma de Desigualdades Matriciais Lineares (do inglês, Linear Matrix Inequalities - LMIs). A estratégia proposta foi validada por meio de resultados de simulação e experimentais obtidos com um inversor comercial de 3,5 kVA considerando os critérios estabelecidos na norma IEC 62040-3. Nestas condições, demonstrara-se um desempenho melhor do que os obtidos com a discretização do controlador projetado em tempo contínuo, sobretudo quando consideradas frequências de amostragem menores. / This work presents a study about discrete-time resonant controllers applied to uninterruptible power supplies (UPSs). First, different discretization methods are considered to obtain an equivalent UPS discrete-time model. Moreover, these methods are compared in the frequency domain in order to define the resonant controller structure to be employed. Then, a robust design methodology to the discrete-time resonant controller is proposed using a state-space representation of the closed-loop system and the controller parameters are obtained by solving a convex optimization problem subject to constraints in the form of Linear Matrix Inequalities (LMIs). The proposed strategy was validated by means of simulation and experimental results obtained with a 3.5 kVA commercial inverter taking into account the IEC 62040-3 norm requirements. In this conditions, a better performance was achieved than those obtained through discretization of a continuous-time controller, especially when considering smaller sampling frequencies.

Submitted by isabela.moljf@hotmail.com (isabela.moljf@hotmail.com) on 2017-03-02T11:39:15Z No. of bitstreams: 1 fredericotoledoghetti.pdf: 2816885 bytes, checksum: 98c4c49d919a94d51a94ff86a91c33a1 (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2017-03-06T19:32:09Z (GMT) No. of bitstreams: 1 fredericotoledoghetti.pdf: 2816885 bytes, checksum: 98c4c49d919a94d51a94ff86a91c33a1 (MD5) / Made available in DSpace on 2017-03-06T19:32:09Z (GMT). No. of bitstreams: 1 fredericotoledoghetti.pdf: 2816885 bytes, checksum: 98c4c49d919a94d51a94ff86a91c33a1 (MD5) Previous issue date: 2009-05-26 / CAPES - Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / É apresentado, neste trabalho, um estudo sobre topologias alternativas de fontes ininterruptas de energia do tipo Delta, para o emprego em cargas monofásicas de até 1kVA. O estudo prevê a inserção de um conversor CC-CC entre o conversor shunt e o banco de baterias. Tal modificação em relação à UPS do tipo Delta convencional otimiza o projeto do banco de baterias e requisita um menor número de células em série para sua confecção. Além disso, a proposta elimina o uso de transformadores de baixa freqüência, considerados em alguns trabalhos anteriores, o que também contribui para a redução do peso e volume do sistema. Duas diferentes topologias para o conversor CC-CC foram investigadas e comparações de desempenho e viabilidade foram realizadas. A topologia que apresentou melhor desempenho nos quesitos custo, volume e peso, foi selecionada para testes em bancada. Ao final, resultados simulados e práticos são apresentados para validação do modelo. / This dissertation presents a study on single-phase Delta-UPS topological alternatives for low power and low cost applications. The proposed topology has a DC-DC converter connected between the shunt inverter and the battery bank/series converter DC terminals, respectively. This modification will allow the downsizing of the DC battery bank as well as the removing of the series converter transformer. Two different topologies of the DC DC converter were investigated and a comparative study among them will be accomplished. Simulation results are presented and experimental results will be included to validate the proposed study.

L’objectif de cette étude est de développer une alimentation multisources exploitant la complémentarité batterie/supercondensateurs pour gagner en masse sur le stockage de l’énergie électrique embarquée à bord des aéronefs et des véhicules spatiaux. L’étude se déroule en trois parties :Dans la première partie, un outil d’aide à la décision permettant développer une alimentation hybride pour une application donnée est présenté. Cet outil a pour but d’estimer la masse optimale d’une alimentation hybride à partir des seules informations d’énergies spécifiques et puissances spécifiques des sources candidatesLa deuxième partie de l’étude s’appuie sur la complémentarité d’une étude bibliographique sur le comportement interne des supercondensateurs, couplée avec une campagne expérimentale de caractérisation et de vieillissement des supercondensateurs, pour construire et identifier les modèles multiphysiques de références commerciales de supercondensateurs nécessaires à l’optimisation fine du dimensionnement de l’alimentation hybride.À partir du modèle des sources, la troisième et dernière partie de cette étude a pour objectif de présenter la conception d’une architecture électrique répondant au besoin. En particulier, l’alimentation hybride proposée dans cette partie exploite dynamiquement et au maximum de leur capacité chacune des deux sources, tout en prenant soin de ne pas les contraindre excessivement. De par cette manière de faire, on se prémunit contre d’éventuelles défaillances des sources liées à leur utilisation abusive / The aim of this study is to develop an hybrid power supply using the complementarities between batteries and supercapacitors in order to improve the mass of electrical storage systems on aircrafts and spacecrafts.The study is divided into three parts: In the first part, a decision-making tool to develop a hybrid power supply given a mission profile is presented. Thanks to this tool, an estimation of the optimal mass of the hybrid power supply is done based only on the specific energy and the specific power of the sources.The second part is firstly composed of a synthesis of bibliography results on the internal behavior of supercapacitors; secondly an experimental test campaign is described. Its aim is characterizing, modeling and identifying the multiphysics behavior and ageing of supercapacitors on several commercial references. Those models are required for the fine sizing optimization of the hybrid power supply. Basing on the internal model of the sources, the aim of the third part of this study is to present the development of an hybrid architecture battery/supercapacitors which fulfills the electrical need for a specific application. This hybrid power supply takes dynamically advantage of the electrical sources at the maximum of their possibilities, but without overstressing them at the same time. Thanks to that, the aging rate of the sources and the failure rate of the system are limited

No description available.

Discrete silicon carbide (SiC) power devices have unique characteristics that outpace those of silicon (Si) counterparts. The improved physical features have provided better faster switching, greater current densities, lower on-resistance, and temperature performances. However, there is lack of suitable commercial gate drivers that are compatible for high-voltage, and high-speed devices. There has been a great research effort required for the advancement of gate drivers for high voltage SiC transistors. A drive circuit for a SiC MOSFET needs to be optimized in normal operation to give best efficiency and same drive circuit should secure the MOSFET under unsuitable conditions. To ensure the rapid switching of these advanced SiC MOSFETs, a gate driver capable of providing the high current capability is required. In this work, three different high-power-density, high-speed, and high-noise-immunity gate driver modules for 10 kV SiC MOSFET were built and optimized.  Double-pulse test was developed for the dynamic characterization of SiC MOSFETs and gate drivers. This setup provided clean measurements of DUT voltage and current under well-defined conditions and correlated to simulation results. Designed gate drivers have thoroughly investigated to test and compare it with our future design. The influential parameters such as dV/dt, dI/dt, and gate driving capability of gate driver were adjusted according to the requirements. The short circuit protection test was performed to check the reliability of driver modules in worst conditions. Furthermore, a DC-DC converter was designed and tested with the advanced gate drivers. The driver modules were tested in designed converter under different load conditions and influential parameters were successfully demonstrated. The driver modules effectively helped in reducing the EMI and switching losses. These designed gate drivers and prototype converter provide all the attractive features and can be widely implemented in industrial applications for energy efficient systems.

The field of neuromorphic computing concerns simulating the information processing of a brain in software or hardware on a computing platform. One neuromorphic platform that uses specialized hardware is SpiNNaker. It is an integrated circuit consisting of multiple general purpose processing cores that can run simulations of neurons. A custom on-chip network mimics the high level of neuron interconnectedness in a brain. The second generation of this chip is currently in development and a prototype, JiB 2, is used in this thesis. This chip has a Ball Grid Array (BGA) footprint and requires several supply voltage levels to operate making implementation more complex. To use such a chip in an autonomous robot, the hardware needs to be in a small form factor. It is beneficial to use an intermediary platform with support for many actuators and sensors to avoid having to develop new drivers (and because the processing power of individual blocks in JiB 2 is not well suited to these tasks). This thesis shows how a platform for autonomous use in robots can be designed with the current prototype chip. It details the design decisions made for the power supply and using the footprint. The existing software is explained and modifications made are shown. Some performance metrics (memory requirements, power and cost) are characterized. A simple program running on the prototype chip with input and output from a microcontroller development board using STM32 is demonstrated. This project suggests a path to deploy software on the JiB 2 and let it interact with the physical world. / Att i en dator eller speciell hårdvara simulera hur neuroner i en hjärna interagerar i sitt informationsutbyte studeras inom fältet neouromorfisk databehandling. Eftersom utbytet sker med snabba länkar mellan många oberoende enheter är traditionell datorhårdvara inte lämpad att implementera sådana skeenden. Därför finns specialhårdvara som bättre efterlikar detta utbyte genom att, till exempel, använda många enkla processorkärnor (för att simulera neuroner) tillsammans med ett snabbt nätverk på kretsen (och mellan flera kretsar). Ett användningsområde är i större komplexa system men det finns en efterfrågan att kunna använda den även i mer begränsade kontexter. En sådan specialhårdvara är den integrerade kretsen SpiNNaker (Spiking Neural Network Architecture). En andra generationen av den kretsen är under utveckling och projektet i denna uppsats har arbetat med en begränsad prototyp kallad JiB2. Målet har varit att bygga en plattform som visar hur JiB 2 kan utnyttjas fristående i en robot. Detta kräver hårdvara som är möjlig att enkelt ladda med nya program. Den behöver klara att strömförsörja kretsen från exempelvis ett batteri. Den ska också ha möjlighet att koppla in- och utsignaler till programmet som körs i specialkretsen. Detta arbete visar att hårdvara går att tillverka i en storlek som lämpar sig för använding i robotar. Ett flöde för utveckling och drifttagning av programvara till plattformen demonstreras.

Switched mode power supplies (SMPS) have found wide spread acceptance in all power processing applications. The design demand is moving towards higher power densities. For reduction in size and weight, it is imperative to process the power at a higher switching frequency. High switching frequency requires soft switching techniques to reduce the switching losses. Several families of soft switching converters have emerged in the past two decades. Analysis and modelling methods have been proposed in relation with these topologies. Active clamp converters are the recently introduced soft switching topologies. Steady state analysis and model of these converters have been reported in literature. This thesis presents a unified equivalent circuit oriented model for the family of active clamp converters. Analytical expressions for DC conversion ratio in terms of pole current and throw voltage are derived for all the DC-DC converters with active clamp. The special feature is that, the conversion ratio exhibits a load dependent drop (IRd), where I is the pole current and Rd is the damping resistance. The damping resistance Rd is a mathematical artifact to represent the voltage loss on account of delay in the turn-on of the active switch. There is no energy loss associated with this load dependent drop. This is conveniently expressed as an appropriate lossless resistance in the equivalent circuit model. The proposed equivalent circuit models are valid for both steady-state and dynamic performance. A spread sheet based design is presented for the basic DC-DC converters with active clamp. A prototype design following the spreadsheet is made. The performance of the same is validated and verified by simulation and measurements. Steady state and dynamic results are presented. The stability criterion for the active clamp converters under current programming is investigated. The same is verified through simulation and validated on a current programmed active clamp converter prototype. The active clamp converters suffer from a few disadvantages: Higher VA ratings of switches, load dependent ZVS performance and increased component count. Several soft switching topologies have been reported in literature. Efficiency improvement and increase in switching frequency are obtained to different degrees. This thesis proposes a new family of soft switching converters. This family of converters switch at constant frequency and maintains the advantages of traditional PWM converters. The proposed topology employs an auxiliary circuit to achieve soft switching. The auxiliary circuit consists of a dependent voltage source, an auxiliary switch, a series diode and a set of resonant elements (Inductor and capacitor). The switching transitions of both the active switch and the auxiliary switch are lossless. The novelty in the proposed circuit is the method of generating the dependent source required to enable zero current switching of the auxiliary switch. The dependent source is realized by a coupled winding in the energy storage inductor or tapped from the energy transfer transformer of non-isolated and isolated converters respectively. The proposed topology is applicable to most of the isolated and non-isolated DC-DC converters. The circuit equations governing the sub-intervals of the converter are expressed in terms of pole current and throw voltage. With such a definition, performance results and the design equations are identical for all types of DC-DC converters. Equivalent circuit models are obtained for the whole family of DC-DC converters. The proposed model is valid for steady state and dynamic performance. Analytical expressions of DC conversion ratio for all topologies, in terms of pole current and throw voltage are derived. The special feature is that, the conversion ratio exhibits a load dependent drop (IRd), where I is the pole current and Rd is the damping resistance. The damping resistance Rd is a mathematical artifact to represent the voltage loss on account of delay in the turn-on of the active switch. There is no energy loss associated with this load dependent drop. This is conveniently expressed as an appropriate lossless resistance in the equivalent circuit model. Design guidelines are established for the whole family of proposed converters; the same are validated through prototype converters.

Σκοπός της παρούσας εργασίας είναι η μελέτη των βασικών τμημάτων που απαρτίζουν ένα ηλεκτρικό όχημα, με άμεσο στόχο τη μέγιστη δυνατή εξοικονόμηση ενέργειας. Προς την κατεύθυνση αυτή μελετάται αρχικά η βαθμίδα φόρτισης των συσσωρευτών. Παρουσιάζονται οι προδιαγραφές και προτείνεται ως βέλτιστη τοπολογία αυτή του Flyback η οποία αντιμετωπίζει λειτουργικές δυσκολίες. Έτσι προτείνεται μια ειδική μεθοδολογία σχεδιασμού βασιζόμενη στην επιλογή του λόγου του Μ/Τ. Επίσης προτείνεται ένα νέο κύκλωμα καταστολής των υπερτάσεων λόγω σκέδασης. Η αποτελεσματική λειτουργία επιβεβαιώνεται μέσω εξομοιώσεων και πειραματικών δοκιμών. Στο δεύτερο μέρος παρουσιάζεται ένα νέο κύκλωμα τροφοδοσίας. Πρόκειται για μετατροπέα μονής βαθμίδας με ένα τρανζίστορ κα αποτελεσματική καταστολή υπερτάσεων. Παράλληλα πραγματοποιεί βελτίωση του συντελεστή ισχύος του κυκλώματος. Στο τρίτο μέρος μελετάται το κινητήριο σύστημα και προτείνεται μια μέθοδος ελέγχου της μαγνητικής ροής και του λόγου μετάδοσης του κιβωτίου ταχυτήτων ώστε να επιτυγχάνεται η ελάχιστη δυνατή ενεργειακή κατανάλωση του οχήματος. Τα αποτελέσματα εξομοίωσης επιβεβαιώνουν την αποτελεσματικότητα της προτεινόμενης μεθόδου. / Basic aim of the present work is the analytical study of the basic part of an EV, in order to be obtained a good energy saving. For this purpose the charging unit of an EV is studied. The specifications which must fulfill this device are exhibited and the Flyback topology is suggested as the optimal. However it appears some important problems. For this purpose, a new strategy of design based on the transformer.