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Thermal and EMI Modeling and Analysis of a Boost PFC Circuit Designed Using a Genetic-based Optimization AlgorithmHertz, Erik M. 31 July 2001 (has links)
The boost power factor correction (PFC) circuit is a common circuit in power electronics. Through years of experience, many designers have optimized the design of these circuits for particular applications. In this study, a new design procedure is presented that guarantees optimal results for any application. The algorithm used incorporates the principles of evolution in order to find the best design. This new design technique requires a rethinking of the traditional design process. Electrical models have been developed specifically for use with the optimization tool. One of the main focuses of this work is the implementation and verification of computationally efficient thermal and electro-magnetic interference (EMI) models for the boost PFC circuit. The EMI model presented can accurately predict noise levels into the 100's of kilohertz range. The thermal models presented provide very fast predictions and they have been adjusted to account for different thermal flows within the layout. This tuning procedure results in thermal predictions within 10% of actual measurement data. In order to further reduce the amount of analysis that the optimization tool must perform, some of the converter design has been performed using traditional methods. This part of the design is discussed in detail. Additionally, a per unit analysis of EMI and thermal levels is introduced. This new analysis method allows EMI and thermal levels to be compared on the same scale thus highlighting the tradeoffs between the both behaviors. / Master of Science
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Digital Control for Power Factor CorrectionXie, Manjing 21 August 2003 (has links)
This thesis focuses on the study, implementation and improvement of a digital controller for a power factor correction (PFC) converter.
The development of the telecommunications industry and the Internet demands reliable, cost-effective and intelligent power. Nowadays, the telecommunication power systems have output current of up to several kilo amperes, consisting of tens of modules. The high-end server system, which holds over 100 CPUs, consumes tens of kilowatts of power. For mission-critical applications, communication between modules and system controllers is critical for reliability. Information about temperature, current, and the total harmonic distortion (THD) of each module will enable the availability of functions such as dynamic temperature control, fault diagnosis and removal, and adaptive control, and will enhance functions such as current sharing and fault protection. The dominance of analog control at the modular level limits system-module communications. Digital control is well recognized for its communication ability. Digital control will provide the solution to system-module communication for the DC power supply.
The PFC converter is an important stage for the distributed power system (DPS). Its controller is among the most complex with its three-loop structure and multiplier/divider. This thesis studies the design method, implementation and cost effectiveness of digital control for both a PFC converter and for an advanced PFC converter. Also discussed is the influence of digital delay on PFC performance. A cost-effective solution that achieves good performance is provided. The effectiveness of the solution is verified by simulation.
The three level PFC with range switch is well recognized for its high efficiency. The range switch changes the circuit topology according to the input voltage level. Research literature has discussed the optimal control for both range-switch-off and range-switch-on topologies. Realizing optimal analog control requires a complex structure. Until now optimal control for the three-level PFC with analog control has not been achieved. Another disadvantage of the three-level PFC is the output capacitor voltage imbalance. This thesis proposes an active balancing solution to solve this problem. / Master of Science
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DQ-Frame Small-Signal Stability Analysis of AC Systems with Single-Phase and Three-Phase ConvertersLin, Qing 21 June 2024 (has links)
The widespread integration of power converters in applications such as microgrids and data centers has introduced significant stability challenges. This dissertation presents a novel approach to modeling and comprehensive stability analysis for both single-phase and three-phase converters, addressing vital gaps in the existing literature. The first part of the dissertation (Chapters 2 to 4) focuses on single-phase power supply units, proposing an impedance model and a loop gain model based on dq-frame analysis. These models have been validated through extensive experimental testing, demonstrating their effectiveness in stability analysis across a range of system configurations, including single-phase, three-phase three-wire, and three-phase four-wire systems. The second part (Chapters 5 and 6) examines three-phase converters used for integrating renewable energy into microgrids. It introduces a grid-forming control, followed by a detailed investigation into its impedance modeling and stability assessment. This part specifically tackles the challenges posed by the appearance of right-half-plane poles in stability analysis, proposing a new stability margin index to address these issues. The efficacy of these research findings is further substantiated by the development and implementation of a Power-Hardware-in-the-Loop testbed, providing practical validation. Overall, this dissertation has enhanced the modeling, understanding, and management of stability issues in power electronics systems, offering valuable insights and methodologies that are likely to influence future research and development in the field. / Doctor of Philosophy / Power electronics play a crucial role in many of today's advanced technologies, including Renewable Energy (like wind and solar power), Electric Vehicles, Cloud Computing, and Artificial Intelligence. In renewable energy, power electronics are key for converting energy sources for efficient grid integration. Electric vehicles rely on power converter systems for charging their batteries and driving their motors. Similarly, in Cloud Computing and Artificial Intelligence, power electronics ensure that the computers and servers in data centers have a steady and reliable power supply for operation. However, using these advanced power electronics on a large scale, like in wind farms or data centers, can lead to challenges, including many reported system instability issues. These issues highlight the importance of a thorough analysis and understanding of the behavior and interaction of power electronics systems.
In addressing these challenges, power electronics converters, conceptualized as a blend of circuits and control systems, demand comprehensive modeling from the ground up. Such modeling is essential to understanding their behavior, ranging from individual components to the entire system. This is key to establishing a clear connection between intricate design details and overall system performance. With power electronics systems becoming more complex and the continual emergence of new technologies, there remains a significant array of unanswered questions, especially in the domain of stability analysis for AC power electronics systems. This dissertation delves into two prominent modeling methods for stability analysis: impedance modeling and loop gain modeling. By exploring and addressing specific gaps identified in prior research, this work aims to contribute to a more profound understanding and enhanced application of these critical methods.
The research presented in this dissertation is methodically divided into two main sections. The first section, including Chapter 2 to Chapter 4 is dedicated to exploring single-phase converter power supply units (PSUs) systems. This section introduces innovative models for analyzing their stability, applicable to single-phase PSUs in various system configurations, including both single-phase and three-phase setups. This modeling approach is a significant step forward in understanding and enhancing the stability of single-phase PSU loads. The second section, including Chapter 5 and Chapter 6, delves into the analysis of three-phase converters used in integrating renewable energy sources into microgrids. A notable feature of these converters is their grid-forming control mechanism, which includes a new frequency and power droop control loop. This part also explores modeling the impact of these converters on microgrid stability. Moreover, the issue of right-half-plane (RHP) poles in impedance analysis- a complex problem that can affect stability analysis is addressed. It proposes innovative methods for measuring stability in such conditions.
In conclusion, this research made advancements in the modeling for stability analysis of power converter systems. For single-phase converters, the developed impedance model and loop gain model, based on dq-frame analysis, have been proven to be accurate. These models are versatile for stability analysis in various AC systems with single-phase PSU loads. In the study of three-phase converters, the grid-forming converter was successfully designed to support the grid as a distributed energy resource interface. This design contributes positively to microgrid stability. Furthermore, to address the presence of RHP poles in stability analysis, a new stability margin index was defined to better understand and manage these challenges. These findings represent important steps forward in the field of power electronics and contribute valuable insights for future research and development.
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Conducted EMI Noise Prediction and Filter Design OptimizationWang, Zijian 04 October 2016 (has links)
Power factor correction (PFC) converter is a species of switching mode power supply (SMPS) which is widely used in offline frond-end converter for the distributed power systems to reduce the grid harmonic distortion. With the fast development of information technology and multi-media systems, high frequency PFC power supplies for servers, desktops, laptops and flat-panel TVs, etc. are required for more efficient power delivery within limited spaces. Therefore the critical conduction mode (CRM) PFC converter has been becoming more and more popular for these information technology applications due to its advantages in inherent zero-voltage soft switching (ZVS) and negligible diode reverse recovery. With the emerging of the high voltage GaN devices, the goal of achieving soft switching for high frequency PFC converters is the top priority and the trend of adopting the CRM PFC converter is becoming clearer.
However, there is the stringent electromagnetic interference (EMI) regulation worldwide. For the CRM PFC converter, there are several challenges on meeting the EMI standards. First, for the CRM PFC converter, the switching frequency is variable during the half line cycle and has very wide range dependent on the AC line RMS voltage and the load, which makes it unlike the traditional constant-frequency PFC converter and therefore the knowledge and experience of the EMI characteristics for the traditional constant-frequency PFC converter cannot be directly applied to the CRM PFC converter.
Second, for the CRM PFC converter, the switching frequency is also dependent on the inductance of the boost inductor. It means the EMI spectrum of the CRM PFC converter is tightly related the boost inductor selection during the design of the PFC power stage. Therefore, unlike the traditional constant-frequency PFC converter, the selection of the boost inductor is also part of the EMI filter design process and EMI filter optimization should begin at the same time when the power stage design starts.
Third, since the EMI filter optimization needs to begin before the proto-type of the CRM PFC converter is completed, the traditional EMI-measurement based EMI filter design will become much more complex and time-consuming if it is applied to the CRM PFC converter. Therefore, a new methodology must be developed to evaluate the EMI performance of the CRM PFC converter, help to simplify the process of the EMI filter design and achieve the EMI filter optimization.
To overcome these challenges, a novel mathematical analysis method for variable frequency PFC converter is thus proposed in this dissertation. Based on the mathematical analysis, the quasi-peak EMI noise, which is specifically required in most EMI regulation standards, is investigated and accurately predicted for the first time. A complete approximate model is derived to predict the quasi-peak DM EMI noise for the CRM PFC converter. Experiments are carried out to verify the validity of the prediction. Based on the DM EMI noise prediction, worst case analysis is carried out and the worst DM EMI noise case for all the input line and load conditions can be found to avoid the overdesign of the EMI filter. Based on the discovered worst case, criteria to ease the DM EMI filter design procedure of the CRM boost PFC are given for different boost inductor selection. Optimized design procedure of the EMI filter for the front-end converter is then discussed. Experiments are carried out to verify the validity of the whole methodology. / Ph. D. / Power factor correction (PFC) converter is widely used in offline frond-end converter for the distributed power systems to reduce the grid harmonic distortion. With the fast development of information technology and multi-media systems, high frequency PFC power supplies for servers, desktops, laptops and flat-panel TVs, etc. are required for more efficient power delivery within limited spaces. Therefore the critical conduction mode (CRM) PFC converter has been becoming more and more popular for these information technology applications.
However, there is the stringent electromagnetic interference (EMI) regulation worldwide. For the CRM PFC converter, there are many challenges on meeting the EMI standards. To overcome these challenges, a novel mathematical analysis method for variable frequency PFC converter is thus proposed in this dissertation. A complete approximate model is derived to predict the quasi-peak DM EMI noise for the CRM PFC converter. Experiments are carried out to verify the validity of the prediction. Based on the DM EMI noise prediction, worst case analysis is carried out and based on the discovered worst case, criteria to ease the DM EMI filter design procedure of the CRM boost PFC are given for different boost inductor selection. Optimized design procedure of the EMI filter for the front-end converter is then discussed. Experiments are carried out to verify the validity of the whole methodology.
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Carregador de Baterias MonofÃsico Para AplicaÃÃo em VeÃculos ElÃtricos / âSingle-Phase Battery Charger Feasible for Electric Vehicles Applicationsâ,CÃsar Orellana Lafuente 28 June 2011 (has links)
Este trabalho apresenta o estudo de um carregador de baterias monofÃsico aplicado a
veÃculos elÃtricos. Este carregador à composto por dois estÃgios de processamento de energia
e um circuito digital de supervisÃo para controlar a tensÃo sobre o banco de baterias e a
corrente de recarga das mesmas. O primeiro estÃgio consiste de um conversor CA-CC
bridgeless com caracterÃstica de alto fator de potÃncia, e o segundo estÃgio à representado por
um conversor CC-CC fullbridge com isolamento em alta frequÃncia e comutaÃÃo sob tensÃo
nula (Zero Voltage Switching â ZVS). Para ambos os conversores, foi realizada uma anÃlise
qualitativa e quantitativa, bem como apresentados exemplos de projeto para facilitar o
dimensionamento dos componentes. Finalmente, com os componentes escolhidos, foi
montado um protÃtipo que permite carregar de uma atà oito baterias de 12 V conectadas em
sÃrie. O sistema apresenta como especificaÃÃes: tensÃo de entrada alternada de 220 VÂ15%;
tensÃo de saÃda contÃnua de 120 V; corrente de saÃda contÃnua de 20 A; e potÃncia mÃdia de
saÃda de 2,4 kW. / This work presents a single-phase battery charger for electric vehicles. This converter
is composed by two energy processing stages and a digital circuit to control the voltage across
the batteries and their respective charging current. The first stage is a high power factor ACDC
bridgeless converter, while the second one consists on a ZVS (Zero Voltage Switching)
high frequency isolated DC-DC full-bridge converter. For both converters, the qualitative and
quantitative analyses have been performed, as well as design examples have been presented in
order to ease the components calculation. Finally, a prototype that allows charging up to eight
series-connected 12 V batteries has been built. The system specifications are: AC input
voltage of 220 V Â15%; DC output voltage of 120 V; DC output current of 20 A; and average
output power of 2.4 kW.
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Contribution à l'étude de nouveaux convertisseurs sécurisés à tolérance de panne pour systèmes critiques à haute performance. Application à un PFC Double- Boost 5 NiveauxPham, Thi Thuy Linh 09 November 2011 (has links) (PDF)
Ce travail vise une exploration et une évaluation de nouvelles variantes de topologies multiniveaux AC/DC non réversibles (PFC) du point de vue de leur sûreté de fonctionnement : recherche d'une grande sécurité électrique sur destruction interne et maintien d'une continuité de fonctionnement. Elles sont caractérisées par une connexion AC non différentielle, un partitionnement cellulaire en série et symétrique autour d'un point milieu. Cette organisation permet d'exploiter la redondance active série entre les cellules d'un même groupe et l'effet de ségrégation topologique qui apparaît entre les deux groupes de cellules. Les structures étudiées sont modulaires et peuvent être parallélisées et étendues à un nombre quelconque de phases. Elles ne possèdent que des cellules mono-transistors basse-tension (Si et SiC 600V max) performantes et intrinsèquement tolérantes aux imperfections de la commande et aux parasites donc naturellement sécurisées. Les comparaisons prenant en compte les pertes, la répartition des pertes, le dimensionnement et le report de contraintes sur défaut interne mettent en avant la structure PFC Double- Boost Flying Cap. à 5 Niveaux, brevetée en début de thèse, comme une solution ayant le meilleur compromis. Sur le plan théorique nous montrons que le seul calcul de la fiabilité basé uniquement sur un critère d'occurrence au premier défaut est inadapté pour décrire ce type de topologie. La prise en compte de la tolérance de panne est nécessaire et permet d'évaluer la fiabilité globalement sur une panne effective (i.e. au second défaut). L'adaptation de modèles théoriques de fiabilité à taux de défaillance constant mais prenant en compte, au niveau de leurs paramètres, le report de contrainte en tension et l'augmentation de température qui résulte d'un premier défaut, permet de chiffrer par intégration et en valeur relative, le gain obtenu sur un temps court. Ce résultat est compatible avec les systèmes embarqués et la maintenance conditionnelle. Un prototype monophasé à 5 niveaux, à commande entièrement numérique et à MLI optimisée reconfigurable en temps réel a été réalisé afin de valider l'étude. Il permet une adaptation automatique de la topologie de 5 à 4 puis à 3 niveaux par exemple. Ce prototype a également servi de banc de test d'endurance du mode de défaillance sur claquage - avalanche de transistors CoolMos™ et diodes SiC, volontairement détruits individuellement dans des conditions d'énergie maîtrisée et reproductibles, afin de prouver expérimentalement le maintien du service sur plusieurs centaines d'heures au prix d'un derating de 30% maximum en puissance seulement. La détection et le diagnostic rapide de défauts internes ont également été traités dans ce travail. D'une part, par la surveillance directe et le seuillage des tensions internes (tensions flottantes) et d'autre part, par une détection harmonique de la fréquence de base (amplitude et phase) en temps réel. Ces deux techniques ont été intégrées numériquement et évaluées sur le prototype, en particulier la seconde qui ne requiert qu'un seul capteur. VI Enfin, nous proposons dans ce travail une nouvelle variante PFC Vienna multicellulaire expérimentée en fin de mémoire, utilisant deux fois moins de transistors et de drivers pour les mêmes performances fréquentielles au prix d'un rendement et d'une répartition des pertes légèrement moins favorables que la structure brevetée.
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Design, Application And Comparison Of Single Stage Flybackand Sepic Pfc Ac/dc Converters For Power Led Lighting ApplicationYilmaz, Hasan 01 September 2012 (has links) (PDF)
In this work, single stage power factor corrected AC/DC converters for LEDs / single stage Flyback converter having different configuration from the traditional Flyback and single stage SEPIC converter is investigated. The study involves analysis, circuit design, performance comparisons and implementation. The study covers LEDs / their developments, characteristics and state-of-art in this new technology. The circuits are investigated by means of computer simulations. Operating principles and operating modes are studied along with design calculations. After applying prototypes in laboratory, the simulation results and theoretical analyses are confirmed. The single stage Flyback converter has high voltage input (220-240 Vac), and the output feeds up to 216 HB-LEDs, with the ratings of 24 V, 3.25 A with 90 W. The single stage SEPIC converter with universal input (80-265 Vac) has an output that feeds 21 power LEDs, with 67 V, 0.30 and 20 W ratings.
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Design Of A Single-phase Full-bridge Diode Rectifier Power Factor Corrector Educational Test SystemUnal, Teoman 01 December 2006 (has links) (PDF)
In this thesis an educational test bench for studying the power quality attributes of the
commonly used single-phase full-bridge diode rectifiers with power factor correction
(PFC) circuits is designed and tested. This thesis covers the active and passive power
factor correction methods for single-phase bridge rectifier. Passive filtering approach
with dc side inductor and tuned filter along with active filtering approach via singleswitch
boost converter is considered. Analysis, simulation, and design of a single phase
rectifier and PFC circuits is followed by hardware implementation and tests. In the active
PFC approach, various control methods is applied and compared. The educational bench
is aimed to useful for undergraduate and graduate power electronics course, power
quality related laboratory studies.
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Single-stage high-power-factor electronic ballasts with buck-boost topology for fluorescent lampsCheng, Hung-Liang 19 June 2001 (has links)
Three novel single-stage electronic ballasts with the advantages of high-power-factor, low current harmonic, high efficiency, and low cost are proposed for rapid-start fluorescent lamps. Included are (1) single-stage high-power-factor electronic ballast with asymmetrical topology, (2) single-stage high- power-factor electronic ballast with symmetrical topology, and (3) single-stage single-switch high-power-factor electronic ballast. The circuit configurations are obtained by integrating the buck-boost power-factor-correction converter into the Class D or the Class E resonant inverter. With simple circuit configuration and less component count, desired circuit performances of high-power-factor and high efficiency are realized.
The control methods of pulse-width-modulation (PWM) with asymmetrical and symmetrical approaches are utilized for the three presented ballasts. The buck-boost conversion stage is operated at discontinuous current mode (DCM) to achieve nearly unity power factor at a fixed switching frequency. With carefully designed circuit parameters, the power switches can exhibit either zero-voltage switching-on (ZVS) or zero-current switching-on (ZCS). As a result, high circuit efficiency can be ensured.
Design equations are derived and computer analyses are performed based on the lamp¡¦s equivalent resistance model and fundamental approximation. Accordingly, design guidelines for determining circuit parameters are provided. Prototypes of the three proposed circuits designed for a T8-36W lamp, two series-connected T9-40W lamps and a PL-27W lamp are built and tested to verify the computer simulations and analytical predictions.
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Μελέτη και κατασκευή τριφασικού ανορθωτή με διόρθωση του συντελεστή ισχύοςΦέτσης, Ανδρέας 18 June 2014 (has links)
Η παρούσα διπλωματική εργασία πραγματεύεται την μελέτη και το σχεδιασμό μιας τριφασικής ανορθωτικής διάταξης με την οποία επιτυγχάνεται διόρθωση του συντελεστή ισχύος. Η εργασία αυτή εκπονήθηκε στο Εργαστήριο Ηλεκτρομηχανικής Μετατροπής Ενέργειας του Τμήματος Ηλεκτρολόγων Μηχανικών και Τεχνολογίας Υπολογιστών της Πολυτεχνικής Σχολής του Πανεπιστημίου Πατρών.
Κύριος σκοπός αυτής της διπλωματικής εργασίας είναι η κατασκευή ενός μετατροπέα ανόρθωσης ανύψωσης ο οποίος λειτουργεί σε ασυνεχή αγωγή και μπορεί να τοποθετηθεί στην έξοδο μιας ανεμογεννήτριας σαν πρώτο στάδιο σύνδεσης με το δίκτυο. Απώτερος σκοπός είναι η πειραματική επιβεβαίωση της θεωρίας καθώς και του μηχανισμού με τον οποίο επιτυγχάνεται η διόρθωση του συντελεστή ισχύος.
Αρχικά γίνεται μια γενική αναφορά στην έννοια της ποιότητας ισχύος, τα χαρακτηριστικά της μεγέθη, το συντελεστή ισχύος και τις ανώτερες αρμονικές. Επίσης αναφέρονται βασικές τριφασικές ανορθωτικές διατάξεις με διορθωμένο συντελεστή ισχύος ενώ γίνεται και μια γενική αναφορά στα αιολικά συστήματα, τον τρόπο λειτουργίας τους και την σύνδεση τους με το δίκτυο.
Στη συνέχεια, αναλύεται η λειτουργία του μετατροπέα που κατασκευάστηκε κατά την διάρκεια αυτής της διπλωματικής εργασίας, δηλαδή τριφασικής διάταξης ανόρθωσης-ανύψωσης με ένα διακοπτικό στοιχείο, που λειτουργεί στην περιοχή ασυνεχούς αγωγής (DCM). Ο μετατροπέας αυτός θα δέχεται πολική τάση στην είσοδο του 40-100V, ανυψώνοντας την στα 350V στην έξοδο. Παράλληλα το ρεύμα εισόδου έχει μικρό αρμονικό περιεχόμενο επιτυγχάνοντας έναν υψηλό συντελεστή ισχύος.
Το επόμενο βήμα είναι η μοντελοποίηση και η προσομοίωση του μετατροπέα σε περιβάλλον Matlab/Simulink έτσι ώστε να εξακριβωθεί η ορθή λειτουργία του σύμφωνα με τη θεωρητική ανάλυση.
Τέλος, μελετάται και κατασκευάζεται στο εργαστήριο η πειραματική διάταξη με την οποία διεξάγονται μετρήσεις για την επιβεβαίωση και αξιολόγηση της θεωρητικής μελέτης. / In this diploma thesis the analysis and design of a three phase rectifier achieving high power factor are presented. This work was developed in the Laboratory of Electromechanical Energy Conversion at the Department of Electrical Engineering and Computer Technology of the Polytechnic School, University of Patras, Greece.
The main purpose of this diploma thesis is the implementation of a Power Factor Correction Three Phase Rectifier operated in Discontinuous Current Mode (DCM) which can be used as a first stage for the connection of a small wind turbine to the grid. Through this work, the theoretical analysis and the mechanism that achieves the high power factor are verified through the implementation of a laboratory prototype.
Initially, the concepts of power quality, power factor and high order harmonics are explained. Furthermore, some common power factor correction rectifier topologies are reported as well as a reference on wind turbines, their operation and their connection to the grid.
Secondly, the working principle of the Single Switch Power Factor Correction DCM Boost Rectifier is presented. This converter is designed to rectify and boost the voltage of a small wind turbine, varying between 40 and 100V line to line rms, to 350Vdc. In addition the converter’s input current presents low harmonic distortion which results in a high power factor.
The following step is to model and simulate the converter in Matlab/Simulink in order to verify its operation based on the theoretical analysis.
Finally, a laboratory prototype is designed and implemented, on which experiments are conducted, in order to verify and evaluate the theoretical study.
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